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Deld Unit V & Vi
Deld Unit V & Vi
On
Second Year of Computer Engineering
(2019 Course)
210245:Digital Electronics and Logic Design
Presented by:
Dr.Sable Nilesh P.
Savitribai Phule Pune University
Ganeshkhind Rd, Ganeshkhind, Pune, Maharashtra
SE Computer Engineering (2019)- Dr.Sable Nilesh
1
210245:Digital Electronics and Logic Design
Teaching/Examination Scheme
End_Semester(TH): 70 Marks
Credits : 03
Bipolar Unipolar
RTL Schottky
ECL
TTL
DTL
DCTL
I2L
TTL
• Fan-In :
• Fan-In of digital logic gate refers to number of inputs.
• Two input gate will have a fan in equal to 2.
• Fan-Out :
• The maximum number of inputs ofsevelar gates that can be
driven by a output of logic gate.
• Fan-out is a measure of the number of loads that a gate
can drive.
• High fan out is advantageous because it reduces the need
of additional drivers to drive more gates.
Pd=Vcc * Iccavg
D2,D3EB Junctions
D4CB Junction
A B C
0 0 1
0 1 1
1 0 1
1 1 0
A B Q1 Q2 Q3 Q4 Y
0 0 ON OFF ON OFF 1
0 1 ON OFF ON OFF 1
1 0 ON OFF ON OFF 1
1 1 OFF ON OFF ON 0
Vi Q1 Q2 output
•Data lines that provide a path for moving data among system
modules
•May consist of 32, 64, 128, or more separate lines
•The number of lines determines how many bits of data can be
transferred at a time.
•Used to control the access and the use of the data and address lines.
•Data and Address lines are shared by all components there must be a means of
controlling their use.
•Control signals transmit both command and timing information among system
modules
• Timing signals indicate the validity of data and address information
• Command signals specify operations to be performed
• CPU
• Instruction interpreter
• Module of general-purpose arithmetic and logic functions
• I/O Components
• Input module
• Contains basic components for accepting data and instructions and converting
them into an internal form of signals usable by the system
• Output module
• Means of reporting results
• Memory
ALU
SE Computer Engineering (2019)- Dr.Sable Nilesh 46
Registers:
D r. S a b l e N i l e s h P