EEE1001 SLOT – A11 + A12 +A13 + A14+A15 + A17

NAME – Shashwat Balodhi

REG NUMBER – 22MIM10085
INDEX
S.NO Experiment Page no Date

Design and
stimulation of
1 voltage divider 4 03-04-2023
circuit

Current division
rule using
2 simulation 8 09-04-2023
analysis

Super position
3 theorem using 13 10-04-2023
simulation

I-V
4 characteristics 16 02-05-2023
of a PN Junction
 Functionality of
a PN junction
5 diode rectifier 19 03-05-2023
(HWR)

Design and
stimulate half
6 wave rectifier 22 04-05-2023
circuit with filter

IV output
7 characteristics 25 08-05-2023
of a npn BJT

BJT based
common
8 emitter 27 10-05-2023
amplifier
EXPERIMENT - 1

AIM – Design and stimulation of voltage divider circuit using

LTspice software

Software – LTspice software

Schematic –

Design –
Stimulation –
Stimulation analysis DC operating pt.
CASE1 –
R1 = 10 ohms
R2 = 10 ohms
VR1 = 5 V
VOUT = 2.5 V

RESULT -

CASE2 –
R1 = 5 ohms
R2 = 10 ohms
VR1 = 5 V
VOUT = 3.333 V

RESULT-

Inference –
1) Voltage division rule is in accordance with the theory.
2) Power delivering – Voltage; V1
 Power consuming – R1, R2
CASE1
PR1 = V.I = (5*0.25) W = 1.25 W (DELIVER ENERGY)
PR1 = V.I = (2.5*0.25) W = 0.625 W (CONSUME ENERGY)
PR2 = V.I = (2.5*0.25) W = 0.625 W (CONSUME ENERGY)
CASE1
PV1 = V.I = (5*0.34) W = 1.7 W (DELIVER ENERGY)

PR1= V.I = (1.6*0.34) W = 0.544 W (CONSUME ENERGY)

PR2 = V.I = (3.4*0.34) W = 1.156 W (CONSUME ENERGY)

3) Satisfies the law of conservation of energy.

Result –
Using LTspice software the voltage division rule has become
satisfied.
EXPERIMENT 2

AIM - To verify current division rule using simulation analysis

SOFTWARE - LTspice

SCHEMATIC –
CASE - 1
DESIGN

SIMULATION -
CASE – 2
Design

Simulation
CASE – 3
Design

Simulation
INFERENCE
1) Least reference path.
2) Current is flowing in the opposite direction.

RESULT
Using simulation tool we have verified the current division
rule.
Experiment – 3
Aim-
To verify super-position theorem using stimulation tool.

Software- LTspice

Schematic-

CASE-1
Design
Stimulation

IBD1 = 1.33333 A
CASE-2
Design
Stimulation

IBD2 = 0.666667 A
IBD = IBD1 + IBD2 = 1.333333 A + 0.666667 A = 2 A

Result
Using LTspice software super-position theorem has been
verified.
Experiment – 4
Aim-
To stimulate the I-V characteristics of a PN Junction diode.

Software- LT-spice

Schematic-
Forward Bias (Case1)

Reverse Bias (Case2)

Simulation-

Forward Bias (Case1)

Reverse Bias (Case2)

Inference-

Where,

 I is the current flowing through the diode

 I0 is the dark saturation current,
 q is the charge on the electron,
 V is the voltage applied across the diode,
 η is the (exponential) ideality factor.
 is the Boltzmann constant
 T is the absolute temperature in Kelvin.

In forward bias
e^ xyz >>> 1
In reverse bias
e^ xyz <<< 1

Result-
Using LTspice software the I-V characteristics of a PN Junction
diode has been stimulated.
Experiment – 5
Aim-
To investigate the functionality of a PN junction diode
rectifier (HWR).

Software- LT-spice

Schematic-
Case1 [+ve cycle] -

Case2 [-ve cycle] -

Simulation-
Case1 -

Case2-
Inference-
In forward bias only positive half cycle passes we can notice
that by observing graph and in reverse bias only negative half
cycle passes.

Result-
Using LTspice software the functionality of a PN junction
diode rectifier (HWR) had been investigated.
Experiment – 6
Aim-
To design and stimulate half wave rectifier circuit with filter

Software- LT-spice

Schematic-

Stimulation-
Case1 –
R = 100 Ω
C = 100μF
Case2 –
R = 100 Ω
C = 100mF
Case3 –
R = 100 Ω
C = 1mF

Inference-
We can observe that we will get pure dc whenever we
connect a capacitor parallel and discharging capacity of
capacitor depends upon capacitance of capacitor.

Result-
Designed and stimulated a half wave rectifier circuit with
filter.
Experiment – 7

Aim- To stimulate the IV output characteristics of a npn BJT.

Software- LT-spice

Schematic-
Simulation-

Inference-
The different regions cut off region, active region and
saturation region.

Result-
The IV output characteristics of a npn BJT has been
stimulated using LTspice software.
Experiment – 8

Aim- To stimulate a BJT based common emitter (CE) amplifier.

Software- LT-spice

Schematic-
Simulation-
CASE-1
Dc operating point (to obtain DC condition).
VA > 0.6V
P1 diode is F.B.
IC, IE ≃ mA
IB ≃ µA
CASE-2
Transient analysis.
CASE-3
AC analysis.
Inference-
1. The simulation of a BJT-based Common Emitter (CE)
amplifier allows us to analyze and understand the
behavior and performance of the amplifier circuit.

2. By adjusting the component values and biasing

conditions in the simulation, we can explore the effects
on the amplifier's performance, such as gain stability,
distortion levels, and input/output impedance matching.

3. Overall, the simulation of a BJT-based CE amplifier offers

a powerful tool for designing, analyzing, and optimizing
amplifier circuits, providing engineers and designers
 with valuable insights before implementing the circuit in
practical applications.

Result-
Stimulated a BJT based common emitter (CE) amplifier using
LTspice software.