Professional Documents
Culture Documents
RT8223L Richtek
RT8223L Richtek
RT8223LZQW RT8223MZQW
EP : Product Code EQ : Product Code
EP YM YMDNN : Date Code EQ YM YMDNN : Date Code
DNN DNN
Pin Configurations
(TOP VIEW)
UGATE1
UGATE1
PHASE1
PHASE1
LGATE1
LGATE1
PGOOD
PGOOD
BOOT1
BOOT1
VOUT1
VOUT1
24 23 22 21 20 19 24 23 22 21 20 19
ENTRIP1 1 18 NC ENTRIP1 1 18 ENC
FB1 2 17 VREG5 FB1 2 17 VREG5
REF 3 16 VIN REF 3 16 VIN
GND GND
TONSEL 4 15 GND TONSEL 4 15 GND
FB2 5 25 14 SKIPSEL http://www.DataSheet4U.net/
FB2 5 25 14 SKIPSEL
ENTRIP2 6 13 EN ENTRIP2 6 13 EN
7 8 9 10 11 12 7 8 9 10 11 12
VOUT2
BOOT2
VREG3
UGATE2
VOUT2
BOOT2
PHASE2
LGATE2
VREG3
UGATE2
PHASE2
LGATE2
VIN
6V to 25V
R8
C1 3.9 RT8223L R10 C13 C12
10µF 0 Q2 10µF 10µF
16 VIN UGATE2 10 BSC119
C10
0.1µF 9 0 N03S
BOOT2
RBOOT2
C11 L2
Q1 R4 0 21 UGATE1 0.1µF 4.7µH VOUT2
BSC119 PHASE2 11 3.3V
N03S RBOOT1 0 Q4
22 BOOT1 LGATE2 12 BSC119 R11 C17
220µF
L1 C2 GND 15 N03S
6.8µH 0.1µF C14
VOUT1 20 PHASE1
5V VOUT2 7
C3 Q3 19 LGATE1
R5 5 C21
220µF BSC119 FB2 R14
RILIM1 6.5k
C4 N03S 150k
ENTRIP1 1 C20
24 VOUT1 R15 0.1µF
RILIM2
150k 10k
C18 R12 6
ENTRIP2
15k
2 FB1 25 (Exposed Pad)
GND
C19 VREF 3 REF
0.1µF R13
10k 2V C15
0.22µF
VREG5 17 5V Always On
4 TONSEL C9
Frequency Control 4.7µF R6
14 SKIPSEL 100k
PWM/DEM/Ultrasonic PGOOD 23 PGOOD Indicator
ON 13 EN VREG3 8 3.3V Always On
C16
OFF 4.7µF
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VIN
6V to 25V
R8
C1 3.9 RT8223M R10 C13 C12
10µF 0 Q2 10µF 10µF
16 VIN UGATE2 10 BSC119
C10
0.1µF 9 0 N03S
BOOT2
RBOOT2
C11 L2
Q1 R4 0 21 UGATE1 0.1µF 4.7µH VOUT2
BSC119 PHASE2 11 3.3V
N03S 0 Q4
22 BOOT1 LGATE2 12 BSC119 R11 C17
RBOOT1 220µF
L1 C2 GND 15 N03S
6.8µH 0.1µF C14
VOUT1 20 PHASE1
5V VOUT2 7
C3 Q3 19 LGATE1
R5 5 C21
220µF BSC119 FB2 R14
RILIM1 6.5k
C4 N03S 150k
ENTRIP1 1 C20
24 VOUT1 R15 0.1µF
RILIM2
150k 10k
C18 R12 6
ENTRIP2
15k
2 FB1 25 (Exposed Pad)
GND
C19 VREF 3 REF
0.1µF R13
10k 2V C15
0.22µF
4 TONSEL VREG5 17 5V Always On
Frequency Control C9
4.7µF R6
14 SKIPSEL 100k
PWM/DEM/Ultrasonic
13 EN PGOOD 23 PGOOD Indicator
ON
VREG3 8 3.3V Always On
OFF C16
ON 18 ENC 4.7µF
OFF
9 BOOT2
according to the typical application circuits.
Upper Gate Driver Output for SMPS2. UGATE2 swings between PHASE2 and
10 UGATE2
BOOT2.
Switch Node for SMPS2. PHASE2 is the internal lower supply rail for the
11 PHASE2 UGATE2 high side gate driver. PHASE2 is also the current-sense input for the
SMPS2.
Lower Gate Driver Output for SMPS2. LGATE2 swings between GND and
12 LGATE2
VREG5.
Master Enable Input. The REF/VREG5/VREG3 are enabled if it is within logic
13 EN
high level and disabled if it is less than the logic low level.
Operation Mode Selectable Input.
Connect to VREG5 or VREG3 : Ultrasonic Mode
14 SKIPSEL
Connect to REF : PWM Mode
Connect to GND : DEM Mode
16 VIN Supply Input for 5V/3.3V LDO and Feed Forward On-Time circuitry.
5V Linear Regulator Output. VREG5 is also the supply voltage for the lower gate
17 VREG5
driver and analog supply voltage for the device.
NC
No Internal Connection.
(RT8223L)
18
ENC SMPS Enable Input. Pull up to VREG3 or VREG5 to turn on both switch channels.
(RT8223M) Short to GND to shutdown them.
Lower Gate Driver Output for SMPS1. LGATE1 swings between GND and
19 LGATE1
VREG5.
To be continued
www.richtek.com DS8223L/M-04 April 2011
4
BOOT1
BOOT2
UGATE1
UGATE2
PHASE1
VREG5 PHASE2
VREG5
SMPS1
LGATE1 SMPS2
PWM Buck
VREG5 PWM Buck LGATE2
Controller
Controller VREG5
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10µA
FB1 10µA
ENTRIP1 VOUT2
FB2
ENTRIP2
EN Power-On
Sequence PGOOD
ENC Clear Fault Latch
Thermal
Shutdown
VREG5 VREG3
VIN
REF
To be continued
DS8223L/M-04 April 2011 www.richtek.com
7
5 -- -- μA
UVLO
VREG5 Under Voltage Rising Edge -- 4.2 4.45
V
Lockout Threshold Falling Edge 3.7 3.9 4.1
VREG3 Under Voltage
SMPSx off -- 2.5 -- V
Lockout Threshold
Power Good
PGOOD Detect, FBx falling Edge 82 85 88
PGOOD Threshold Hysteresis, Rising Edge with SS Delay %
-- 6 --
Time
PGOOD Propagation
Falling Edge, 50mV Overdrive -- 10 -- μs
Delay
PGOOD Leakage Current High State, Forced to 5.5V -- -- 1 μA
PGOOD Output Low
ISINK = 4mA -- -- 0.3 V
Voltage
Fault Detection
Over Voltage Protection
VFB_OVP OVP Detect, FBx Rising Edge 109 112 116 %
Trip Threshold
Over Voltage Protection
FBx = 2.35V -- 5 -- μs
Propagation Delay
Under Voltage Protection
VFB_UVP UVP Detect, FBx Falling Edge 49 52 56 %
Trip Threshold
To be continued
www.richtek.com DS8223L/M-04 April 2011
8
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Efficiency (%) 1
Efficiency (%) 1
70 Ultrasonic Mode 70
60 60 Ultrasonic Mode
50 PWM Mode 50
40 40 PWM Mode
30 30
20 VIN = 12V
20
TONSEL = GND, EN = FLOATING,
10 VIN = 8V, TONSEL = GND, EN = FLOATING, 10
VENTRIP1 = 1.5V, VENTRIP2 = 5V VENTRIP1 = 1.5V, VENTRIP2 = 5V
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)
VOUT1 Efficiency vs. Load Current VOUT2 Efficiency vs. Load Current
100 100
90 90
DEM Mode
80 DEM Mode
80
Efficiency (%) 1
Efficiency (%) 1
70 70
30 30
VIN = 20V 20
20 VIN = 8V
TONSEL = GND, EN = FLOATING, TONSEL = GND, EN = FLOATING,
10 10
VENTRIP1 = 1.5V, VENTRIP2 = 5V VENTRIP1 = 5V, VENTRIP2 = 1.5V
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)
VOUT2 Efficiency vs. Load Current VOUT2 Efficiency vs. Load Current
100 100
90 90
80 80
DEM Mode DEM Mode
Efficiency (%) 1
Efficiency (%) 1
70 70
60 Ultrasonic Mode 60
Ultrasonic Mode
50 50
PWM Mode
40 40
PWM Mode
30 30
VIN = 12V VIN = 20V
20 20
TONSEL = GND, EN = FLOATING, TONSEL = GND,EN = FLOATING,
10 10
VENTRIP1 = 5V, VENTRIP2 = 1.5V VENTRIP1 = 5V, VENTRIP2 = 1.5V
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)
VOUT1 Switching Frequency vs. Load Current VOUT1 Switching Frequency vs. Load Current
220 220
PWM Mode 200 PWM Mode
200
Switching Frequency (kHz) 1
20 20
DEM Mode DEM Mode
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)
VOUT1 Switching Frequency vs. Load Current VOUT2 Switching Frequency vs. Load Current
220 280
200 PWM Mode 260 PWM Mode
Switching Frequency (kHz) 1
240
180
220
160 200
VIN = 20V VIN = 8V
140 180 TONSEL = GND, EN = FLOATING,
TONSEL = GND, EN = FLOATING, 160 VENTRIP1 = 5V, VENTRIP2 = 1.5V
120 VENTRIP1 = 1.5V, VENTRIP2 = 5V 140
100 http://www.DataSheet4U.net/
120
80 100
60 80
40 Ultrasonic Mode 60
40 Ultrasonic Mode
20
DEM Mode 20
DEM Mode
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)
VOUT2 Switching Frequency vs. Load Current VOUT2 Switching Frequency vs. Load Current
280 280
260 PWM Mode 260 PWM Mode
Switching Frequency (kHz)1
Switching Frequency (kHz)1
240 240
220 220
200 200
VIN = 12V VIN = 20V
180 180
TONSEL = GND, EN = FLOATING, TONSEL = GND, EN = FLOATING,
160 VENTRIP1 = 5V, VENTRIP2 = 1.5V 160
VENTRIP1 = 5V, VENTRIP2 = 1.5V
140 140
120 120
100 100
80 80
60 60 Ultrasonic Mode
Ultrasonic Mode
40 40
20 DEM Mode 20 DEM Mode
0 0
0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10
Load Current (A) Load Current (A)
VOUT1 Output Voltage vs. Load Current VOUT2 Output Voltage vs. Load Current
5.090 3.446
VIN = 12V, TONSEL = GND, EN = FLOATING, VIN = 12V, TONSEL = GND, EN = FLOATING,
5.084 3.440
VENTRIP1 = 1.5V, VENTRIP2 = 5V VENTRIP1 = 5V, VENTRIP2 = 1.5V
5.078
5.072 3.434
Output Voltage (V) 1
VREG5 Output Voltage vs. Output Current VREG3 Output Voltage vs. Output Current
5.006 3.358
VIN = 12V, TONSEL = GND, EN = FLOATING, VIN = 12V, TONSEL = GND, EN = FLOATING,
VENTRIP1 = VENTRIP2 = 5V VENTRIP1 = VENTRIP2 = 5V
5.000 3.354
Output Voltage (V) 1
3.350
4.994
3.346
4.988
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3.342
4.982
3.338
4.976 3.334
4.970 3.330
0 20 40 60 80 100 0 10 20 30 40 50 60 70
Output Current (mA) Output Current (mA)
Reference Voltage vs. Output Current Battery Current vs. Input Voltage
2.0080 100.0
VIN = 12V, TONSEL = GND, EN = FLOATING, No Load
2.0072 VENTRIP1 = VENTRIP2 = 5V
Reference Voltage (V) 1
2.0056
10.0
2.0048
2.0040 Ultrasonic Mode
2.0032
1.0
2.0024
2.0016 DEM Mode
Standby Input Current vs. Input Voltage Shutdown Input Current vs. Input Voltage
250 22
21
249
20
248 19
247 18
17
246
16
245 15
14
244
13
243 12
242 11
No Load, 10
241
EN = FLOATING, VENTRIP1 = VENTRIP2 = 5V 9 No Load, EN = GND, VENTRIP1 = VENTRIP2 = 5V
240 8
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Input Voltage (V) Input Voltage (V)
2.008
Reference Voltage (V) 1
2.005
VREG5
(5V/Div)
2.002 VREG3
(2V/Div)
1.999
1.996 http://www.DataSheet4U.net/
REF
1.993 (2V/Div)
1.990
VIN = 12V, VENTRIP1 = VENTRIP2 = 5V,
EN No Load, VIN = 12V, TONSEL = GND,
1.987 (2V/Div)
EN = FLOATING, TONSEL = GND EN = FLOATING, VENTRIP1 = VENTRIP2 = 5V
1.984
-50 -25 0 25 50 75 100 125 Time (400μs/Div)
Temperature (°C)
PGOOD
PGOOD (5V/Div)
(5V/Div)
VIN = 12V, TONSEL = GND,
ENC ENC SKIPSEL = REF, EN = FLOATING,
VIN = 12V, TONSEL = GND,
(5V/Div) SKIPSEL = REF, EN = FLOATING, (5V/Div)
VENTRIP1 = VENTRIP2 = 1.5V, VENC = 5V VENTRIP1 = VENTRIP2 = 1.5V, VENC = 5V
VOUT1 VOUT1
(2V/Div) (2V/Div)
PGOOD PGOOD
(5V/Div) (5V/Div)
VOUT2
(2V/Div)
VOUT2
(2V/Div)
PGOOD http://www.DataSheet4U.net/
PGOOD
(5V/Div) (5V/Div)
VOUT1 PWM Mode Load Transient Response VOUT2 PWM Mode Load Transient Response
VOUT1_AC VOUT2_AC
(50mV/Div) (50mV/Div)
Inductor Inductor
Current Current
(5A/Div) (5A/Div)
UGATE1 UGATE2
(20V/Div) (20V/Div)
VIN = 12V, TONSEL = GND, VIN = 12V, TONSEL = GND,
LGATE1 LGATE2
(5V/Div) (5V/Div)
EN = FLOATING, SKIPSEL = REF, IOUT1 = 0A to 6A EN = FLOATING, SKIPSEL = REF, IOUT2 = 0A to 6A
OVP UVP
No Load, VIN = 12V, TONSEL = GND, VIN = 12V, TONSEL = GND,
EN = FLOATING, SKIPSEL = GND EN = FLOATING,
SKIPSEL = REF
VOUT1
VOUT1 (5V/Div)
(2V/Div)
PGOOD
(5V/Div)
VOUT2 UGATE1
(2V/Div) (20V/Div)
PGOOD LGATE1
(5V/Div) (5V/Div)
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PWM Operation board resistance) and the dead time effect. These effects
The Mach ResponseTM DRVTM mode controller relies on are the largest contributors to the change in frequency
the output filter capacitor's effective series resistance with changing load current. The dead-time effect increases
(ESR) to act as a current sense resistor, so the output the effective on-time by reducing the switching frequency
ripple voltage provides the PWM ramp signal. Refer to the . It occurs only in PWM mode (SKIPSEL= REF) when
RT8223L/M's function block diagram, the synchronous the inductor current reverses at light or negative load
high side MOSFET will be turned on at the beginning of currents. With reversed inductor current, the inductor's
each cycle. After the internal one-shot timer expires, the EMF causes PHASEx to go high earlier than normal, thus
MOSFET will be turned off. The pulse width of this one extending the on-time by a period equal to the low-to-
shot is determined by the converter's input voltage and high dead time. For loads above the critical conduction
the output voltage to keep the frequency fairly constant point, the actual switching frequency is :
over the input voltage range. Another one shot sets a f = (VOUT + VDROP1) / (tON × (VIN + VDROP1 − VDROP2 ))
minimum off-time (300ns typ.). The on-time one shot will
be triggered if the error comparator is high, the low side where VDROP1 is the sum of the parasitic voltage drops in
switch current is below the current limit threshold, and the inductor discharge path,which includes the
the minimum off-time one shot has timed out. synchronous rectifier, inductor, and PC board resistances.
VDROP2 is the sum of the resistances in the charging path,
PWM Frequency and On-Time Control and tON is the on-time.
The Mach ResponseTM control architecture runs with
pseudo constant frequency by feed-forwarding the input
allows only partial negative current when the inductor free- physical size and degraded load transient response
wheeling current becomes negative. As the load current (especially at low input-voltage levels).
is further decreased, it takes longer and longer to discharge
Ultrasonic Mode (SKIPSEL = VREG5 or VREG3)
the output capacitor to the level that requires the next
The RT8223L/M activates an unique Diode-Emulation Mode
“ON” cycle. The on-time is kept the same as that in the
with a minimum switching frequency of 25kHz, called the
heavy-load condition. In reverse, when the output current
Ultrasonic Mode. The Ultrasonic Mode avoids audio-
increases from light load to heavy-load, the switching
frequency modulation that would otherwise be present
frequency increases to the preset value as the inductor
when a lightly loaded controller automatically skips
current reaches the continuous conduction. The transition
pulses. In Ultrasonic Mode, the high side switch gate driver
load point to the light-load operation is shown as follows
signal is OR with an internal oscillator (>25kHz). Once
(Figure 1) :
the internal oscillator is triggered, the controller enters
IL
constant off-time control. When output voltage reaches
Slope = (VIN -VOUT) / L
IL, PEAK the setting peak threshold, the controller turns on the low
side MOSFET until the controller detects that the inductor
current dropped has below the zero-crossing threshold.
ILoad = IL, PEAK / 2 The internal timer provides a constant off-time control and
it is effective to regulate the output voltage under light
load conditions.
t
0
TON
Figure 1. Boundary Condition of CCM/DEM
100mA for internal and external loads, including the at room temperature. The current source has a 4700ppm/
MOSFET gate driver and PWM controller. The VREG3 °C temperature slope to compensate the temperature
regulator supplies up to 100mA for external loads. Bypass dependency of the RDS(ON). When the voltage drop across
VREG5 and VREG3 with a minimum 4.7μF ceramic the sense resistor or low side MOSFET equals 1/10 the
capacitor. voltage across the RILIMX resistor, positive current limit
When the 5V main output voltage is above the VREG5 will be activated. The high side MOSFET will not be turned
switch over threshold (4.75V), an internal 1.5Ω P-Channel on until the voltage drop across the MOSFET falls below
MOSFET switch connects VOUT1 to VREG5, while 1/10 the voltage across the RILIMX resistor.
simultaneously shutting down the VREG5 linear regulator. Choose a current limit resistor by following equations
Similarly, when the 3.3V main output voltage is above the
VILIMx = (RILIMx x10μA)/10 = IILIMx x RDS(ON)
VREG3 switch over threshold (3.125V), an internal 1.5Ω
P-Channel MOSFET switch connects VOUT2 to VREG3, RILIMx = (IILIMx x RDS(ON)) x 10/10μA
while simultaneously shutting down the VREG3 linear Carefully observe the PC board layout guidelines to ensure
regulator. It can decrease the power dissipation from the that noise and DC errors do not corrupt the current-sense
same battery, because the converted efficiency of SMPS signal at PHASEx and GND. Mount or place the IC close
is better than the converted efficiency of the linear to the low side MOSFET.
regulator.
MOSFET Gate Driver (UGATEx, LGATEx)
Current-Limit Setting (ENTRIPx) The high side driver is designed to drive high-current, low
The RT8223L/M has a cycle-by-cycle current-limit control. RDS(ON) N-MOSFET(s). When configured as a floating driver,
The current-limit circuit employs an unique “valley” current a 5V bias voltage is delivered from the VREG5 supply.
The low side driver is designed to drive high current, low PGOOD is an open-drain type output and requires a pull-
RDS(ON) N-MOSFET(s). The internal pull-down transist or up resistor. PGOOD is actively held low in soft-start,
that drives LGATEX low is robust, with a 1.5Ω typical on- standby, and shutdown. It is released when both output
resistance. A 5V bias voltage is delivered from the VREG5 voltages are above 91% of the nominal regulation point.
supply. The instantaneous drive current is supplied by an The PGOOD goes low if either output turns off or is 15%
input capacitor connected between VREG5 and GND. below its nominal regulator point.
For high current applications, some combinations of high Output Over Voltage Protection (OVP)
and low side MOSFETs might be encountered that will The output voltage can be continuously monitored for over
cause excessive gate-drain coupling, which can lead to voltage. If the output voltage exceeds 12% of its set voltage
efficiency killing, EMI-producing shoot-through currents. threshold, the over voltage protection is triggered and the
This can be remedied by adding a resistor in series with LGATEx low side gate drivers are forced high. This activates
BOOTx, which increases the turn-on time of the high side the low side MOSFET switch, which rapidly discharges
MOSFET without degrading the turn-off time (Figure 3). the output capacitor and pulls the input voltage downward.
VIN The RT8223L/M is latched once OVP is triggered and can
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“>2.4V”
Low X X On On On Off Off
=> High
“>2.4V” “>2V”
Off Off On On On Off Off
=> High => High
“>2.4V” “>2V”
Off On On On On Off On
=> High => High
“>2.4V” “>2V”
On Off On On On On Off
=> High => High
“>2.4V” “>2V”
On On On On On On On
=> High => High
Output Voltage Setting (FBx) where LIR is the ratio of the peak to peak ripple current to
Connect a resistor voltage-divider at the FBx pin between the average inductor current.
VOUTx and GND to adjust the respective output voltage Find a low-loss inductor having the lowest possible DC
between 2V and 5.5V (Figure 4). Referring to Figure 4 as resistance that fits in the allotted dimensions. Ferrite cores
an example, choose R2 to be approximately 10kΩ, and are often the best choice, although powdered iron is
solve for R1 using the equation : inexpensive and can work well at 200kHz. The core must
⎛ ⎛ R1 ⎞ ⎞ be large enough not to saturate at the peak inductor current
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VOUTX = VFBX × ⎜ 1 + ⎜ ⎟⎟
⎝ ⎝ R2 ⎠ ⎠ (IPEAK) :
where VFBX is 2V. IPEAK = ILOAD(MAX) + ⎡⎣(LIR/2) × ILOAD(MAX) ⎤⎦
0.6
Thermal Considerations
For continuous operation, do not exceed absolute 0.3
package, PCB layout, rate of surrounding airflow, and Ambient Temperature (°C)
difference between junction and ambient temperature. The Figure 5. Derating Curve for the RT8223L/M Package
maximum power dissipation can be calculated by the
following formula : Layout Considerations
Layout is very important in high frequency switching
PD(MAX) = (TJ(MAX) − TA) / θJA
converter designs, the PCB could radiate excessive noise
where TJ(MAX) is the maximum junction temperature, TA is and contribute to the converter instability with improper
the ambient temperature, and θJA is the junction to ambient layout. Certain points must be considered before starting
thermal resistance. a layout using the RT8223L/M.
For recommended operating condition specifications of ` Place the filter capacitor close to the IC, within 12mm
the RT8223L/M, the maximum junction temperature is (0.5 inch) if possible.
125°C and TA is the ambient temperature. The junction to http://www.DataSheet4U.net/
D2 SEE DETAIL A
D
L
1
E E2
1 1
e b 2 2
A
A3 DETAIL A
A1 Pin #1 ID and Tie Bar Mark Options
0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.180 0.300 0.007 0.012
D 3.950 4.050 0.156 0.159
D2 2.300 2.750 0.091 0.108
E 3.950 4.050 0.156 0.159
E2 2.300 2.750 0.091 0.108
e 0.500 0.020
L 0.350 0.450 0.014 0.018
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit
design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be
guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.