micromachines
Article
Investigation of a 4H-SiC Trench MOSFET with Back-Side
Super Junction
Lili Zhang 1 , Yuxuan Liu 1 , Junpeng Fang 2 and Yanjuan Liu 1, *
Citation: Zhang, L.; Liu, Y.; Fang, J.;
Liu, Y. Investigation of a 4H-SiC
Trench MOSFET with Back-Side
Super Junction. Micromachines 2022,
13, 1770. https://doi.org/10.3390/
mi13101770
Academic Editor: Andrea N.
Tallarico
Received: 28 September 2022
Accepted: 17 October 2022
Published: 18 October 2022
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4.0/).
Micromachines 2022, 13, 1770. https://doi.org/10.3390/mi13101770
1 College of Electronic and Information Engineering, Shenyang Aerospace University, Shenyang 110136, China
2 School of Integrated Circuits, Tsinghua University, Beijing 100084, China
* Correspondence: liuyanjuan@hrbeu.edu.cn
Abstract: In this paper, a 4H-SiC trench gate MOSFET, featuring a super junction layer located on the
drain-region side, is presented to enhance the breakdown voltage and the figures of merit (FOM).
The proposed structure is investigated and compared with the conventional structure with a 2D
numerical simulator—ATLAS. The investigation results have demonstrated that the breakdown
voltage in the proposed structure is enhanced by 21.2%, and the FOM is improved by 39.6%. In
addition, the proposed structure has an increased short-circuit capability.
Keywords: UMOS; breakdown voltage; FOM
1. Introduction
Since the silicon carbide trench-gate metal oxide semiconductor field effect transistor
(UMOSFET) was first reported in 1994 [1], researchers have paid significant attention to it
due to the excellent material properties of SiC, including a higher critical electric field, a
wider band gap and a higher electron saturation drift velocity, compared to silicon [2,3].
However, this reported structure has a serious problem because it cannot reflect the ad-
vantage of the silicon carbide material in the withstand voltage, owing to a high electric
field existing in the corner of the trench gate oxide [4,5]. In order to overcome this problem,
B. J. Baliga proposed a novel UMOSFET incorporated with a P+ shielding region at the
bottom of the trench gate [6], which is used to protect the gate oxide from a high electric
field. However, at the same time, this also increases the specific on-resistance and power
loss of the device by introducing a parasitic JFET region, composed of the p-body, n-drift
and P+ shielding region.
Since then, more research has been done on how to reduce the specific on-resistance
and increase the breakdown voltage of the UMOSFET devices. The research findings
show that there exists a tradeoff between the specific on-resistance and breakdown voltage.
Particularly, the figures of merit (FOM) is utilized to indicate the compromise between the
two performances, which is defined as FOM = BV2 /Ron,sp . Moreover, based on the existing
literature, there are two domination ways used to improve the device’s performances. One
is to adopt a new structure [7–18], with a mechanism that reduces the JFET resistance. The
other is adopting a new fabrication process for the gate oxide [19–25], which increases the
channel’s electron mobility to achieve a reduction in the resistance. In this paper, a new
trench gate MOSFET is investigated to improve the electrical characteristics of the device.
A 4H-SiC trench gate MOSFET with a back-side super junction layer (called as BSJ-
UMOS) is investigated. Compared with a conventional trench gate, MOSFET (C-UMOS), the
BSJ-UMOS has a p-type region on the drain-region side, forming a floating super junction,
which modulates the electric field in the N-drift region and introduces an exact peak electric
field at the p-pillar/n+ substrate region junction. A comparative study between BSJ-UMOS
and C-UMOS is conducted in this paper based on a 2D numerical simulator—ATLAS [26]. This
paper is organized as follows. The parameters related to the device structure and simulation
https://www.mdpi.com/journal/micromachines
 between BSJ-UMOS and C-UMOS is conducted in this paper based on a 2D numerical
simulator—ATLAS [26]. This paper is organized as follows. The parameters related to the
Micromachines 2022, 13, 1770 device structure and simulation condition are presented in Section 2. Section 3 presents 2 of 12
an analysis and discussion on the simulation results. Finally, we draw a conclusion in
Section 4.
Note that
condition due to the in
are presented limitation of our
Section 2. present
Section experimental
3 presents conditions,
an analysis we are unable
and discussion on the
to provide results.
simulation experimental
Finally,results,
we drawand the simulation
a conclusion tools
in Section 4. are generally used for the
optimization
Note that and
duedevelopment of various
to the limitation semiconductor
of our present device
experimental structures,
conditions, weinare
order to
unable
reduce the cost
to provide of the device
experimental manufacturability
results, and development
and the simulation period and,
tools are generally usedhence, lower
for the opti-
the risk ofand
mization technology transfer
development in an industrial
of various environment.
semiconductor Moreover, in
device structures, simulation tools
order to reduce
are
thevery
cost useful to explore
of the device the novel device
manufacturability architectural
and development concept
periodfor systems
and, hence,with
lowerdifferent
the risk
of technology
materials. transfer
So, the aim ofintheansimulation
industrial work
environment. Moreover,
is to compare simulation
the electrical tools are very
characteristics of
useful
two to explore
different the novel
structures ondevice architectural
the same terms, whileconcept
not for systemsthe
revealing with different
physical materi-
devices’
als. So, the aim of the simulation work is to compare the electrical characteristics of two
features.
different structures on the same terms, while not revealing the physical devices’ features.
2. Device Structure and Simulation Setup
2. Device Structure and Simulation Setup
The 4H-SiC UMOS with a back-side super junction layer (BSJ-UMOS) is as shown in
FigureThe1b.4H-SiC
The driftUMOS
regionwith a back-sideconsists
of BSJ-UMOS super junction layerwhich
of two parts, (BSJ-UMOS) is as shown
are an N-drift region in
Figure
and 1b. The
a super drift region
junction of BSJ-UMOS
layer, composed consists
of the of and
p-pillar two n-pillar.
parts, which are anjunction
The super N-drift region
layer
and a super junction layer, composed of the p-pillar and n-pillar.
forms extra PN junctions on the drain-region side. As a result, a new electric The super junction layer
field peak
forms extra PN junctions on the drain-region side. As a result, a new electric
comes into being, which can modulate the original electric field distribution and improve field peak
comes into being,
the breakdown voltage. which can modulate the original electric field distribution and improve
the breakdown voltage.

x source source
0 p+ n+ p+ n+
y p-body p-body
gate gate

source source

P+ shielding P+ shielding

N-drift
N-drift

p-pillar n-pillar

n+ substrate n+ substrate

drain drain
(a) (b)
Cross-sectionalschematic
Figure1.1.Cross-sectional
Figure schematicof
ofaahalf-cell
half-cellin
in(a)
(a)C-UMOS
C-UMOSand
and(b)
(b)BSJ-UMOS.
BSJ-UMOS.

Figure1a
Figure 1ashows
showsaacross-sectional
cross-sectionalschematic
schematicofofthe
theconventional
conventionalUMOS
UMOS(C-UMOS).
(C-UMOS).
Note that all the simulation parameters of the two structures are identical, except
Note that all the simulation parameters of the two structures are identical, except that there
that
is an extra PN junction at the back side of the proposed structure. The gate
there is an extra PN junction at the back side of the proposed structure. The gateoxide thickness
oxide
is 50 nm. The other simulation parameters are presented in Table 1.
thickness is 50 nm. The other simulation parameters are presented in Table 1.
A possible fabrication process for BSJ-UMOS is shown in Figure 2. The key fabrication
steps are as follows: (a) forming the n-pillar layer on the n+ wafer by epitaxial growth
technology; (b) forming the p-pillar layer by ion implantation; (c) growing the n-drift
layer by epitaxial growth technology; (d) forming the p-body layer by epitaxial growth
technology and growing the P+ contact region and n+ source region by ion implantation;
(e) forming the trench gate structure with the mature silicon carbide fabrication process;
(f) metalizing all contacts and forming the gate, source, and drain electrodes. Compared
with C-UMOS, such fabrication of BSJ-UMOS would be more complex, as it requires two
extra process steps—growing the epitaxial n-pillar layer on the n+ substrate and forming
the p-pillar layer via ion implantation.
 Width of trench gate (m) 1.0 1.0
Depth of trench gate (m) 2.5 2.5
Concentration of P+ shielding region (cm−3) 1.0 × 1018 1.0 × 1018
Concentration of N-drift region (cm−3) 4.0 × 1015 4.0 × 1015
Micromachines 2022, 13, 1770 Thickness of N-drift region (m) 11.2 8.2 3 of 12
Concentration of p-pillar (cm−3) - 5 × 1016
Thickness of p-pillar region (m) - 3
Width of
Table 1. Structural p-pillar region
parameters (m)
of the simulated devices. - 1
Concentration of n-pillar region (cm−3) - 1 × 1016
Parameters
Thickness of n-pillar region (m) C-UMOS
- BSJ-UMOS
3
Concentration of n+/p+region
Width of n-pillar (cm−3 )
region (m) 1.0- × 10 19 2 × 10 19
1.0
Concentrationofofn+
Concentration p-body region
substrate (cm−3(cm
region ) −3) 11.0
× 10×1910 17 1 ×1.010×1910
17

Thickness of p-body region (µm) 0.6 0.6

Width of a half cell (m) 3 3
Width of trench gate (µm) 1.0 1.0
Depth of trench gate (µm) 2.5 2.5
A possibleoffabrication
Concentration P+ shieldingprocess
region (cm for−3 )BSJ-UMOS1.0 ×is10shown
18 in Figure
1.0 ×2.10 The
18 key
fabrication steps are as follows: (a)
Concentration of N-drift region (cm ) − 3
forming the n-pillar 15
layer
4.0 × 10 on the n+ wafer by
4.0 × 10 15
epitaxial
Thickness of N-drift
growth technology; regionthe
(b) forming (µm)p-pillar layer by ion 11.2 8.2
implantation; (c) growing the n-
−3 ) - × 16
drift layer by epitaxial growth technology; (d) forming the p-body layer 10
Concentration of p-pillar (cm 5 by epitaxial
growth Thickness
technology of p-pillar region (µm)
and growing the P+ contact region -
and n+ source region 3
by ion
Width of p-pillar region (µm) - 1
implantation; (e) forming the trench
Concentration of n-pillar region (cm−3 )
gate structure with
-
the mature silicon
1 × 10 16
carbide
fabrication process;
Thickness (f) metalizing
of n-pillar region (µm) all contacts and forming - the gate, source,3 and drain
electrodes.Width
Compared
of n-pillarwith
regionC-UMOS,
(µm) such fabrication- of BSJ-UMOS would 2 be more
complex, as it requires
Concentration two extra
of n+ substrate region (cm−3 )steps—growing
process 1 × 10 19the epitaxial n-pillar
1 × 10 19layer on
Widthand
the n+ substrate of aforming
half cell (µm) 3
the p-pillar layer via ion implantation. 3

n-drift

n-pillar p-pillar n-pillar p-pillar n-pillar

n+ substrate n+ substrate n+ substrate

(a) (b) (c)
source gate source
p+ p+ p+ + p+ n+ n+ p
+
n+ n+ n+ p
p-body p-body p-body p-body p-body

P+ shielding P+ shielding

n-drift n-drift n-drift

p-pillar p-pillar p-pillar n-pillar

n-pillar n-pillar

n+ substrate n+ substrate n+ substrate

drain
(d) (e) (f)

Figure 2.2.AApossible
Figure fabrication
possible process
fabrication for BSJ-UMOS
process (a) growth
for BSJ-UMOS of the n-pillar
(a) growth of the layer on n+
n-pillar substrate
layer on n+
(b) growth(b)
substrate of the p-pillar
growth layer
of the by ionlayer
p-pillar implantation (c) growth of (c)
by ion implantation thegrowth
n-drift layer
of the(d) growth
n-drift of the
layer (d)
growthn+
p-body, of source
the p-body,
and p+n+ source
contact and p+
regions (e) contact
formingregions (e)gate
the trench forming the (f).
structure trench gate structure
metalizing (f).
all contacts.
metalizing all contacts
In this paper, the electrical characteristics of the proposed device are investigated in
detail, with a 2D numerical simulator—ATLAS. Since the simulated n-channel IGBT is
calibrated with an experimental IGBT [26] device in [27], and these physical models have
earlier been applied for 4H-SiC devices [28,29], the simulation is conducted with the same
physical models and parameters as [27]. During the simulation, the following models are
considered: a bandgap narrowing model (BGN), AUGER and Shockley-Read-Hall (SRH)
for recombination and carrier lifetime models and doping- and temperature-dependent
field mobility models (ANALYTIC) [30]. Moreover, all simulations are carried out using
Fermi Dirac statistics, and Selberherr’s impact ionization model is also utilized [30]. During
the simulation, the carrier lifetime in the drift region is set to 1µs, and the channel inversion
mobility is 30 cm2 /V·s.

3. Analysis and Discussion of Simulation Results

In this section, a comparative investigation between BSJ-UMOS and C-UMOS is carried
out for the on-state, off-state and short-circuit performances. The effect of the p-pillar’s
parameters on the electrical characteristics is presented in depth.
 inversion mobility is 30 cm2/V·s.

3. Analysis and Discussion of Simulation Results

In this section, a comparative investigation between BSJ-UMOS and C-UMOS is
Micromachines 2022, 13, 1770
carried out for the on-state, off-state and short-circuit performances. The effect of the p-
4 of 12
pillar’s parameters on the electrical characteristics is presented in depth.

3.1. On and Off Characteristics

3.1. On and Off Characteristics
The comparison of the I-V characteristic between BSJ-UMOS and C-UMOS is shown
The comparison
in Figure of theatI-V
3. The I-V curves Vgscharacteristic
= 8 V at the lowbetween
drainBSJ-UMOS
voltage areand alsoC-UMOS
given in is
theshown
inset
in Figure 3. The I-V curves at V gs = 8 V at the low drain voltage are
of Figure 3. From this graph, it can be seen that the forward conduction performance also given in the inset
of
of Figure 3.isFrom
BSJ-UMOS thisdegraded.
slightly graph, it can be=seen
At Jds that the
100 A/cm 2 andforward
V conduction performance of
gs = 8 V, the specific on-resistance
BSJ-UMOS
R is slightly degraded. At J and
on,sp is 3.57 mΩ·cm2 for BSJ-UMOS ds
= 100 A/cm2about
increases and V4.08%
gs = 8 compared
V, the specific on-resistance
with that for C-
2
Ron,sp is 3.57 mΩ·cm2 for BSJ-UMOS and increases about 4.08% compared with that for
UMOS (3.43 mΩ·cm ). The main factor responsible for this is that the existence of the p-
C-UMOS (3.43 mΩ·cm2 ). The main factor responsible for this is that the existence of the
pillar region forms a depletion layer in the n-pillar region and narrows down the current
p-pillar region forms a depletion layer in the n-pillar region and narrows down the current
flow path. The distribution of the current flowlines in the two structures is shown in
flow path. The distribution of the current flowlines in the two structures is shown in
Figure 4. The bold red lines represent the depletion layer border, indicating that the
Figure 4. The bold red lines represent the depletion layer border, indicating that the current
current flow path close to the drain region is reduced in BSJ-UMOS.
flow path close to the drain region is reduced in BSJ-UMOS.

Micromachines 2022, 13, x FOR PEER REVIEW 5 of 13

Figure 3.
Figure Comparison of
3. Comparison of I-V
I-V characteristic
characteristic curves.
curves.

source source
p-body p-body
gate gate Current Flowlines
1
0.889
0.778
0.667
N-drift 0.556
N-drift
0.444
0.333
p-pillar n-pillar 0.222
0.111
n+ substrate n+ substrate 0
drain drain
(a) (b)

Figure
Figure 4. Distributions
4. Distributions of of current
current flowlines
flowlines Jds J=ds100
at at = 100
A/cm2 in 2
A/cm inC-UMOS
(a) (a) C-UMOS
and and (b) BSJ-UMOS.
(b) BSJ-UMOS

The
The transfer
transfer characteristic
characteristic VdsV=ds1.0
at at = 1.0 V for
V for BSJ-UMOS
BSJ-UMOS andand C-UMOS
C-UMOS is presented
is presented in in
the inset of Figure 5. Obviously, the two structures have the same threshold voltage,
the inset of Figure 5. Obviously, the two structures have the same threshold voltage, about about
5.05.0
V.V. Moreover,
Moreover, it it
cancanbebe seen
seen that
that BSJ-UMOS
BSJ-UMOS hashas a weak
a weak current
current drive
drive capability
capability because
because
of the introduction of the p-pillar region, which narrows down the current
of the introduction of the p-pillar region, which narrows down the current flow path. flow path.
 Figure 4. Distributions of current flowlines at Jds = 100 A/cm2 in (a) C-UMOS and (b) BSJ-UMOS

The transfer characteristic at Vds = 1.0 V for BSJ-UMOS and C-UMOS is presented in
the inset of Figure 5. Obviously, the two structures have the same threshold voltage, about
Micromachines 2022, 13, 1770 5 of 12
5.0 V. Moreover, it can be seen that BSJ-UMOS has a weak current drive capability because
of the introduction of the p-pillar region, which narrows down the current flow path.

Figure 5.
Figure Comparisons of
5. Comparisons of transfer
transfer and
and breakdown
breakdown characteristics.
characteristics.

The breakdown
The breakdowncharacteristic
characteristicis isshown
shown in in Figure
Figure 5. The
5. The breakdown
breakdown voltage
voltage is 1515is
1515 and 1250 V for BSJ-UMOS and C-UMOS, respectively. The
and 1250 V for BSJ-UMOS and C-UMOS, respectively. The breakdown voltage of BSJ- breakdown voltage of
BSJ-UMOS
UMOS is enhanced
is enhanced by by 21.2%.
21.2%. ThisThis
is is duetotothe
due theintroduction
introduction ofof the
the p-pillar/n-pillar
p-pillar/n-pillar
junction, which modulates the electric field in the drift region.
junction, which modulates the electric field in the drift region. Figure Figure 6 describes the electric
6 describes the
field distribution in BSJ-UMOS and C-UMOS at V gs = 0 V and
electric field distribution in BSJ-UMOS and C-UMOS at Vgs = 0 V and Vds = BV. TheV ds = BV. The back-side
back-
super
side junction,
super composed
junction, of theofp-pillar
composed and n-pillar
the p-pillar region,region,
and n-pillar has twohaseffects on the electric
two effects on the
field.
Micromachines 2022, 13, x FOR PEER REVIEW One is that the electric field in the drift region of BSJ-UMOS is more well-distributed
electric field. One is that the electric field in the drift region of BSJ-UMOS is more6 well- of 13
than in C-UMOS. The other is that there is an additional peak electric field at the p-pillar/n+
distributed than in C-UMOS. The other is that there is an additional peak electric field at
substrate junction. These two factors result in the enhancement of the breakdown voltage.
the p-pillar/n+ substrate junction. These two factors result in the enhancement of the
breakdown
A source voltage. B source
p-body p-body
gate gate Electric field (V/cm)
3.31×106
C C’ 2.76×106
2.39×106
N-drift
2.02×106
N-drift D D’ 1.65×106
1.29×106
p-pillar n-pillar 9.19×105
5.51×105
E E’ 1.84×105
n+ substrate n+ substrate 0

A’ drain B’ drain
(a) (b)

Figure 6.
Figure Electric field
6. Electric field distributions
distributions at Vgsgs==0 0VVand
at V andVV
dsds
= BV
= BV in in
(a)(a) C-UMOS
C-UMOS and
and (b)(b) BSJ-UMOS.
BSJ-UMOS.

Figure 7 shows a comparison of the electric field distribution of BSJ-UMOS and

Figure 7 shows a comparison of the electric field distribution of BSJ-UMOS and C-
C-UMOS in the vertical cross-section. From this graph, it can be seen that C-UMOS has
UMOS in the vertical cross-section. From this graph, it can be seen that C-UMOS has
only a peak electric field at the P+ shielding/N-drift region junction, and the electric field
only a peak electric field at the P+ shielding/N-drift region junction, and the electric field
reduces from the source to the drain side. By contrast, BSJ-UMOS has a two peak electric
reduces from the source to the drain side. By contrast, BSJ-UMOS has a two peak electric
field. One is almost the same as that of C-UMOS, and the other is at the p-pillar/n+
field. One is almost the same as that of C-UMOS, and the other is at the p-pillar/n+
substrate junction. Moreover, due to the introduction of the p-pillar/n-pillar junction, the
electric field intensity from the P+ shielding to the n+ substrate region is well-distributed
in BSJ-UMOS. In addition, these lead to an improved breakdown characteristic.
 Figure 6. Electric field distributions at Vgs = 0 V and Vds = BV in (a) C-UMOS and (b) BSJ-UMOS.

Figure 7 shows a comparison of the electric field distribution of BSJ-UMOS and C-

Micromachines 2022, 13, 1770
UMOS in the vertical cross-section. From this graph, it can be seen that C-UMOS has
only a peak electric field at the P+ shielding/N-drift region junction, and the electric 6field
of 12
reduces from the source to the drain side. By contrast, BSJ-UMOS has a two peak electric
field. One is almost the same as that of C-UMOS, and the other is at the p-pillar/n+
substrate
substrate junction.
junction. Moreover,
Moreover, due to the introduction of the p-pillar/n-pillar
p-pillar/n-pillar junction,
junction, the
the
electric field intensity from the P+ shielding to the n+ substrate region is well-distributed
electric field intensity from the P+ shielding to the n+ substrate region is well-distributed
in
in BSJ-UMOS.
BSJ-UMOS. In In addition,
addition, these
these lead
lead to
to an
an improved
improved breakdown characteristic.

Figure 7.
Figure Electric field
7. Electric field distributions
distributions of
of the
the BSJ-UMOS
BSJ-UMOS and
and C-UMOS
C-UMOS along
along the
the AA’ 0.5 m)
AA’ (x == 0.5 and
µm) and
BB’
BB’ (x 2.0m)
(x ==2.0 µm)lines,
lines,asasshown
shownininFigure
Figure5a.5a.

The electric
The electric field distribution
distribution ofof BSJ-UMOS
BSJ-UMOSand andC-UMOS
C-UMOSininthe
thelateral
lateralcross-section is
cross-section
shown in Figure 8. Due to the existence of the back-side super junction layer, the
is shown in Figure 8. Due to the existence of the back-side super junction layer, the electric electric
field in
Micromachines 2022, 13, x FOR PEER field
REVIEW in the
the lateral
lateralcross-section
cross-sectionis significantly
is significantlystrengthened, especially
strengthened, in the
especially p-pillar
in the and
p-pillar
7 of 13
n-pillar region, in which the electric field intensity is about double, effectively
and n-pillar region, in which the electric field intensity is about double, effectively improving
the breakdown
improving voltage of the
the breakdown device.
voltage of the device.

Figure Electric
Figure 8.8.Electric fieldfield distributions
distributions of BSJ-UMOS
of BSJ-UMOS and C-UMOS
and C-UMOS along
along CC’ CC’
(y = 3.4 m),
(y DD’
= 3.4
(y =µm),
6.0
m)
DD’ and
(y = EE’ (y = 11
6.0 µm) andm)EE’lines, as µm)
(y = 11 shown in Figure
lines, 5b. in Figure 5b.
as shown

Next, the
theperformance
performance of BSJ-UMOS
of BSJ-UMOSand C-UMOS
and C-UMOSin terms
in of the FOM
terms values
of the FOMis compared,
values is
which indicates
compared, theindicates
which tradeoff between the off-state
the tradeoff between characteristic
the off-state(BV) and on-state(BV)
characteristic characteristic
and on-
(Ron,spcharacteristic
). The FOM values 2 for BSJ-UMOS and C-UMOS,
state (Ron,spare 652.24
). The FOM and 467.12are
values MW/cm
652.24 and 467.12 MW/cm2 for BSJ-UMOS respec-
and C-UMOS, respectively. In addition, the FOM of BSJ-UMOS is improved by 39.6%,
which indicates the significant influence of the back-side super junction layer on the
devices’ performances.

3.2. Other Performances

 Figure 8. Electric field distributions of BSJ-UMOS and C-UMOS along CC’ (y = 3.4 m), DD’ (y = 6.0
m) and EE’ (y = 11 m) lines, as shown in Figure 5b.

Next, the performance of BSJ-UMOS and C-UMOS in terms of the FOM values is
compared, which indicates the tradeoff between the off-state characteristic (BV) and on-
Micromachines 2022, 13, 1770 7 of 12
state characteristic (Ron,sp). The FOM values are 652.24 and 467.12 MW/cm2 for BSJ-UMOS
and C-UMOS, respectively. In addition, the FOM of BSJ-UMOS is improved by 39.6%,
which indicates the significant influence of the back-side super junction layer on the
tively.
devices’In addition, the FOM of BSJ-UMOS is improved by 39.6%, which indicates the significant
performances.
influence of the back-side super junction layer on the devices’ performances.
3.2. Other Performances
3.2. Other Performances
In this section, the other performances, gate charge and capacitance, are investigated.
In this section, the other performances, gate charge and capacitance, are investigated.
Figure 9 plots the parasitic capacitance performance (input capacitance Cies and miller
Figure 9 plots the parasitic capacitance performance (input capacitance Cies and miller
capacitance Cres), indicating that the two structures have almost identical parasitic
capacitance Cres ), indicating that the two structures have almost identical parasitic capac-
capacitance when the drain voltage is lower than 60 V. However, when the drain voltage
itance when the drain voltage is lower than 60 V. However, when the drain voltage is
is larger, the BSJ-UMOS has lower miller capacitance, mainly due to the p-pillar making
larger, the BSJ-UMOS has lower miller capacitance, mainly due to the p-pillar making the
the depletion
depletion wider
wider in n-drift
in the the n-drift region,
region, as shown
as shown in Figure
in Figure 10.addition,
10. In In addition,
thisthis is due
is due to
to the
the p-pillar being accelerated the depletion of the n-drift
p-pillar being accelerated the depletion of the n-drift region. region.

Micromachines 2022, 13, x FOR PEER REVIEW 8 of 13

Figure 9. Comparisons of the parasitic capacitance in C-UMOS and BSJ-UMOS.

BSJ-UMOS.

source source
p-body p-body
gate gate

N-drift

N-drift p-pillar n-pillar

n+ substrate n+ substrate
drain drain
(a) (b)
Figure 10. Depletion
Figure 10. Depletion distributions
distributions of
of (a)
(a) C-UMOS
C-UMOS and
and (b)
(b) BSJ-UMOS at VVds
BSJ-UMOS at = 70
ds = 70 V and VVgsgs==0 0V.V.
V and

The
The gate
gate charge
chargecharacteristics
characteristicsand
andits
itstest
testcircuit
circuitare
areshown
shown inin
Figure 11.11.
Figure From
Fromthis, it
this,
can be seen that the two structures have an identical gate charge, because the gate
it can be seen that the two structures have an identical gate charge, because the gate chargecharge
is
is mainly
mainly dependent
dependent onon the
the front
front structure,
structure, and
and the
the two
two structures
structures have
have the
the same
same front
front
structure and parameters.
structure and parameters.

D
 (a) (b)
Figure 10. Depletion distributions of (a) C-UMOS and (b) BSJ-UMOS at Vds = 70 V and Vgs = 0 V.

The gate charge characteristics and its test circuit are shown in Figure 11. From this,
it can be seen that the two structures have an identical gate charge, because the gate charge
Micromachines 2022, 13, 1770 is mainly dependent on the front structure, and the two structures have the same front 8 of 12
structure and parameters.

g d

s 60 V
1M 0.1 mA
10 μA

Micromachines 2022, 13, x FOR PEER REVIEW 9 of 13

Figure
Figure 11.11. Comparisons
Comparisons of theofgate
thecharge
gate charge performances.
performances.
3.3. Parameter Influence
3.3. Parameter Influence
In this section, we investigate the effect of the concentration of the p-pillar and n-
In
pillar on this
thesection, we investigate
electrical the effect
characteristics, mainlyof the concentration
including of the p-pillar
the breakdown and specific
voltage, n-pillar
on the electrical
on-resistance and FOM.characteristics, mainly including the breakdown voltage, specific on-
resistance and FOM.
Figure 12 shows the effect of the concentration of the p-pillar and n-pillar on the BV
and R Figure 12 shows the effect of the concentration of the p-pillar and n-pillar on the BV
on,sp. As we can see from this, with the increasing of the n-pillar’s concentration, the
and R
specificon,sp . As we can see
on-resistance from
Ron,sp this, with
decreases, andthethe
increasing
breakdownof the n-pillar’s
voltage concentration,
is almost unchangedthe
specific on-resistance R on,sp
when the p-pillar’s concentration decreases, and the breakdown voltage is almost unchanged
is lower 6 × 101616 cm−−33and then increases. The increasing
when the p-pillar’s concentration
of the n-pillar’s concentration makes is lower × 10 cmlayer
the6depletion and then increases.
narrower and theThe increasing
current flow
of the n-pillar’s concentration makes the depletion layer narrower and the current flow path
path wider, leading to a reduction in Ron,sp. With the increasing of the p-pillar’s
wider, leading to a reduction in Ron,sp . With the increasing of the p-pillar’s concentration,
concentration, the BV first increases to the maximum value and then decreases, while the
the BV first increases to the maximum value and then decreases, while the Ron,sp is almost
Ron,sp is almost unchanged. This is due to the charge in the back-side super junction layer
unchanged. This is due to the charge in the back-side super junction layer being gradually
being gradually balanced and then imbalanced, with the increasing of the p-pillar’s
balanced and then imbalanced, with the increasing of the p-pillar’s concentration. As we
concentration. As we can see from Figure 13, the FOM has the same changing trend as the
can see from Figure 13, the FOM has the same changing trend as the BV, and the changing
BV, and the changing reason is also the same.
reason is also the same.

Figure 12. Effect of concentration of

of the
the p-pillar
p-pillar and
and n-pillar
n-pillar on
on the
the BV and RRon,sp
BV and on,sp. .
Micromachines 2022, 13, 1770 9 of 12

Figure 12. Effect of concentration of the p-pillar and n-pillar on the BV and Ron,sp.

Micromachines 2022, 13, x FOR PEER REVIEW 10 of 13

Figure
Figure 13.
13. Effect
Effect of
of the
the concentration
concentration of
of the
the p-pillar
p-pillar and
and n-pillar on the BV and FOM.
3.4. Charge Imbalance and Design Windows
3.4. Charge Imbalance and Design Windows
For a super junction structure, the charge imbalance is unavoidable and is a serious
For a super junction structure, the charge imbalance is unavoidable and is a serious
problem that has to be mentioned, especially for silicon carbide device processing
problem that has to be mentioned, especially for silicon carbide device processing technol-
technology. Figure 14 shows the relationship curve of the BV, Ron,sp and FOM versus the
ogy. Figure 14 shows the relationship curve of the BV, Ron,sp and FOM versus the charge
charge imbalance in BSJ-UMOS. Ideally, the highest BV can be obtained when the charge
imbalance in BSJ-UMOS. Ideally, the highest BV can be obtained when the charge is balanced.
is balanced. However, when the charge balance is broken, the breakdown voltage begins
However, when the charge balance is broken, the breakdown voltage begins to decline from
to decline from the highest value. A charge imbalance, changing from negative to positive,
the highest value. A charge imbalance, changing from negative to positive, means that the
means that the p-pillar’s concentration increases, the depletion layer narrows down and,
p-pillar’s concentration increases, the depletion layer narrows down and, thus, the Ron,sp
thus, the Ron,sp increases, as Figure 14 shows. From Figure 13, we can see that the highest
increases, as Figure 14 shows. From Figure 13, we can see that the highest BV and FOM
BV
are and FOM are
achieved when achieved when the concentrations
the concentrations of the p-pillar ofand
the p-pillar
n-pillar andare 6n-pillar
× 1016arecm6−3× and
1016
cm −3
1 × 10 and 1 × −10
16 cm 16 cm , respectively.
−3
3 , respectively. However,
However, from14,
from Figure Figure
it can14,beitseen
can that
be seen that thewindow
the design design
window is wider when the concentration of the p-pillar16 is 5 ×
− 3 10
is wider when the concentration of the p-pillar is 5 × 10 cm . In this design window,
16 cm−3. In this design

window,
when thewhen charge the charge imbalance
imbalance changes
changes from –20% from –20%the
to 20%, to 20%, the breakdown
breakdown voltage isvoltage
about
is about 1500 V, and the FOM ranges from 642.12 to 663.52 2 MW/cm 2, which is easy for the
1500 V, and the FOM ranges from 642.12 to 663.52 MW/cm , which is easy for the control of
control of the
the process process technology.
technology.

Figure
Figure 14. Relationship
Relationship curves
curves of
of BV, on,sp and
BV, Ron,sp andFOM
FOMversus
versuscharge
chargeimbalance
imbalancefor
forBSJ-UMOS.
BSJ-UMOS.

3.5. Short-Circuit Capability

The short-circuit case is defined as follows: when the 4H-SiC MOSFET operates in
the conduction mode, the high-voltage source is directly biased at the drain electrode, due
to the shorting of the load [31,32]. At the same time, a high drain current flows through
 Micromachines 2022, 13, 1770 10 of 12

3.5. Short-Circuit Capability

The short-circuit case is defined as follows: when the 4H-SiC MOSFET operates in the
conduction mode, the high-voltage source is directly biased at the drain electrode, due to
the shorting of the load [31,32]. At the same time, a high drain current flows through the
device with a high drain voltage, which generates a high power loss and makes the device’s
temperature increase. From the I-V performance (shown in Figure 3), the BSJ-UMOS has a
lower saturation current due to the introduction of the p-pillar, meaning an increased short-
circuit capability. The test circuit of the short-circuit characteristic is shown in Figure 15,
and the simulation results are presented in Figure 16, in which the drain current pulse is
caused by the inductance load. As expected, compared with C-UMOS, BSJ-UMOS has a
lower drain current and minimum lattice temperature during the short-circuit case,
Micromachines 2022, 13, x FOR PEER REVIEW 11 since
of 13
Micromachines 2022, 13, x FOR PEER REVIEW 11 of 13
the existence of the p-pillar shrinks the current flow path. Owing to the lower lattice
temperature, BSJ-UMOS has an improved short-circuit capability.

20nH
20nH
15V
15V 400V
400V
00 0V
0V
t=0 t=5µs
t=0 t=5µs DUT
DUT
Gatevoltage
Gate voltagepulse
pulse
10Ω
10Ω
Figure 15. Test circuit of the short-circuit performance.
Figure
Figure Testcircuit
15.15.Test circuitofofthe
theshort-circuit
short-circuitperformance.
performance.

Figure
Figure 16. Maximum
Maximum lattice
lattice temperature and drain current for the short-circuit case.
temperatureand
Figure 16.16.Maximum lattice temperature drain current for the short-circuit case.

4. Conclusions
4. Conclusions
A 4H-SiC trench gate MOSFET structure with a super junction layer (composed of
A 4H-SiC trench gate MOSFET structure with a super junction layer (composed of
the p-pillar and n-pillar) on the drain-region side is investigated in detail and compared
the p-pillar and n-pillar) on the drain-region side is investigated in detail and compared
with a conventional trench gate, MOSFET. The investigation results demonstrate that the
with a conventional trench gate, MOSFET. The investigation results demonstrate that the
Micromachines 2022, 13, 1770 11 of 12

4. Conclusions
A 4H-SiC trench gate MOSFET structure with a super junction layer (composed of
the p-pillar and n-pillar) on the drain-region side is investigated in detail and compared
with a conventional trench gate, MOSFET. The investigation results demonstrate that the
proposed structure can significantly enhance the breakdown voltage, with a slight degrada-
tion of the specific on-resistance. The introduction of a back-side super junction layer can
modulate the electric field in the drift region and introduce an exact peak electric field at the
p-pillar/n+ substrate junction, resulting in a significant improvement in the FOM. More-
over, BSJ-UMOS has an increased short-circuit capability due to a lower saturation current.

Author Contributions: Conceptualization, L.Z. and Y.L. (Yanjuan Liu); investigation, L.Z., Y.L.
(Yuxuan Liu) and J.F.; methodology, Y.L. (Yuxuan Liu) and Y.L. (Yanjuan Liu); software, L.Z., Y.L.
(Yuxuan Liu), J.F. and Y.L. (Yanjuan Liu); validation, Y.L. (Yuxuan Liu), J.F. and Y.L. (Yanjuan Liu);
writing—original draft, L.Z.; writing—review and editing, L.Z., Y.L. (Yuxuan Liu), J.F. and Y.L.
(Yanjuan Liu) All authors have read and agreed to the published version of the manuscript.
Funding: This research was funded by a project of the Liaoning Provincial Department of Education,
grant number LJKZ0174; the Natural Science Foundation of Liaoning Province, grant number 2021-BS-192;
and by the Ph.D. research startup foundation of Shenyang Aerospace University, grant number 19YB47.
Institutional Review Board Statement: Not applicable.
Informed Consent Statement: Not applicable.
Data Availability Statement: Not applicable.
Conflicts of Interest: The authors declare no conflict of interest.

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