351S Transfer Scheme Paper

SEL QuickSet™
Design Template Guide

LDG0006-01
SEL-351S Two-Relay Main-Tie-Main

Automatic Transfer Scheme
Control Application
Ryan McDaniel
20080317
Factory Assistance
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© 2008 by Schweitzer Engineering Laboratories, Inc. All rights reserved. All brand or product names appearing in this document are the trademark or registered
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Foreign patents.
Date Code 20080317 LDG0006-01

Table of Contents
Introduction ................................................................................................................... 1
Preface.............................................................................................................................................................1
Relay Selection and Connections ....................................................................................................................2
Front-Panel Quick Reference ..........................................................................................................................5
Description of Operations ............................................................................................ 9

Manual Operation............................................................................................................................................9
General Manual Breaker Operation ........................................................................................................9
Manual Transfer to Tie Breaker..............................................................................................................9
Manual Retransfer to Main Breakers ....................................................................................................10
Automatic Operation .....................................................................................................................................10
Automatic Transfer Enable ...................................................................................................................10
Automatic Retransfer Enable................................................................................................................11
Automatic Transfer Initiation ...............................................................................................................11
Automatic Retransfer Initiation ............................................................................................................12
Closed Transition .........................................................................................................................12
Open Transition............................................................................................................................12
Live-Source Seeking Logic ..................................................................................................................12
Test Mode .............................................................................................................................................13
Design Settings Descriptions and Settings Sheets ................................................. 15

Design Template Setting Nodes ....................................................................................................................15
General Settings Node Descriptions .....................................................................................................15
General: System Information .......................................................................................................15
General: Manual Control and Breaker Failure Settings ...............................................................16
General: Metering and Reports ....................................................................................................16
Transfer Scheme Node Settings Descriptions.......................................................................................18
Transfer Scheme: Transfer Timer Settings...................................................................................19
Transfer Scheme: Transfer Voltage Settings................................................................................19
Transfer Scheme: Transfer Block Overcurrent ............................................................................20
Transfer Scheme: Synchronism Settings......................................................................................20
Main Breaker 1 and Main Breaker 2 Node Settings Descriptions.................................................................22
Main Breaker 1 and Main Breaker 2: General Settings ........................................................................22
Main Breaker 1 and Main Breaker 2: Overcurrent Settings..................................................................23
Design Settings Sheets ..................................................................................................................................24
Automatic Transfer Scheme Setup............................................................................ 29

Settings Development....................................................................................................................................29
Physical Connections ....................................................................................................................................29
Sending Settings............................................................................................................................................30
Establishing Settings Groups and Making Port Settings.......................................................................30
Configuring the Main Breaker 1 Relay ........................................................................................30
Configuring the Main Breaker 2 Relay ........................................................................................30
Initial Select to Trip .....................................................................................................................31
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Commissioning Tests ....................................................................................................................................31
Troubleshooting .......................................................................................................... 33
Cross References for Settings, Equations, and Variables..............................................................................33
Summary of Logic and I/O Usage.................................................................................................................44
Logic Descriptions and Diagrams .................................................................................................................46
Main Breaker Overall Trip Logic .........................................................................................................47
Manual Trip and Protection Trip..................................................................................................47
Tie Breaker Failure Backup Trip .................................................................................................48
Automatic Transfer Trip (SV10T) ...............................................................................................48
Main Breaker Close Logic ....................................................................................................................49
Manual Close ...............................................................................................................................49
Automatic Close...........................................................................................................................49
Tie Breaker Overall Trip Logic ............................................................................................................50
Manual Trip and Protection Trip..................................................................................................51
Automatic Open ...........................................................................................................................51
Tie Breaker Close Logic .......................................................................................................................52
Tie Breaker Manual Close Logic .................................................................................................52
Tie Breaker Automatic Close Logic.............................................................................................53
Automatic Transfer Enable Logic.........................................................................................................54
Automatic Retransfer Enable Logic......................................................................................................55
Breaker Trip and Close Failure Logic ..................................................................................................56
Main Breaker Trip Failure............................................................................................................56
Tie Breaker Trip Failure...............................................................................................................57
Tie Breaker Close Failure ............................................................................................................57
Automatic Scheme Lockout Logic .......................................................................................................57
Preferred/Alternate Source Logic .........................................................................................................58
Open Transition Enable ........................................................................................................................59
Scheme Alarm Logic ............................................................................................................................60
Other Logic...........................................................................................................................................61
Automatic Transfer Block (SV13T).............................................................................................61
Tie Breaker Trip/Close Pushbutton Logic....................................................................................62
Flow Chart ............................................................................................................................................63
Relay Settings................................................................................................................................................64
Main Breaker 1 Settings .......................................................................................................................64
Main Breaker 2 Settings .......................................................................................................................68
Using Design Templates............................................................................................. 73

What Is a Design Template? .........................................................................................................................73
Components ..........................................................................................................................................73
Purpose and Function ...........................................................................................................................73
Opening the Design Template .......................................................................................................................74
Changing the Part Number ............................................................................................................................75
Design Settings..............................................................................................................................................77
Sending Settings............................................................................................................................................77
Design Template Reports ..............................................................................................................................78
Reading Settings From a Device ...................................................................................................................79
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Tables
Table 1 Status and Target LEDs ...............................................................................................................................5
Table 2 Operator Control Pushbutton and LED Functions .......................................................................................5
Table 3 System Frequency Setting .........................................................................................................................15
Table 4 System Phase Rotation Setting ..................................................................................................................15
Table 5 System Voltage (Open Delta) ....................................................................................................................15
Table 6 System Voltage (Wye)...............................................................................................................................16
Table 7 Close Pushbutton Delay Setting ................................................................................................................16
Table 8 Trip Pushbutton Delay Setting...................................................................................................................16
Table 9 Breaker Trip Failure Time Setting.............................................................................................................16
Table 10 Breaker Close Failure Time Setting...........................................................................................................16
Table 11 Enable VSSI Report Setting ......................................................................................................................16
Table 12 Phase Voltage Sag Pickup Setting .............................................................................................................17
Table 13 Phase Voltage Interruption Pickup Setting ................................................................................................17
Table 14 Phase Voltage Swell Pickup Setting ..........................................................................................................17
Table 15 Demand Metering Method Setting.............................................................................................................17
Table 16 Demand Meter Time Constant Setting ......................................................................................................17
Table 17 Event Report Length Setting......................................................................................................................17
Table 18 Prefault Event Report Length ....................................................................................................................17
Table 19 Main 1 Source-Side PT Ratio Setting ........................................................................................................18
Table 20 Main 1 Load-Side PT Ratio Setting...........................................................................................................18
Table 21 Is Main 1 Load-Side PT Connected Phase-to-Phase Setting .....................................................................18
Table 22 Main 2 Source-Side PT Ratio Setting ........................................................................................................18
Table 23 Main 2 Load-Side PT Ratio Setting...........................................................................................................18
Table 24 Is Main 2 Load-Side PT Connected Phase-to-Phase Setting .....................................................................18
Table 25 Transfer Initiate Time Delay Setting .........................................................................................................19
Table 26 Automatic Retransfer Time Delay Setting.................................................................................................19
Table 27 Transfer Tie Close Time Delay Setting .....................................................................................................19
Table 28 Tie Breaker Open/Main Breaker Close Delay for Retransfers Setting ......................................................19
Table 29 Maximum Time Sources Can Be Paralleled In Close Transition Mode Setting........................................19
Table 30 Transfer Initiate Voltage Setting................................................................................................................19
Table 31 Healthy Source Voltage Setting.................................................................................................................20
Table 32 Dead Bus Voltage Setting..........................................................................................................................20
Table 33 Negative-Sequence Voltage Setting ..........................................................................................................20
Table 34 Transfer Block Phase Overcurrent Level Setting.......................................................................................20
Table 35 Synchronism Check High-Voltage Threshold Setting...............................................................................20
Table 36 Synchronism Check Low-Voltage Threshold Setting................................................................................21
Table 37 Synchronism Check Maximum Angle Setting...........................................................................................21
Table 38 Maximum Slip Frequency Setting .............................................................................................................21
Table 39 Main 1 Breaker Close Time Setting...........................................................................................................21
Table 40 Main 2 Breaker Close Time Setting...........................................................................................................21
Table 41 Terminal Identifier Setting.........................................................................................................................22
Table 42 Relay Identifier Setting..............................................................................................................................22
Table 43 Phase CT Ratio Setting ..............................................................................................................................22
Table 44 Synchronizing Phase Setting (Open Delta)................................................................................................22
Table 45 Synchronizing Phase Setting (Wye) ..........................................................................................................22
Table 46 Phase Time-Overcurrent Pickup Setting....................................................................................................23
Table 47 Phase Time-Overcurrent Curve Setting .....................................................................................................23
Table 48 Phase Time-Overcurrent Delay Setting .....................................................................................................23
Table 49 Use Neutral Elements Instead of Residual Elements for Ground Protection Setting.................................23
Table 50 If Neutral Is Used, Enter Neutral Ground CT Ratio Setting ......................................................................23
Table 51 Ground Time-Overcurrent Pickup Setting.................................................................................................23
Table 52 Ground Time-Overcurrent Curve Setting ..................................................................................................24
Table 53 Ground Time-Overcurrent Delay Setting ..................................................................................................24
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Table 54 General: System Information.....................................................................................................................24
Table 55 General: Manual Control and Breaker Failure...........................................................................................24
Table 56 General: Metering and Reports..................................................................................................................24
Table 57 Transfer Scheme: Potential Ratios.............................................................................................................25
Table 58 Transfer Scheme: Transfer Timer Settings ................................................................................................25
Table 59 Transfer Scheme: Transfer Voltage Settings .............................................................................................25
Table 60 Transfer Scheme: Transfer Block Overcurrent Settings ............................................................................26
Table 61 Transfer Scheme: Synchronism Settings ...................................................................................................26
Table 62 Main Breaker 1: General Settings..............................................................................................................26
Table 63 Main Breaker 1: Overcurrent Settings .......................................................................................................26
Table 64 Main Breaker 2: General Settings..............................................................................................................27
Table 65 Main Breaker 2: Overcurrent Settings .......................................................................................................27
Table 66 Global Design Settings Cross Reference ...................................................................................................33
Table 67 Design Template Equations Cross Reference ............................................................................................36
Table 68 Design Variables Cross Reference.............................................................................................................42
Table 69 Summary of Logic and I/O Usage .............................................................................................................44
Figures
Figure 1 Relay Connections With Nonparallel CT Connections ...............................................................................4
Figure 2 Parallel CT Connections ..............................................................................................................................4
Figure 3 SEL-351S Main Breaker Front-Panel Operator Interface............................................................................5
Figure 4 Overall Main Trip Logic............................................................................................................................47
Figure 5 Main Pushbutton/Serial Trip......................................................................................................................48
Figure 6 Protection Trip Logic.................................................................................................................................48
Figure 7 Overall Main Close Logic..........................................................................................................................50
Figure 8 Overall Tie Breaker Trip Logic .................................................................................................................52
Figure 9 Overall Tie Breaker Close Logic ...............................................................................................................54
Figure 10 Automatic Transfer Enable Logic..............................................................................................................55
Figure 11 Automatic Retransfer Enable.....................................................................................................................56
Figure 12 Main Breaker Trip Failure .........................................................................................................................56
Figure 13 Tie Breaker Trip Failure ............................................................................................................................57
Figure 14 Tie Breaker Close Failure ..........................................................................................................................57
Figure 15 Scheme Lockout ........................................................................................................................................58
Figure 16 Preferred/Alternate Source Selection.........................................................................................................59
Figure 17 Open Transition Enable .............................................................................................................................60
Figure 18 Alarm Output Contact................................................................................................................................61
Figure 19 Automatic Transfer Block Logic ...............................................................................................................62
Figure 20 Tie Breaker Trip and Close Pushbutton Logic...........................................................................................62
Figure 21 Scheme Flowchart .....................................................................................................................................63
Figure 22 Design Template Structure ........................................................................................................................74
Figure 23 Open a Design Template............................................................................................................................74
Figure 24 Select Show Settings With Design Templates ...........................................................................................75
Figure 25 Design Template View in ACSELERATOR QuickSet Software ..................................................................75
Figure 26 Configuring the Part Number in ACSELERATOR QuickSet Software ........................................................76
Figure 27 Design Template Manager Directory Tree ................................................................................................77
Figure 28 Sending Settings From the Design Template View ...................................................................................77
Figure 29 Viewing and Printing Design Template Reports .......................................................................................78
Figure 30 Design Report Options ..............................................................................................................................79
Figure 31 Merge Dialog Box in ACSELERATOR QuickSet Software .........................................................................79
Figure 32 Final Step in Merging Settings and Design Template ...............................................................................80
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Introduction
Preface
A common power system configuration for industrial and power generation facilities consists of two
switchgear lineups with separate power sources. In normal operation, main breakers supplying the
switchgear are closed and supply power separately to each switchgear. When one of the two sources fails,
an automatic transfer scheme can trip the main breaker and close a tie breaker, allowing the remaining main
breaker to supply both switchgear lineups.
The SEL-351S Protection and Breaker Control Relay, with its configurable front-panel pushbuttons and
LEDs, significant logic capability, synchronism-check elements, and ability to communicate with other
relays using MIRRORED BITS® communications, is ideal for controlling automatic transfer schemes. In
addition, using an ACSELERATOR® QuickSet Designer™ SEL-5031 Software Design Template, a user can
easily configure such a scheme with a small number of settings. A Design Template is a combination of a
settings interface with custom variables and equations for calculating the actual relay settings and custom
logic in the relay settings file that would normally remain unchanged. The custom settings interface is
developed using ACSELERATOR QuickSet Designer software.
SEL has developed a Design Template that can be used to easily configure SEL-351S Relays for use in a
two-relay main-tie-main automatic transfer scheme. To use this Design Template, you need a copy of
™
ACSELERATOR QuickSet SEL-5030 Software. The ACSELERATOR QuickSet Designer software is only
required if you wish to modify the Design Template or develop new Design Templates for other products.
Refer to the Using Design Templates section at the end of this Design Template Guide for detailed
instructions on using Design Templates.
The SEL-351S Two-Relay Main-Tie-Main Automatic Transfer Scheme Design Template allows easy
configuration of the following features:
• Overcurrent protection
• Transfer initiate voltages
• Transfer time delays
• Synchronism-check parameters
• Local control interface
• Voltage, sag, swell, and interrupt (VSSI) report parameters
The following information is provided in this QuickSet Design Template Guide:
• Introduction provides a brief description of the Design Template purpose and features.
– Relay Selection and Connections describes the basic connections required for the scheme and
the requirements for relay selection.
– Front-Panel Quick Reference describes the functions of the SEL-351S front-panel LEDs and
operator control pushbuttons when the SEL-351S is programmed with this Design Template.
• Description of Operations provides an overview of how the scheme works.
• Design Settings Descriptions and Settings Sheets describes the purpose of each application
setting and contains blank settings sheets.
Date Code 20080317 SEL Design Template Guide 1

LDG0006-01
• Automatic Transfer Scheme Setup describes how to send settings to both relays, how to put each
relay into the correct settings group, how to set the communications ports for MIRRORED BITS
communications between each of the relays, and provides an overview of steps that can be used to
ensure that the scheme is working properly.
• Troubleshooting includes Design Template equations used to calculate relay settings and a
detailed description of relay logic settings particular to the application.
• Using Design Templates describes the Design Template concept and how to work with Design
Templates.
Relay Selection and Connections

The transfer scheme is implemented using an SEL-351S-6 or SEL-351S-7 Relay installed on each main
breaker. The minimum requirements for the relay are established using the following part number:
0351Sa1x4x5bxcx or 0351SaYx4x5bxcx (Connectorized®)
x= Fill in digits from model option table as needed
a = 6 or 7 Required for MIRRORED BITS communications
b = 1, 5, or 6 Select phase and neutral current transformers (CTs). If sensitive neutral (0.2 and 0.05
amperes) is required for the system, contact SEL for a review of the application.
c = X, 2, or 6 Base transfer scheme can be implemented with standard I/O (Option X); however, limited
I/O will be available after the transfer scheme is implemented for additional functions.
Carefully review the application to determine if extra I/O or high-interrupting current
outputs are required (Options 2 or 6).
Note: Due to the amount of logic required for the two-relay main-tie-main scheme, only two elements are
available for additional programming. If additional logic is desired, some of the functionality for the
existing scheme must be removed. For example, if open retransfers are never used, the logic for this
function can be removed. Contact SEL for assistance.
The transfer scheme presented in the Design Template will not work properly if external trip/close switches
or SEL-351S auxiliary trip/close pushbuttons are used and wired directly to breaker trip and close coils.
The transfer scheme does support the use of external trip/close switches connected to relay contact inputs.
Each relay has three-phase CT connections to provide overcurrent protection and overcurrent supervision
of the automatic transfer. The CTs can be connected two ways:
• Connect the relay current inputs to the main breaker only.
– A disadvantage of this connection is that if the scheme were in the transferred state (Main 1
closed, Tie closed, Main 2 open), and a fault occurred on Bus 2, Main 1 would trip, and the
entire station would be lost.
– This connection requires minimal wiring.
• Parallel the main breaker CTs with the tie breaker CTs and connect to relay current inputs.
– An advantage of this connection is that any bus fault can be isolated. For the example above,
the Main 2 relay would see the fault and isolate it on Bus 2 by tripping the tie breaker. Main 1
will not operate because the fault is out of the “differential zone,” and Bus 1 will remain in
service. Figure 2 shows the basic protection zone that is developed when the CTs are
connected in parallel. More selectivity for a fault is achieved.
Note: While this type of CT connection is the same as a partial differential connection, the
main overcurrent elements must still be set to coordinate with the feeder relays
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because a feeder fault is still within this partial differential zone. This type of
connection is recommended for the best fault selection and clearing.
– This connection requires additional wiring.
If an overcurrent condition is detected, the main breaker AND the tie breaker are tripped. The trip is
held until the {TARGET RESET} pushbutton is pressed. The tie breaker is tripped and held open for safety
reasons for all faults that the main breaker detects, regardless of how the CTs are connected. This prevents
the unfaulted main breaker from manually closing via the front-panel pushbuttons. Opening both the main
and the tie breakers is a good practice to keep the faulted bus isolated from the unfaulted bus.
Ground fault protection is provided by residual current elements that use residual current calculated by the
relay using the three-phase currents. To accommodate zero-sequence CTs, select neutral CTs in the
appropriate Design Template settings.
Three-phase potential transformers (PTs) are connected on the source side of the two main breaker relays.
Single-phase PTs are connected on the bus side of the two main breaker relays. There are two settings files
included in the Design Template. One file is configured for open delta-connected PTs for the source
connection. The other file is configured for three-phase, four-wire wye PTs for the source connection. Each
setting template can accommodate either a phase-to-phase or phase-to-ground connection for the single-
phase, bus-side potential transformer (PT). This Design Template can also accommodate different PT ratios
for each PT connection.
Each relay has 52A status for the local main breaker (IN101) and the tie breaker (IN102). Also, each relay
has trip outputs for the local main breaker (OUT101) and the tie breaker (OUT103), as well as close
contacts for the local main (OUT102) and the tie breaker (OUT104). All truck-operated contact positions
must be connected in series to IN103 on each relay. If any breaker is racked out, IN103 will deassert and
disable automatic transfers. The alarm output from each relay must be wired to a monitored location to
provide indication of relay or control power failure. An additional contact output of each relay is available
for a general scheme alarm, if monitoring via communications is not possible.
Transfer scheme primary communications between the main breaker relays is provided via MIRRORED BITS
communications. EIA-232 Port 3 is used for these connections.

LDG0006-01
Source 1 Source 2
MIRRORED BITS
Communications
SEL-351S SEL-351S
(2 or 3) (2 or 3)
Port Port
3 3 (3)
(3) IN103 IN103
OUT101 OUT103 IN104 IN104 OUT103 OUT101

IN101 OUT102 OUT104 IN102 IN102 OUT104 OUT102 IN101
52/TOC 52/TOC
Main 1 52A 52A Main 2

(Normally TRIP TRIP (Normally
Closed) CLOSE CLOSE Closed)
Transfer Transfer
L.O. L.O.
(1) (1)
TRIP 52A
CLOSE
52/TOC
Bus 1 Bus 2
Tie
(Normally Open)
Load Load
Notes:
1. Connect alarm output on each relay to supervised location for relay monitoring .
2. OUT107 on each relay is programmed for optional scheme alarm .
3. Transfer scheme is disabled on rising edge of IN 104.
Figure 1 Relay Connections With Nonparallel CT Connections

Source 1 Source 2
SEL-351S SEL-351S
Main 1 Main 2
(3)
Main 1 Main 2
(Normally (Normally
Closed) Closed)
Bus 1 Bus 2
Tie
(Normally Open)
Load Load
Figure 2 Parallel CT Connections

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Front-Panel Quick Reference
The customized LEDs and operator control pushbuttons for this Design Template are shown in Figure 3.
Opening
AUTO HOT LINE

TRANSFER
ENABLE TAG
AUTO
RETRANSFER TIE CLOSE
ENABLE
PREFERRED/
ALTERNATE TIE TRIP
SELECT
OPEN
COMM SCHEME
TRANSITION MAIN CLOSE
TST MODE ERROR LO OVERLOAD 50/51 81 ENABLE
MAIN
READY TIE FAIL LOP MAIN TRIP
FAIL
z
Operator
Target Opening Control
LED Labels
Label
Figure 3 SEL-351S Main Breaker Front-Panel Operator Interface
Table 1 Status and Target LEDs

LED Label LED Function
ENABLED Indicates relay is enabled
TRIP Trip occurred that was not caused by automatic transfer or manual trip
TST MODE Loss-of-potential (LOP) logic has been disabled—useful for testing
COMM ERROR MIRRORED BITS communications failure
SCHEME LO The auto transfer scheme has been disabled
OVERLOAD Auto transfer mode is blocked due to high load current
50/51 Instantaneous/time-overcurrent element generated trip
81 Frequency trip
READY Auto transfer scheme is enabled and ready
MAIN FAIL Main breaker failure
TIE FAIL Tie breaker failure
A, B, C Indicates phase involved in the fault
G Indicates if ground is involved in the fault
LOP LOP has been detected
Table 2 Operator Control Pushbutton and LED Functions

LED Label LED Function
AUTO TRANSFER ENABLE Press the {AUTO TRANSFER ENABLE} operator control pushbutton to enable
or disable the transfer scheme. This button is operable only when certain
conditions are true, as listed in the Description of Operations. The
corresponding LED illuminates to indicate the enabled state.
AUTO RETRANSFER ENABLE Press the {AUTO RETRANSFER ENABLE} operator control pushbutton to
enable or disable automatic retransfer. This button is operable only when
the transfer scheme is enabled. The corresponding LED illuminates to
indicate the enabled state.

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PREFERRED/ALTERNATE Press the {PREFERRED/ALTERNATE SELECT} operator control pushbutton to
SELECT select which of the two main breakers will trip when the tie breaker fails
to trip during a close transition retransfer. One breaker may be selected at
a time, and pressing the {PREFERRED/ALTERNATE SELECT} operator control
pushbutton will automatically deselect the other breaker.
OPEN TRANSITION ENABLE Press the {OPEN TRANSITION ENABLE} operator control pushbutton to select
open transition retransfers (the tie breaker will open before a main
breaker closes on a retransfer). The corresponding LED illuminates to
indicate the open transition state. If the LED is not illuminated, close
transitions on retransfer are enabled. If close transitions are enabled, the
main breaker will close before the tie breaker on retransfers, and then the
tie breaker will open. Use open transitions if parallel operation is not
allowed.
LOCK Press and hold the {LOCK} operator control pushbutton for three or more
seconds to engage/disengage the lock function. While this pushbutton is
pressed, the corresponding LED flashes on and off, indicating a pending
engagement or disengagement of the lock function. The corresponding
LED illuminates constantly to indicate the engaged state. While the lock
function is engaged, the other operator controls are locked (except TRIP).
While the lock function is engaged, the {MAIN CLOSE} and {TIE CLOSE}
operator control pushbuttons cannot close the breaker, but the {MAIN TRIP}
and {TIE TRIP} operator control pushbuttons can still trip the associated
breaker.
HOT LINE TAG Press the {HOT LINE TAG} operator control pushbutton to block closing for
the associated main breaker. {HOT LINE TAG} must be pressed and active on
each relay for the tie breaker closing to be blocked.
TIE CLOSE Press the {TIE CLOSE} operator control pushbutton to close the tie breaker.
The corresponding LED illuminates to indicate the breaker is closed. The
close signal is delayed after the operation of the pushbutton in accordance
with the Close Pushbutton Delay setting. The default setting is 0 seconds.
If a time delay is added, the LED associated with tie close will NOT
blink.
TIE TRIP Press the {TIE TRIP} operator control pushbutton to trip the tie breaker. The
corresponding LED illuminates to indicate the breaker is open. The trip
signal is delayed after the operation of the pushbutton in accordance with
the Trip Pushbutton Delay setting. The default setting is 0 seconds. If a
time delay is added, the LED associated with tie trip will NOT blink.
MAIN CLOSE Press the {MAIN CLOSE} operator control pushbutton to close the main
breaker. The corresponding LED illuminates to indicate the breaker is
closed. The close signal is delayed after the pushbutton operation in
accordance with the Close Pushbutton Delay setting. The default setting
is 0 seconds. If a time delay is added, the MAIN CLOSE LED WILL blink.
MAIN TRIP Press the {MAIN TRIP} operator control pushbutton to trip the main breaker.
The corresponding LED illuminates to indicate the breaker is open. The
trip signal is delayed after the pushbutton operation in accordance with
the Trip Pushbutton Delay setting. The default setting is 0 seconds. If a
time delay is added, the MAIN TRIP LED WILL blink.

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Description of Operations
The transfer scheme provides control logic for two main breakers and one tie breaker. Upon the loss of one
source, the scheme automatically transfers the loads to the other source and it provides automatic, hot-bus,
synchronism-supervised retransfer after the main source is recovered. The scheme uses MIRRORED BITS
communications as the primary means of communicating breaker status, fault conditions, and other data
between relays. The scheme is designed so that critical functions are not attempted when MIRRORED BITS
communications has been lost.
Manual Operation
General Manual Breaker Operation
Either main breaker can be manually closed using the {MAIN CLOSE} front-panel pushbutton, or via a serial
communications CLOSE command. Front-panel breaker closing is provided with an optional time delay to
allow the operator to move away from the breaker after pressing the {MAIN CLOSE} pushbutton and is operable
when the front panel is not locked. The MAIN CLOSE LED flashes as the close logic is timing and will
illuminate steadily when the breaker is closed. The main breaker is not permitted to close if the two sources
are not in synchronism while the remote main and tie breakers are closed.
The tie breaker can be manually closed using the {TIE CLOSE} front-panel pushbutton. Front-panel breaker
closing is provided with an optional time delay to allow the operator to move away from the breaker after
pressing the {TIE CLOSE} pushbutton and is operable when the front panel is not locked. The TIE CLOSE LED
does not flash as the close logic is timing. The tie breaker is not permitted to close if both main breakers
are in the close position.
The main breakers can be manually opened using the {MAIN TRIP} front-panel pushbutton, or via
communications. Front-panel breaker tripping is provided with an optional time delay to allow the operator
to move away from the breaker after the {MAIN TRIP} pushbutton is pushed. The MAIN TRIP LED flashes as the
trip logic is timing and will illuminate once the breaker is open.
The tie breaker can be manually opened using {TIE TRIP} front-panel pushbutton. Front-panel breaker tripping
is provided with an optional time delay to allow the operator to move away from the breaker after the
{TIE TRIP} pushbutton is pushed. The TIE TRIP LED does not flash as the trip logic is timing. The LED will
illuminate once the breaker is open.
Manual Transfer to Tie Breaker

Note: The tie breaker cannot be closed with both main breakers closed and both sources healthy because
there is no synchronism check available across the tie breaker. Manual transfers to the tie breaker
can only occur if one main breaker is open.
Use the following steps to manually transfer load to the tie breaker via open transition:
Step 1. Place scheme in Manual mode by disabling AUTO TRANSFER ENABLE.
Step 2. Open Main Breaker 1 or Main Breaker 2 using the {MAIN TRIP} front-panel pushbutton on the
appropriate main breaker relay or a serial communications TRIP command.

LDG0006-01
Step 3. Initiate closing of the tie breaker using the {TIE CLOSE} front-panel pushbutton on the tie breaker
relay. The logic will verify that Main Breaker 1 and Main Breaker 2 have not tripped due to a
fault (the tie breaker will have a standing trip on it if there has been a fault detected by the main
breaker) and that either of the following conditions are present:
a. Bus 1 has voltage and Bus 2 has no voltage.
b. Bus 1 has no voltage and Bus 2 has voltage.
Step 4. The tie breaker will close.
Manual Retransfer to Main Breakers

To restore the system to normal operation with both main breakers closed, a closed transition retransfer
command may be performed as follows:
Step 1. Place scheme in Manual mode by disabling AUTO TRANSFER ENABLE.
Step 2. Initiate closing of the open main breaker using the {MAIN CLOSE} front-panel pushbutton on the
main breaker relay or a serial communications CLOSE command. After the breaker close time
delay, the logic will verify the following conditions are present:
a. The source and bus have voltage and are in synchronism.
b. The source has voltage and the bus has no voltage.
Step 3. The main breaker will close and the tie breaker will open.
Open transition retransfers are performed by tripping the tie breaker and then closing the main breaker. The
main source voltage must be healthy in order for the main breaker to close.
Automatic Operation
Automatic Transfer Enable
Automatic transfers will occur only when the automatic transfer scheme is enabled. The transfer scheme
can be enabled and disabled by pressing the {AUTO TRANSFER ENABLE} front-panel pushbutton on either main
breaker relay when the front panel is not locked.
The transfer enabled signal is transmitted to the other main breaker relay using MIRRORED BITS
communications. The AUTO TRANSFER ENABLE LED on each relay will illuminate when the automatic transfer
scheme is enabled.
The automatic transfer scheme can be enabled when all of the following conditions are true—the READY
LED will be on when all of these conditions are present:
• The Source 1 voltage is healthy.
• Main Breaker 1 is closed and racked-in.
• The Source 2 voltage is healthy.
• Main Breaker 2 is closed and racked-in.
• The tie breaker is racked-in.
• The auto scheme lockout is not set.
• MIRRORED BITS communications is operating properly.

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Automatic Retransfer Enable
Automatic retransfer of the load from the tie breaker back to the main breaker can be enabled and disabled
by the operator whenever the transfer scheme is enabled. If automatic retransfer is disabled, the load will
remain connected through the tie breaker after an automatic transfer and must be manually retransferred
back to the main breaker. If automatic retransfer is enabled, the load will be automatically retransferred
back to the main breaker after the source voltage is recovered and a user-defined time delay has expired.
The automatic retransfer can be enabled and disabled by pressing the {AUTO RETRANSFER ENABLE} front-panel
pushbutton (PB2) on either main breaker relay.
The retransfer enable signal is transmitted to the other main breaker relay using MIRRORED BITS
communications. The AUTO RETRANSFER ENABLE LED on each relay will illuminate when automatic retransfer
is enabled.
Automatic retransfer can be enabled when all of the following conditions are true:
• The transfer scheme is enabled.
• The auto scheme lockout is not set.
• The tie breaker is open.
• MIRRORED BITS communications is operating properly.
The automatic retransfer scheme is automatically disabled when the auto scheme lockout asserts.
Automatic Transfer Initiation

Automatic transfer to a tied bus configuration is initiated when all of the following conditions are true:
• Voltage on one or more phases of a source falls below a user-defined voltage for a user-defined
time delay.
• A blown PT fuse has not caused loss of voltage.
• An overcurrent on the bus has not caused loss of voltage.
• Load current is less than the Transfer Block Overcurrent setting.
• The affected main breaker is closed at the time the loss of voltage occurs.
• The other source has healthy voltage.
• The main breaker for the other source is closed and racked-in.
• The tie breaker is racked-in.
• The automatic transfer scheme is enabled.
When a transfer is initiated, the affected main breaker trips.
Upon opening of the main breaker, the tie breaker closes if all of the following are true:
• Main Breaker 1 is open, phase voltage on Bus 1 is below the Dead Bus Voltage setting, and the
remote is healthy OR Main Breaker 2 is open, phase voltage on Bus 2 is below the Dead Bus
Voltage setting, and the remote is healthy.
• The automatic transfer scheme is enabled.
• The user-defined transfer time delay has expired.
If automatic retransfers are disabled, no additional automatic configuration can take place.

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Automatic Retransfer Initiation
Closed Transition
If automatic retransfers are enabled and open transitions are disabled, the scheme will perform a closed
transition transfer of the load from the tie breaker back to the main breaker by allowing the main breaker to
close before the tie breaker opens. The tie breaker is forced to trip when both main breakers and the tie
breaker are closed simultaneously.
The main breaker can automatically close for a retransfer if all of the following conditions are true:
• Automatic retransfer is enabled.
• The main breaker has previously tripped on automatic transfer.
• The voltage on the associated source has been healthy for a user-defined retransfer time delay.
• The tie breaker is closed.
• No faults have been detected on either bus.
• The bus has voltage and is in synchronism with the source.
Once the main breaker has closed, the tie breaker will open and the breakers will be in normal
configuration.
Open Transition
If automatic retransfers are enabled and open transfers are enabled, the scheme will perform an open
transition transfer of the load from the tie breaker back to the main breaker by allowing the tie breaker to
open before the main breaker closes.
The tie breaker can automatically open for a retransfer if all the following conditions are true:
• Automatic retransfer is enabled.
• The main breaker has previously tripped on automatic transfer.
• The voltage on the associated source has been healthy for a user-defined retransfer time delay.
• The tie breaker is closed.
• No faults have been detected on either bus.
After the tie breaker has successfully opened, the main breaker is allowed to close if all the following
conditions are true:
• The bus voltage is below the dead bus threshold.
• Both sources are healthy.
After the main breaker closes, the breakers will be in the normal configuration.
Live-Source Seeking Logic

The scheme contains logic that will allow automatic recovery from a time-staggered loss of both sources.
Assume that Source 1 is lost and a transfer to the tie breaker is initiated, resulting in Main Breaker 1
opening, the tie breaker closing, and Main Breaker 2 remaining closed. Suppose that Source 2 is then lost.
Main Breaker 2 will not trip, because there is no live source to which to transfer the load. If Source 2 is
recovered before Source 1, Main Breaker 2 will remain closed and Main Breaker 1 will remain open. All

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load will be fed from Main Breaker 2. Subsequent recovery of Source 1 will cause Main Breaker 1 to close
and the tie breaker to trip (as described in the Automatic Retransfer Initiation subsection) if automatic
retransfer is enabled.
If, however, Source 1 is recovered before Source 2, the logic will trip Main Breaker 2 (leaving the tie
breaker closed) and close Main Breaker 1. Tripping Main Breaker 2 avoids back feeding Source 2 when
Main Breaker 1 closes. All load will be fed from Main Breaker 1. Subsequent recovery of Source 2 will
cause Main Breaker 2 to close and the tie breaker to trip (as described in the Automatic Retransfer
Initiation subsection) if automatic retransfer is enabled.
Test Mode
A test mode is provided to aid in testing the scheme with voltage sources. In each relay, the test mode can
be entered by setting LB1 from the CNTRL menu of the front panel. The relay will remain in the test mode
until LB1 is cleared via the front panel. While in test mode, the TST MODE LED will be displayed.
In the main breaker relays, testing automatic transfer by reducing the voltage below the transfer initiate
voltage without an accompanying change in current will assert the loss-of-potential logic and block the
transfer. The test mode disables the loss-of-potential supervision for automatic transfer initiate.

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Design Settings Descriptions
and Settings Sheets
Design Template Setting Nodes

The SEL-351S has six independent settings groups. This Design Template is configured so that settings
Group 1 contains the settings specific to Main Breaker 1 and settings Group 2 is for Main Breaker 2.
Therefore, this Design Template has been configured so that settings Groups 3 through 6 are not sent to the
relay when settings are sent from the Design Template view in ACSELERATOR QuickSet (or ACSELERATOR
QuickSet Designer) software.
The settings for this Design Template are divided into four design template nodes as follows:
• General
• Transfer Scheme
• Main Breaker 1
• Main Breaker 2
General Settings Node Descriptions

The tables below summarize and describe the application settings in the general settings node.
General: System Information

Table 3 System Frequency Setting
Setting Range Default Units Increment
System Frequency 50, 60 60 Hz
Enter the nominal system frequency.
Table 4 System Phase Rotation Setting

System Phase Rotation ABC, ACB ABC
Enter the power system phase rotation.
Table 5 System Voltage (Open Delta)

System Voltage 0–300 * (PT Ratio)/1000 13.80 kV 0.01
Enter the nominal system phase-to-phase voltage.

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Table 6 System Voltage (Wye)
System Voltage 0–300 * (PT Ratio)*1.73/1000 13.80 kV 0.01
Enter the nominal system phase-to-phase voltage.
General: Manual Control and Breaker Failure Settings

Table 7 Close Pushbutton Delay Setting
Close Pushbutton Delay 0.00–60.00 0.00 Seconds 0.25
The Close Pushbutton Delay setting defines an optional time delay to allow the operator to move a safe distance
away before the relay closes the breaker. If a delay is used, the TIE CLOSE LED will not blink.
Table 8 Trip Pushbutton Delay Setting

Trip Pushbutton Delay 0.00–60.00 0.00 Seconds 0.25
The Trip Pushbutton Delay setting defines an optional time delay to allow the operator to move a safe distance away
before the relay trips the breaker. If a delay is used, the TIE TRIP LED will not blink.
Use this setting with care. Consider all the implications of a delayed manual trip to the safety of personnel and
equipment.
Table 9 Breaker Trip Failure Time Setting

Breaker Trip Failure Time 0.00–20.00 8.00 Cycles 0.25
If the relay generates a breaker trip signal and the breaker does not open within the Breaker Trip Failure Time, the
automatic transfer scheme is disabled and the MAIN FAIL or TIE FAIL LED is illuminated. The trip duration
(TDURD) is set to the breaker trip failure plus one cycle.
Table 10 Breaker Close Failure Time Setting

Breaker Close Failure Time 0.00–16000.00 60.00 Cycles 0.25
If the relay generates a breaker close signal, and the breaker does not close within the Breaker Close Failure Time,
the automatic transfer scheme is disabled, the MAIN FAIL or TIE FAIL LED is illuminated, and the close signal is
unlatched.
General: Metering and Reports

Table 11 Enable VSSI Report Setting
Enable VSSI Report Y, N Y
Select Y to enable the Voltage Sag, Swell, and Interrupt (VSSI) Report (SEL-351S-7 only).

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Table 12 Phase Voltage Sag Pickup Setting
Phase Voltage Sag Pickup 10.00–95.00 90.00 Percent 0.01
Voltages below the Phase Voltage Sag Pickup setting and above the Phase Voltage Interruption Pickup setting are
considered sags for the VSSI report (SEL-351S-7 only).
Table 13 Phase Voltage Interruption Pickup Setting

Phase Voltage Interruption Pickup 5.00–95.00, < Phase 10.00 Percent 0.01
Voltage Sag Pickup
Voltages below the Phase Voltage Interruption Pickup are considered interruptions for the VSSI report (SEL-351S-7
only).
Table 14 Phase Voltage Swell Pickup Setting

Phase Voltage Swell Pickup 105.00–180.00 110.00 Percent 0.01
Voltages above the Phase Voltage Swell Pickup are considered swells for the VSSI report (SEL-351S-7 only).
Table 15 Demand Metering Method Setting

Demand Metering Method THM, ROL ROL
Select either rolling or thermal demand metering.
Table 16 Demand Meter Time Constant Setting

Demand Meter Time Constant 5, 10, 15, 30, 60 15 Minutes
The Demand Meter Time Constant setting determines the demand meter response time.
Table 17 Event Report Length Setting

Event Report Length 15, 30 15 Cycles
Event report length in cycles.
Table 18 Prefault Event Report Length

Prefault Event Report Length 1–14 4 Cycles 1
The length of the captured prefault event report in cycles.

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Transfer Scheme Node Settings Descriptions
The tables below summarize and describe the application settings in the transfer scheme settings node.
These settings control the manner in which the transfer scheme operates.
Table 19 Main 1 Source-Side PT Ratio Setting

Main 1 Source-Side PT Ratio 1.00–10000.00 120.00 0.01
Enter the Main 1 Source-Side PT Ratio.
Table 20 Main 1 Load-Side PT Ratio Setting

Main 1 Load-Side PT Ratio 1.00–10000.00 120.00 0.01
Enter Main 1 Load-Side PT Ratio.
Table 21 Is Main 1 Load-Side PT Connected Phase-to-Phase Setting

Is Main 1 Load-Side PT Connected Y, N N
Phase-to-Phase?
Set to Y if the load-side PT is connected phase-to-phase. Set to N if it is connected phase-to-ground.
Table 22 Main 2 Source-Side PT Ratio Setting

Main 2 Source-Side PT Ratio 1.00–10000.00 120.00 0.01
Enter Main 2 Source-Side PT Ratio.
Table 23 Main 2 Load-Side PT Ratio Setting

Main 2 Load-Side PT Ratio 1.00–10000.00 120.00 0.01
Enter Main 2 Load-Side PT Ratio.
Table 24 Is Main 2 Load-Side PT Connected Phase-to-Phase Setting

Is Main 2 Load-Side PT Connected Y, N N
Phase-to-Phase?
Set to Y if the Load-Side PT is connected phase-to-phase. Set to N if it is connected phase-to-ground.

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Transfer Scheme: Transfer Timer Settings
Table 25 Transfer Initiate Time Delay Setting
Transfer Initiate Time Delay 0.1–100.0 5.0 Seconds 0.1
Enter the time to qualify source undervoltage conditions before a transfer is initiated.
Table 26 Automatic Retransfer Time Delay Setting

Automatic Retransfer Time Delay 0.1–100.0 10.0 Seconds 0.1
Enter the time to qualify recovery of source voltage before automatic retransfer occurs.
Table 27 Transfer Tie Close Time Delay Setting

Transfer Tie Close Time Delay 0.0–100.0 2.0 Seconds 0.1
Enter the time delay for tie breaker to close after main breaker opens on automatic transfer initiate.
Table 28 Tie Breaker Open/Main Breaker Close Delay for Retransfers Setting
Tie Breaker Open/Main Breaker Close 0.0–100.0 2.0 Seconds 0.1
Delay for Retransfers
Enter an additional time delay for tie open (open transitions), once the healthy source has been detected. Also adds
an additional time delay for main close (close/open transitions) once a healthy source has been detected.
Table 29 Maximum Time Sources Can Be Paralleled In Close Transition Mode Setting
Maximum Time Sources Can Be 0.00–180.00 5.00 Cycles 0.25
Paralleled In Close Transition Mode
Enter the maximum time delay for tie breaker to open after a main has closed on a closed transition retransfer.
Transfer Scheme: Transfer Voltage Settings

Table 30 Transfer Initiate Voltage Setting
Transfer Initiate Voltage 0–100, <Healthy Source 80 Percent 1
Voltage Setting
Enter the voltage that will cause an automatic transfer to be initiated.
If at least one phase of the source falls below the transfer initiate voltage for the transfer initiate time delay, and the
transfer block overcurrent element is not asserted, the main breaker will trip and the transfer to the tie breaker will
be initiated.

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Table 31 Healthy Source Voltage Setting
Healthy Source Voltage 0–100, >Transfer Initiate 90 Percent 1
Voltage Setting
Enter the percent voltage above which a source is considered healthy.
The Healthy Source Voltage setting is used as a criteria when:
1. Source voltage is considered live for hot line, dead bus closing.
2. Source voltage is considered adequate for an automatic retransfer.
Table 32 Dead Bus Voltage Setting

Dead Bus Voltage 0.0–100.0 25.0 Percent 0.1
Enter the percent voltage below which a bus is considered dead.
The Dead Bus Voltage setting is used to determine the voltage that is considered dead for hot line, dead bus closing.
This should be set to less than 33%.
Table 33 Negative-Sequence Voltage Setting

Negative-Sequence Voltage 0.0–100.0 10.0 Percent 0.1
Enter the maximum allowed negative-sequence voltage imbalance. If this setting is exceeded, the scheme will
initiate a transfer. Also, a source will be deemed unhealthy if the measured negative-sequence voltage is greater than
this setting.
Transfer Scheme: Transfer Block Overcurrent

Table 34 Transfer Block Phase Overcurrent Level Setting
Transfer Block Phase Overcurrent OFF, 0.25–100.00 6.00 Secondary 0.25
Level Amperes
The automatic transfer will be blocked if the phase current is greater than the transfer block phase overcurrent level.
Transfer Scheme: Synchronism Settings

Table 35 Synchronism Check High-Voltage Threshold Setting
Synchronism Check High-Voltage 100.0–150.0 110.0 Percent 0.1
Threshold
If the percent voltage is greater than the Synchronism Check High-Voltage Threshold setting, synchronism-check
elements will not operate and breaker close operations that are supervised by synchronism check will not occur.
Breaker closing supervised by hot line, dead bus may still occur.

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Table 36 Synchronism Check Low-Voltage Threshold Setting
Synchronism Check Low-Voltage 50.0–100.0 90.0 Percent 0.1
Threshold
If the percent voltage is less than the Synchronism Check Low-Voltage Threshold setting, synchronism-check
elements will not operate, and breaker close operations that are supervised by synchronism check will not occur.
Breaker closing supervised by hot line, dead bus may still occur.
Table 37 Synchronism Check Maximum Angle Setting

Synchronism Check Maximum Angle 0.00–80.00 10.00 Degrees 0.01
If the angle between two sources is greater than the Synchronism Check Maximum Angle setting, synchronism-
check elements will not operate, and breaker close operations that are supervised by synchronism check will not
occur.
Table 38 Maximum Slip Frequency Setting

Maximum Slip Frequency 0.005–0.500 0.042 Hz 0.001
If the slip between two sources is greater than the Maximum Slip Frequency setting, synchronism-check elements
will not operate and breaker close operations that are supervised by synchronism check will not occur.
Table 39 Main 1 Breaker Close Time Setting

Main 1 Breaker Close Time 0.00–60.00 0.00 Cycles .25
Enter the expected breaker close time. If sources are slipping, this will allow the relay to calculate an in-phase close
time. When this is set to zero, static sources (nonslipping) are assumed.
Table 40 Main 2 Breaker Close Time Setting

Main 2 Breaker Close Time 0.00–60.00 0.00 Cycles .25
Enter the expected breaker close time. If sources are slipping, this will allow the relay to calculate an in-phase close
time. When this is set to zero, static sources (nonslipping) are assumed.

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Main Breaker 1 and Main Breaker 2 Node Settings
Descriptions
The tables below summarize and describe the application settings in Main Breaker 1 and Main Breaker 2.
These settings contain details about the breakers, such as identifying text fields, CT ratios, and overcurrent
protection settings. Settings fields are provided in the individual nodes for each breaker. The settings
descriptions are identical for each breaker.
Main Breaker 1 and Main Breaker 2: General Settings

Table 41 Terminal Identifier Setting
Terminal Identifier (30 characters) (0–9, A–Z, –, SWITCHGEAR A N/A
/, ., space)
The Terminal Identifier setting contains the greater circuit or substation designation (e.g., SWITCHGEAR A). This
identifier is listed at the top of event, history, meter, and status reports.
Table 42 Relay Identifier Setting

Relay Identifier (30 characters) MAIN BREAKER 1 N/A
(0–9, A–Z, –, /, ., space)
The Relay Identifier setting contains the relay installation designation (e.g., MAIN BREAKER 1). This identifier is
listed at the top of event, history, meter, and status reports.
Table 43 Phase CT Ratio Setting

Phase CT Ratio 1.0–6000.0 600 N/A 0.1
The Phase CT Ratio setting is the ratio of the phase CTs as a NUMBER:1.
Table 44 Synchronizing Phase Setting (Open Delta)

Synchronizing Phase 0–330 degrees, VAB, VBC, VAB 30
VCA
Enter the phase designation for voltage connected to VS, or enter the number of degrees which VS lags VAB.
Table 45 Synchronizing Phase Setting (Wye)

Synchronizing Phase 0–330 degrees, VA, VB, VC VA 30
Enter the phase designation for voltage connected to VS, or enter the number of degrees which VS lags VA.

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Main Breaker 1 and Main Breaker 2: Overcurrent Settings
Table 46 Phase Time-Overcurrent Pickup Setting
Phase Time-Overcurrent Pickup 0.25–16.00, OFF 6.00 Secondary 0.01
Amperes
Enter the pickup current for the phase time-overcurrent element.
Table 47 Phase Time-Overcurrent Curve Setting

Phase Time-Overcurrent Curve U1–U5, C1–C5, recloser curves U3
The available settings are:
ANSI curves: U1, U2, U3, U4, U5
IEC Curves: C1, C2, C3 C4, C5
Recloser Curves: A, B, C, D, E, F, G, H, J, KP, L, M, N, P, R, T, V, W, Y, Z, 1, 2, 3, 4, 5, 6, 7, 8, 8PLUS, 9,
KG, 11, 13, 14, 15, 16, 17, 18, 101, 117, 133, 116, 132, 163, 121, 122, 164, 162, 107, 118, 104, 115, 105, 161,
137, 138, 120, 134, 102, 135, 140, 106, 114, 136, 152, 113, 111, 131, 165, 141, 142, 119, 112, 139, 103, 151
See Section 9 of the SEL-351S Instruction Manual, or the ACSELERATOR QuickSet software help file, for more
detail on available curves. Recloser curves may be entered using number or letter designations.
Table 48 Phase Time-Overcurrent Delay Setting

Phase Time-Overcurrent Delay 0.50–15.00 for U1–U5, 0.05– 3.00
1.00 for C1–C5, 0.10–2.00 for
recloser curves
Enter the delay for the phase time-overcurrent element.
Table 49 Use Neutral Elements Instead of Residual Elements for Ground Protection Setting
Use Neutral Elements Instead of Y, N N
Residual Elements for Ground
Protection?
If measured neutral (IN) input is used, set to Y. Otherwise, set to N, and the relay will calculate the residual current.
Table 50 If Neutral Is Used, Enter Neutral Ground CT Ratio Setting

If Neutral Is Used, Enter Neutral 1.0–10000.0 600.0 0.1
Ground CT Ratio
Enter the neutral CT ratio as a NUMBER:1.
Table 51 Ground Time-Overcurrent Pickup Setting

Ground Time-Overcurrent Pickup 0.10–16.00, OFF 1.50 Secondary 0.01
Amperes
Enter the pickup current for the ground time-overcurrent element.

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Table 52 Ground Time-Overcurrent Curve Setting
Ground Time-Overcurrent Curve U1–U5, C1–C5, recloser curves U3
The available settings are:
ANSI curves: U1, U2, U3, U4, U5
IEC Curves: C1, C2, C3 C4, C5
Recloser Curves: A, B, C, D, E, F, G, H, J, KP, L, M, N, P, R, T, V, W, Y, Z, 1, 2, 3, 4, 5, 6, 7, 8, 8PLUS, 9,
KG, 11, 13, 14, 15, 16, 17, 18, 101, 117, 133, 116, 132, 163, 121, 122, 164, 162, 107, 118, 104, 115, 105, 161,
137, 138, 120, 134, 102, 135, 140, 106, 114, 136, 152, 113, 111, 131, 165, 141, 142, 119, 112, 139, 103, 151
See Section 9 of the SEL-351S Instruction Manual, or the ACSELERATOR QuickSet software help file, for more
detail on available curves. Recloser curves may be entered using number or letter designations.
Table 53 Ground Time-Overcurrent Delay Setting

Ground Time-Overcurrent Delay 0.50–15.00 for U1–U5, 0.05– 1.50
1.00 for C1–C5, 0.10–2.00 for
recloser curves
Enter the delay for the ground time-overcurrent element.
Design Settings Sheets

Use these blank settings sheets to record settings for the scheme.
Table 54 General: System Information
Setting Range Value Units
System Frequency 50, 60 Hz
System Phase Rotation ABC, ACB
0–300 * (PT Ratio)/1000 (Open Delta)

System Voltage kV
0–300 * (PT Ratio)*1.73/1000 (Wye)
Table 55 General: Manual Control and Breaker Failure
Close Pushbutton Delay 0.00–60.00 [0.25] Seconds
Trip Pushbutton Delay 0.00–60.00 [0.25] Seconds
Breaker Trip Failure Time 0.00–20.00 [0.25] Cycles
Breaker Close Failure Time 0.00–16000.00 [0.25] Cycles
Table 56 General: Metering and Reports
Enable VSSI Report Y, N
Phase Voltage Sag Pickup OFF, 10.00–95.00 Percent

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OFF, 5.00–95.00, <Phase Voltage Sag

Phase Voltage Interruption Pickup Percent
Pickup
Phase Voltage Swell Pickup OFF, 105.00–180.00 Percent
Demand Metering Method THM, ROL
Demand Meter Time Constant 5, 10, 15, 30, 60 Minutes
Event Report Length 15, 30 Cycles
Prefault Event Report Length 1–14 Cycles
Table 57 Transfer Scheme: Potential Ratios
Main 1 Source-Side PT Ratio 1.00–10000.00 [0.01]
Main 1 Load-Side PT Ratio 1.00–10000.00 [0.01]
Is Main 1 Load-Side PT Connected

Y, N
Phase-to-Phase?
Main 2 Source-Side PT Ratio 1.00–10000.00 [0.01]
Main 2 Load-Side PT Ratio 1.00–10000.00 [0.01]
Is Main 2 Load-Side PT Connected

Y, N
Phase-to-Phase?
Table 58 Transfer Scheme: Transfer Timer Settings
Transfer Initiate Time Delay 0.1–100.0 [0.1] Seconds
Automatic Retransfer Time Delay 0.1–100.0 [0.1] Seconds
Transfer Tie Close Time Delay 0.0–100.0 [0.1] Seconds
Tie Breaker Open/Main Breaker

0.0–100.0 [0.1] Seconds
Close Delay for Retransfers
Maximum Time Sources Can Be

1.00–180.00 [0.25] Cycles
Paralleled in Close Transition Mode
Table 59 Transfer Scheme: Transfer Voltage Settings
Transfer Initiate Voltage 0–100 [1] Percent
Healthy Source Voltage 0–100 [1] Percent
Dead Source Voltage 0.0–100.0 [0.1] Percent
Negative-Sequence Voltage 0.0–100.0 [0.1] Percent

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Table 60 Transfer Scheme: Transfer Block Overcurrent Settings
Secondary
Transfer Block Phase Overcurrent Level OFF, 0.25–100.00 [0.25]
Amperes
Table 61 Transfer Scheme: Synchronism Settings

Synchronism Check High-Voltage
100.0–150.0 [0.1] Percent
Threshold
Synchronism Check Low-Voltage
50.0–100.0 [0.1] Percent
Threshold
Synchronism Check Maximum Angle 0.00–80.00 [0.01] Degrees
Maximum Slip Frequency 0.005–0.500 [0.001] Hz
Main 1 Breaker Close Time 0.00–60.00 [0.25] Cycles
Main 2 Breaker Close Time 0.00–60.00 [0.25] Cycles
Table 62 Main Breaker 1: General Settings

Terminal Identifier (30 characters) (0–9, A–Z, –, /, ., space)
Relay Identifier (30 characters) (0–9, A–Z, –, /, ., space)
Phase CT Ratio 1.0–6000.0 [0.1]
0–330 degrees [30], VAB, VBC, VCA
Synchronizing Phase (Open Delta)
0–330 degrees [30], VA, VB, VC (Wye)
Table 63 Main Breaker 1: Overcurrent Settings
Secondary
Phase Time-Overcurrent Pickup 0.25–16.00 [0.01], OFF
Amperes
Phase Time-Overcurrent Curve U1–U5, C1–C5, recloser curves
0.50–15.00 for U1–U5, 0.05–1.00 for

Phase Time-Overcurrent Delay
C1–C5, 0.10–2.00 for recloser curves
Use Neutral Elements Instead of

Residual Elements for Ground Y, N
Protection?
If Neutral Is Used, Enter Neutral

1.0–10000.0 [0.1]
Ground CT Ratio
Secondary
Ground Time-Overcurrent Pickup 0.10–16.00 [0.01], OFF
Amperes
Ground Time-Overcurrent Curve U1–U5, C1–C5, recloser curves
0.5–15.0 for U1–U5, 0.05–1.00 for C1–

Ground Time-Overcurrent Delay
C5, 0.10–2.00 for recloser curves

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Table 64 Main Breaker 2: General Settings

Terminal Identifier (30 characters) (0–9, A–Z, –, /, ., space)
Relay Identifier (30 characters) (0–9, A–Z, –, /, ., space)
Phase CT Ratio 1.0–6000.0 [0.1]
0–330 degrees [30], VAB, VBC, VCA
Synchronizing Phase (Open Delta)
0–330 degrees [30], VA, VB, VC (Wye)
Table 65 Main Breaker 2: Overcurrent Settings
Secondary
Phase Time-Overcurrent Pickup 0.25–16.00 [0.01], OFF
Amperes
Phase Time-Overcurrent Curve U1–U5, C1–C5, recloser curves
0.50–15.00 for U1–U5, 0.05–1.00 for

Phase Time-Overcurrent Delay
Use Neutral Elements Instead of

Residual Elements for Ground Y, N
Protection?
If Neutral Is Used, Enter Neutral

1.0–10000.0 [0.1]
Ground CT Ratio
Secondary
Ground Time-Overcurrent Pickup 0.10–16.00 [0.01], OFF
Amperes
Ground Time-Overcurrent Curve U1–U5, C1–C5, recloser curves
0.50–15.00 for U1–U5, 0.05–1.00 for

Ground Time-Overcurrent Delay

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Automatic Transfer Scheme Setup
Settings Development
The first step in applying the transfer scheme is to develop the settings. Review the Description of
Operations section, this section, and the Logic Descriptions and Diagrams subsection of the
Troubleshooting section to gain an understanding of how the scheme operates and how each setting affects
the operation. To develop settings, first determine how the system PTs are connected. For open-delta, PT
connections, use the Open Delta template. For four-wire, three-phase PTs connected to ground, use the
Wye template.
Next, determine if any changes to the logic are required or if any additional functions are needed. Modify
the logic and design settings as needed for the specific application. See the Using Design Templates
section to gain an understanding of how to modify Design Templates.
Finally, enter the settings into the Design Template and save the settings. Use the settings sheets provided
in the Design Settings Sheets subsection or print the settings from ACSELERATOR QuickSet software to
maintain a hard copy.
Use the front-panel configurable label template included with this Design Template to create labels for the
relays. Install the labels on the relays.
Physical Connections
Connect the relays as shown in Figure 1 (use Figure 2 to connect main and tie breaker CTs in parallel).
Make any modifications required to support the logic and settings changes made under the Settings
Development subsection above.
Test all the relay inputs and outputs to verify that the connections have been made properly. Verify the
voltage and current metering to ensure the PT and CT connections are correct.
Make the following additional connections as needed:
• Connect an SEL-2800 Fiber-Optic Transceiver to Port 3 of each relay for MIRRORED BITS
communications.
• Connect three current and four voltage inputs according to Figure 1 or Figure 2.
• Connect the main breaker status contact to input IN101 on the appropriate main breaker relay, and
connect the tie breaker status contact to input IN102 of each main breaker relay.
• Connect a lockout contact to either relay’s IN104 (optional). This input disables the transfer
scheme for any external lockout condition.
• The truck-operated contacts (TOC) of all the breakers are brought in series to input IN103 of both
relays. These contacts alert the relay if any breaker is out of service. Refer to the breaker
instruction manual for more connection details.

LDG0006-01
Sending Settings
Connect a PC to each relay in turn. After verifying communications between the PC and the relay, select
FILE then SEND from the ACSELERATOR QuickSet software main toolbar. ACSELERATOR QuickSet
software will send the following settings groups to each relay:
• Group 1
• Group 2
• SELOGIC 1
• SELOGIC 2
• Global
• Text
• SER
• Port 3
Establishing Settings Groups and Making Port Settings

In order for the scheme to operate properly, settings Group 1 must be the active settings group in Main
Breaker 1 and settings Group 2 must be the active settings group in Main Breaker 2. In addition, because
communications port settings are global relay settings and must be different for both relays in the scheme,
settings for ports must be set individually in each relay. Both of these operations are performed in the
Terminal mode of ACSELERATOR QuickSet software. The settings for Port 3 in each relay are sent with the
scheme settings as described in the previous subsection, Sending Settings. The MIRRORED BITS
communications address settings (TXID and RXID) for Port 3 in each relay must be revised for correct
communications.
Configuring the Main Breaker 1 Relay

Step 1. Connect the PC to the front port of the Main Breaker 1 relay.
Step 2. Select Communication > Terminal to open the terminal window.
Step 3. Type ACC <Enter>.
Step 4. Type the Level 1 password in response to the prompt, and press <Enter>.
Step 5. Type 2AC <Enter>.
Step 7. Type GRO 1 <Enter>.
Step 8. Type Y <Enter> in response to the Are you sure (Y/N)? prompt.
Step 9. Verify the relay responds with Active Group = 1, and the front-panel display shows
MAIN BREAKER 1.
Configuring the Main Breaker 2 Relay

Step 1. Connect the PC to the front port of the Main Breaker 2 relay.
Step 2. Select Communication > Terminal to open the terminal window.
Step 3. Type ACC <Enter>.

LDG0006-01
Step 5. Type 2AC <Enter>.
Step 7. Type GRO 2 <Enter>.
Step 8. Type Y <Enter> in response to the Are you sure (Y/N)? prompt.
Step 9. Verify the relay responds with Active Group = 2, and the front-panel display shows
MAIN BREAKER 2.
Step 10. Type SET P 3 RXID <Enter>.
Step 11. Type 2 <Enter> in response to the prompt. This sets the Main 2 Relay RXID equal to 2.
Step 12. Type 1 <Enter> in response to the prompt. This sets the Main 2 Relay TXID equal to 1.
Step 13. Type END <Enter>.
Step 14. Type Y <Enter> at the prompt to save the settings.
Initial Select to Trip

After settings are sent to the relays, LT3 (Select to Trip Latch) will not be set in either main breaker relay.
Use the {PREFERRED/ALTERNATE SELECT} pushbutton on either relay to select one of the breakers to trip for tie
open failures. Verify that the PREFERRED/ALTERNATE SELECT LED illuminates.
Commissioning Tests
The following is a partial outline of steps that can be taken to commission the scheme and verify that it is
operating properly. Other steps may be required depending on modifications to the scheme, conditions and
procedures at the facility, and code requirements. Appropriate safety precautions should be taken,
especially if testing is performed with live sources.
Step 1. Using a relay test set, or by closing source breakers, put balanced voltages on the source PT input
(VA, VB, and VC) of both main breakers to simulate healthy source voltages.
Secondary voltage magnitude must be greater than [(Healthy Source Voltage Setting/100)*
(System Voltage/Potential Ratio)] for open-delta voltages, or greater than [(Healthy Source
Voltage Setting/100)*System Voltage/(Potential Ratio*1.73)] for wye voltages.
Step 2. Verify that the metered primary voltage is greater than the (Healthy Source Voltage
Setting/100)*(System Voltage).
Step 3. Close both main breakers using the {MAIN CLOSE} pushbutton.
Step 4. When both breakers are closed, the READY LED on each relay should be lit. If not, verify that the
relays are communicating correctly, there are no breaker trip or close failure conditions, there are
no active trip conditions, both main breakers are closed, all three beakers are racked-in, there is
no lockout, and both sources are above the Healthy Source Voltage setting.
Step 5. Enable automatic transfer using the {AUTO TRANSFER ENABLE} pushbutton on either relay.
Step 6. Verify that the AUTO TRANSFER ENABLE LED on both relays is on.
Step 7. Enable retransfer using the {AUTO RETRANSFER ENABLE} pushbutton on either relay.
Step 8. Verify that the AUTO RETRANSFER ENABLE LED on both relays is on.
Step 9. Place the relay in the TEST mode using LB1 in the main breaker relay front-panel CNTRL menu.

LDG0006-01
This temporarily bypasses the loss-of-potential supervision. Use of the TEST mode will only be
required when using a test set to simulate source voltage or when simulating loss-of-source
voltage with no load on the bus.
Note: Upon completion of testing, turn TEST mode off.
Step 10. Check the automatic transfer to tie breaker as follows:
a. Reduce voltage on at least one phase of the source voltage from the Main Breaker 1 relay
below the [(Transfer Initiate Voltage Setting/100)*(System Voltage/Potential Ratio)] for
open-delta voltages, or below the [(Transfer Initiate Voltage Setting/100)*System
Voltage/(Potential Ratio*1.73)] for wye voltages.
b. Leave the voltage input to the Main Breaker 2 relay above the Healthy Source Voltage
Setting.
c. Verify that Main Breaker 1 opens after a time equal to the Transfer Initiate Time Delay
Setting.
d. Verify that the tie breaker closes after a time equal to the Transfer Tie Close Time Delay
Setting after Main Breaker 1 opens.
e. Reset the scheme, then disable auto transfers using the {AUTO TRANSFER ENABLE} pushbutton,
and follow the above steps. Verify that the scheme does not perform a transfer.
f. Repeat Steps a–e but reduce the source voltage on at least one phase of Main Breaker 2.
Step 11. Check automatic retransfer for closed transitions (OPEN TRANSITION ENABLE LED is off).
a. Recover the source voltage to the Main Breaker 1 relay (must be in transferred state with the
AUTO RETRANSFER ENABLE LED lit). To get to the transferred state, follow Step 9 (a–d).
b. Verify that Main Breaker 1 closes and the tie breaker trips after a time equal to the
Automatic Retransfer Delay setting plus the Tie Breaker Open/Main Breaker Close Delay
for Retransfers setting.
c. Disable retransfer using the {AUTO RETRANSFER ENABLE} pushbutton on either relay.
d. Verify that the RETRANSFER ENABLE LED on both relays is off.
e. When the scheme is in the transferred state, verify that the associated main breaker DOES
NOT close automatically when the source voltage is reapplied.
Step 12. Check automatic retransfer for open transitions (OPEN TRANSITION ENABLE LED is on).
a. Recover the source voltage to the Main Breaker 1 relay (must be in transferred state with the
AUTO RETRANSFER ENABLE LED lit). To get to the transferred state, follow Step 9 (a–d).
b. Verify that the tie breaker opens first, and then Main Breaker 1 closes.
c. Disable retransfer using the {AUTO RETRANSFER ENABLE} pushbutton on either relay.
d. Verify that the RETRANSFER ENABLE LED on both relays is off.
e. When the scheme is in the transferred state, verify that the tie breaker DOES NOT open
automatically when the source voltage is reapplied.
Step 13. With auto transfers and retransfers enabled and both main breakers closed, remove the voltage
from both sources simultaneously, and verify that neither main breaker trips. This simulates a
complete loss of supply voltage and the scheme does not react.
Step 14. Verify operation of the live-source seeking logic as follows:
a. Remove the voltage from Source 1, resulting in tripping Main Breaker 1 and closing the tie
breaker.
b. Remove the voltage from Source 2, and verify that Main Breaker 2 does not open.
c. Reapply the voltage to Source 1. Verify that Main Breaker 2 trips, the tie breaker remains
closed, and Main Breaker 1 closes.
d. Reapply the voltage to Source 2, and verify that Main Breaker 2 closes.
e. Repeat Steps a through d for Main Breaker 2 by initially removing Source 2.
Step 15. Turn relay TEST mode off.

LDG0006-01
Troubleshooting
This section contains the following information:
• Cross references between design settings and relay settings
• Cross references between Design Template equations and relay settings
• Cross references between design variables and design settings
• Summary of I/O and logic usage
• Relay logic schemes and diagrams
• Listing of all relay settings
Cross References for Settings, Equations, and Variables

Design Templates use custom equations (Design Template equations) to calculate designated relay settings.
The equations consist of math operators, variables, and predefined constants. The user-entered design
settings are applied to the Design Template equations as variables that are referred to as design variables.
A specific format is used to identify relay settings and variables within the equations:
Relay settings format:
[setting group label^setting name], e.g., 1^PTR
Design variable format:
[UV^variable name], e.g., [UV^1_Potential_Transformer_Ratio]
See Table 66 for a cross reference between the design settings and the relay settings that they affect.
Table 67 is a cross reference of all Design Template equations used for each relay setting in this Design
Template, and Table 68 is a cross reference between the design variables and the design settings that define
each variable.
Table 66 Global Design Settings Cross Reference
SEL-351S Settings Affected

Global Design Settings
Global Group 1 Group 2
System Frequency NFREQ
System Phase Rotation PHROT
25VHI, 25VLO,
27PP, 27PP2P, 25VHI, 25VLO, 27PP,
27SP, 519S1P, 27PP2P, 27SP, 519S1P,
System Voltage (Open Delta)
59S2P, 59PP, 59S2P, 59PP, 59PP2P,
59PP2P, 59QP, 59QP, VNOM
VNOM

LDG0006-01
25VHI, 25VLO,
27P1P, 27P2P, 25VHI, 25VLO, 27P1P,
27SP, 59S1P, 27P2P, 27SP, 59S1P,
System Voltage (Wye)
59S2P, 59P1P, 59S2P, 59P1P, 59P2P,
59P2P, 59QP, 59QP, VNOM
VNOM
Close Pushbutton Delay PB9D SV14DO SV14DO
Trip Pushbutton Delay PB10D SV15DO SV15DO
SV11PU, TDURD, SV11PU, TDURD,

Breaker Trip Failure Time
SV8PU SV8PU
Breaker Close Failure Time CFD, SV16PU CFD, SV16PU
Enable VSSI Report ESSI ESSI
Phase Voltage Sag Pickup VSAG VSAG
Phase Voltage Interruption Pickup VINT VINT
Phase Voltage Swell Pickup VSWELL VSWELL
Demand Metering Method EDEM EDEM
Demand Meter Time Constant DMTC DMTC
Event Report Length LER
Prefault Event Report Length PRE
PTR, 25VHI,
25VLO, 27P1P,
Main 1 Source-Side PT Ratio (Wye) 27P2P, 59P1P,
59P2P,
59QP,VNOM
PTR, 25VHI,
25VLO, 27PP,
Main 1 Source-Side PT Ratio (Open Delta) 27PP2P, 59PP,
59PP2P,
59QP,VNOM
PTRS, 25VHI,
Main 1 Load-Side PT Ratio 25VLO, 27SP,
59S1P, 59S2P
PTRS, 25VHI,
Is Main 1 Load-Side PT Connected Phase-to-
25VLO, 27SP,
Phase?
59S1P, 59S2P
PTR, 25VHI, 25VLO,

Main 2 Source-Side PT Ratio (Wye) 27P1P, 27P2P, 59P1P,
59P2P, 59QP,VNOM
PTR, 25VHI, 25VLO,

Main 2 Source-Side PT Ratio (Open Delta) 27PP, 27PP2P, 59PP,
59PP2P, 59QP,VNOM
Main 2 Load-Side PT Ratio PTRS, 25VHI, 25VLO,

LDG0006-01
27SP, 59S1P, 59S2P
Is Main 2 Load-Side PT Connected Phase-to- PTRS, 25VHI, 25VLO,

Phase? 27SP, 59S1P, 59S2P
Transfer Initiate Time Delay SV10PU SV10PU
Automatic Retransfer Time Delay SV1PU, SV9PU SV1PU, SV9PU
Transfer Tie Close Time Delay SV3PU SV3PU
Tie Breaker Open/Main Breaker Close Delay for SV4PU, SV5PU,

SV4PU, SV5PU, SV7PU
Retransfers SV7PU
Maximum Time Sources Can Be Paralleled in

SV6PU SV6PU
Close Transition Mode
Transfer Initiate Voltage (Open Delta) 27PP 27PP
Transfer Initiate Voltage (Wye) 27P1P 27P1P
Healthy Source Voltage (Open Delta) 59PP 59PP
Healthy Source Voltage (Wye) 59P1P 59P1P
Dead Bus Voltage 27SP 27SP
Negative-Sequence Voltage 59QP 59QP
Transfer Block Phase Overcurrent Level 50P2P 50P2P
Synchronism Check High-Voltage Threshold 25VHI, 59P2P,

25VHI, 59P2P, 59S1P
(Wye) 59S1P
Synchronism Check High-Voltage Threshold 25VHI, 59PP2P,

25VHI, 59PP2P, 59S1P
(Open Delta) 59S1P
Synchronism Check Low-Voltage Threshold 25VLO, 27P2P,

25VLO, 27P2P, 59S2P
(Wye) 59S2P
Synchronism Check Low-Voltage Threshold 25VLO, 27PP2P,

25VLO, 27PP2P, 59S2P
(Open Delta) 59S2P
Synchronism Check Maximum Angle 25ANG1 25ANG1
Maximum Slip Frequency 25SF 25SF
Main 1 Breaker Close Time TCLOSD
Main 2 Breaker Close Time TCLOSD
Main Breaker 1 Global Design Settings
Terminal Identifier TID
Relay Identifier RID
Phase CT Ratio CTR
Synchronizing Phase SYNCP
Phase Time-Overcurrent Pickup 51P1P

LDG0006-01
Phase Time-Overcurrent Curve 51P1C
Phase Time-Overcurrent Delay 51P1TD
Use Neutral Elements Instead of Residual LT15, 51N1TC,

Elements for Ground Protection? 51G1TC
If Neutral Is Used, Enter Neutral Ground CT Ratio CTRN
Ground Time-Overcurrent Pickup 51G1P, 51N1P
Ground Time-Overcurrent Curve 51G1C, 51N1C
Ground Time-Overcurrent Delay 51G1TD,51N1TD
Main Breaker 2 Global Design Settings
Terminal Identifier TID
Relay Identifier RID
Phase CT Ratio CTR
Synchronizing Phase SYNCP
Phase Time-Overcurrent Pickup 51P1P
Phase Time-Overcurrent Curve 51P1C
Phase Time-Overcurrent Delay 51P1TD
Use Neutral Elements Instead of Residual

LT15, 51N1TC, 51G1TC
Elements for Ground Protection?
If Neutral Is Used, Enter Neutral Ground CT Ratio CTRN
Ground Time-Overcurrent Pickup 51G1P, 51N1P
Ground Time-Overcurrent Curve 51G1C, 51N1C
Ground Time-Overcurrent Delay 51G1TD,51N1TD
Table 67 Design Template Equations Cross Reference
SEL-351S Setting Design Template Equation
[1^25ANG1] [UV^1_25ANG1]
[1^25SF] [UV^1_25SF]
[UV^M1SourceNomVoltage] * [UV^Sync_High_Thresh] / 100 *

[1^25VHI] [UV^M1_Source_is_greater] + [UV^M1LoadNomVoltage] *
[UV^Sync_High_Thresh] / 100 * [UV^M1_Load_is_greater]
UV^M1SourceNomVoltage] * [UV^Sync_Low_Thresh] / 100 *

[1^25VLO] [UV^M1_Load_is_greater] + [UV^M1LoadNomVoltage] *
[UV^Sync_Low_Thresh] / 100 * [UV^M1_Source_is_greater]
[UV^M2SourceNomVoltage] *
[1^27PP] (Delta)
[UV^Transfer_Initate_Voltage_Entry] / 100

LDG0006-01
[1^27P1P] (Wye)
[1^27PP2P] (Open Delta) [UV^M1LoadNomVoltage] * [UV^Sync_Low_Thresh] / 100
[1^27P2P] (Wye) [UV^M1LoadNomVoltage] * [UV^Sync_Low_Thresh] / 100
[1^27SP] [UV^M1LoadNomVoltage] * [UV^Dead_Bus_Voltage_Entry] / 100
[1^50P2P] [UV^1_50P2P]
[1^51G1C] [UV^1_51G1C]
[1^51G1P] [UV^1_51G1P]
[1^51G1TD] [UV^1_51G1TD]
[1^51N1C] [UV^1_51G1C]
[1^51N1P] [UV^1_51G1P]
[1^51N1TD] [UV^1_51G1TD]
[1^51P1C] [UV^1_51P1C]
[1^51P1P] [UV^1_51P1P]
[1^51P1TD] [UV^1_51P1TD]
[1^59PP] (Open Delta)
[UV^Healthy_Source_Voltage_Entry] / 100
[1^59P1P] (Wye)
[1^59PP2P] (Open Delta) [UV^M1SourceNomVoltage] * [UV^Sync_High_Thresh] / 100
[1^59P2P] (Wye) [UV^M1SourceNomVoltage] * [UV^Sync_High_Thresh] / 100
[1^59QP] [UV^1_59QP] * [UV^M1SourceNomVoltage] / 100
[1^59S1P] [UV^M1LoadNomVoltage] * [UV^Sync_High_Thresh] / 100
[1^59S2P] [UV^M1LoadNomVoltage] * [UV^Sync_Low_Thresh] / 100
[1^CFD] [UV^1_SV16PU] (Close Failure Time)
[1^CTR] [UV^1_CTR]
[1^CTRN] [UV^1_CTRN]
[1^DMTC] [UV^1_DMTC]
[1Ê25] Y
[1Ê51G] 1
[1Ê51N] 1
[1Ê51P] 1
[1ÊDEM] [UV^1_EDEM]
[1ÊSSI] [UV^1_ESSI]
[1ÊVOLT] Y

LDG0006-01
[1^PTR] [UV^1_PTR]
[1^PTRS] [UV^1_PTRS]
[1^RID] [UV^1_RID]
[1^SV10PU] [UV^Transfer_Initiate_Time_Delay]
[1^SV11PU] [UV^1_SV11PU] (Main Breaker Failure Trip)
[1^SV14DO] [UV^G_PB9D] * 60
[1^SV15DO] [UV^G_PB10D] * 60
[1^SV16PU] [UV^1_SV16PU] (Close Failure Time)
[1^SV1PU] [UVÂutomatic_Retransfer_Time_Delay]
[1^SV3PU] [UV^Transfer_Time_Close_Delay]
[1^SV4PU] [UV^Tie_Breaker_Open_Time]
[1^SV6PU] [UV^Max_Parallel_Time_Entry]
[1^SYNCP] [UV^1_SYNCP]
[1^TCLOSD] [UV^1_TCLOSD]
[1^TDURD] [UV^1_TDURD]
[1^TID] [UV^1_TID]
[1^VINT] [UV^1_VINT]
[1^VNOM] [UV^M1SourceNomVoltage]
[1^VSAG] [UV^1_VSAG]
[1^VSWELL] [UV^1_VSWELL]
[2^25ANG1] [UV^1_25ANG1]
[2^25SF] [UV^1_25SF]
[UV^M1SourceNomVoltage] * [UV^Sync_High_Thresh] / 100 *

[2^25VHI] [UV^M1_Source_is_greater] + [UV^M1LoadNomVoltage] *
[UV^Sync_High_Thresh] / 100 * [UV^M1_Load_is_greater]
UV^M1SourceNomVoltage] * [UV^Sync_Low_Thresh] / 100 *

[2^25VLO] [UV^M1_Load_is_greater] + [UV^M1LoadNomVoltage] *
[UV^Sync_Low_Thresh] / 100 * [UV^M1_Source_is_greater]
[2^27PP] (Delta)
[2^27P1P] (Wye)

LDG0006-01
[2^27PP2P] (Open Delta) [UV^M1LoadNomVoltage] * [UV^Sync_Low_Thresh] / 100
[2^27P2P] (Wye) [UV^M1LoadNomVoltage] * [UV^Sync_Low_Thresh] / 100
[2^27SP] [UV^M1LoadNomVoltage] * [UV^Dead_Bus_Voltage_Entry] / 100

[2^50P2P] [UV^1_50P2P]
[2^51G1C] [UV^1_51G1C]
[2^51G1P] [UV^1_51G1P]
[2^51G1TD] [UV^1_51G1TD]
[2^51N1C] [UV^1_51G1C]
[2^51N1P] [UV^1_51G1P]
[2^51N1TD] [UV^1_51G1TD]
[2^51P1C] [UV^1_51P1C]
[2^51P1P] [UV^1_51P1P]
[2^51P1TD] [UV^1_51P1TD]
[2^59PP] (Open Delta)
[2^59P1P] (Wye)
[2^59PP2P] (Open Delta) [UV^M1SourceNomVoltage] * [UV^Sync_High_Thresh] / 100
[2^59P2P] (Wye) [UV^M1SourceNomVoltage] * [UV^Sync_High_Thresh] / 100
[2^59QP] [UV^1_59QP] * [UV^M1SourceNomVoltage] / 100
[2^59S1P] [UV^M1LoadNomVoltage] * [UV^Sync_High_Thresh] / 100
[2^59S2P] [UV^M1LoadNomVoltage] * [UV^Sync_Low_Thresh] / 100
[2^CFD] [UV^1_SV16PU] (Close Failure Delay)
[2^CTR] [UV^1_CTR]
[2^CTRN] [UV^1_CTRN]
[2^DMTC] [UV^1_DMTC]
[2Ê25] Y
[2Ê51G] 1
[2Ê51N] 1
[2Ê51P] 1
[2ÊDEM] [UV^1_EDEM]
[2ÊSSI] [UV^1_ESSI]
[2ÊVOLT] Y
[2^PTR] [UV^1_PTR]
[2^PTRS] [UV^1_PTRS]
[2^RID] [UV^1_RID]
[2^SV10PU] [UV^Transfer_Initiate_Time_Delay]

LDG0006-01
[2^SV14DO] [UV^G_PB9D] * 60
[2^SV15DO] [UV^G_PB10D] * 60
[2^SV16PU] [UV^1_SV16PU] (Close Failure Delay)
[2^SV3PU] [UV^Transfer_Time_Close_Delay]
[2^SV6PU] [UV^Max_Parallel_Time_Entry]
[2^SYNCP] [UV^1_SYNCP]
[2^TCLOSD] [UV^1_TCLOSD]
[2^TDURD] [UV^1_TDURD]
[2^TID] [UV^1_TID]
[2^VINT] [UV^1_VINT]
[2^VNOM] [UV^M1SourceNomVoltage]
[2^VSAG] [UV^1_VSAG]
[2^VSWELL] [UV^1_VSWELL]
[G^LER] [UV^G_LER]
[G^NFREQ] [UV^G_NFREQ]
[G^PB10D] [UV^G_PB10D] * 60
[G^PB9D] [UV^G_PB9D] * 60
[G^PHROT] [UV^G_PHROT]
[G^PRE] [UV^G_PRE]
[L1^51G1TC] [RB^LT15] (Enable Residual Ground Element)
[L1^51N1TC] ![RB^LT15] (Enable Neutral Ground Element)
[L1^RST15] [UV^Ground_Enable_Y] * 1 + [UV^Ground_Enable_N] * 0
[L1^SET15] [UV^Ground_Enable_N] * 1 + [UV^Ground_Enable_Y] * 0
[L2^51G1TC] [RB^LT15]
[L2^51N1TC] ![RB^LT15]
[L1^BSYNCH] (Delta) 59S1 + !59S2 + 59AB2 + 27AB2
[L2^BYSNCH] (Delta) 59S1 + !59S2 + 59AB2 + 27AB2
[L1^BSYNCH] (Wye) 59S1 + !59S2 + 59A2 + 27A2
[L2^BYSNCH] (Wye) 59S1 + !59S2 + 59A2 + 27A2
[L2^RST15] [UV^Ground_Enable_Y] * 1 + [UV^Ground_Enable_N] * 0

LDG0006-01
[L2^SET15] [UV^Ground_Enable_N] * 1 + [UV^Ground_Enable_Y] * 0
[UV^1_TDURD] [UV^1_SV11PU] + 1 (Trip Duration/Breaker Failure)
[UV^2_CFD] [UV^1_SV16PU] (Close Failure Time)
[UV^2_DMTC] [UV^1_DMTC]
[UV^2_EDEM] [UV^1_EDEM]
[UV^2_ESSI] [UV^1_ESSI]
[UV^2_SV11PU] [UV^1_SV11PU] (Main Breaker Failure Time)
[UV^2_SV14DO] [UV^G_PB9D] * 60
[UV^2_SV15DO] [UV^G_PB10D] * 60
[UV^2_SV16PU] [UV^1_SV16PU] (Close Breaker Failure Time)
[UV^2_SV8PU] [UV^1_SV11PU] (Main Breaker Failure Time)
[UV^2_TDURD] [UV^1_TDURD]
[UV^2_VINT] [UV^1_VINT]
[UV^2_VNOM] [UV^M2SourceNomVoltage]
[UV^2_VSAG] [UV^1_VSAG]
[UV^2_VSWELL] [UV^1_VSWELL]
[UVÂutomatic_Retransfer_Time_Delay] [UVÂutomatic_Retransfer_Time_Delay_Entry] * 60
[UV^Dead_Bus_Voltage] [UV^Dead_Bus_Voltage_Entry] / 100
[UV^Delta_PT] [UV^Delta_PT_Entry]
[UV^Ground_Enable] [UV^Ground_Enable_Entry]
[UV^Ground_Enable_2] [UV^Ground_Enable_2_Entry]
[UV^Ground_Enable_2_N] [UV^Ground_Enable_2] = N
[UV^Ground_Enable_2_Y] [UV^Ground_Enable_2] = Y
[UV^Ground_Enable_N] [UV^Ground_Enable] = N
[UV^Ground_Enable_Y] [UV^Ground_Enable] = Y
[UV^Healthy_Source_Voltage] [UV^Healthy_Source_Voltage_Entry] / 100
[UV^M1_Load_is_greater] [UV^M1_Nominal_Ratio] < 1
[UV^M1_Nominal_Ratio] [UV^M1SourceNomVoltage] / [UV^M1LoadNomVoltage]
[UV^M1_Source_is_greater] [UV^M1_Nominal_Ratio] >= 1
[UV^M1DeltaN] [UV^Delta_PT] = N
[UV^M1DeltaY] [UV^Delta_PT] = Y
[UV^System_Voltage_P2G] / [UV^1_PTRS] * 1.73 *
[UV^M1LoadNomVoltage] [UV^M1DeltaY] + [UV^System_Voltage_P2G] / [UV^1_PTRS] *
[UV^M1DeltaN]
[UV^M1SourceNomVoltage] (Open Delta) [UV^System_Voltage_KV] * 1000 / [UV^1_PTR]
[UV^M1SourceNomVoltage] (Wye) [UV^System_Voltage_P2G] * 1000 / [UV^1_PTR]
[UV^M2_Load_is_greater] [UV^M2_Nominal_Ratio] < 1
[UV^M2_Nominal_Ratio] [UV^M2SourceNomVoltage] / [UV^M2LoadNomVoltage]

LDG0006-01
[UV^M2_Source_is_greater] [UV^M2_Nominal_Ratio] >= 1
[UV^M2Delta_PT] [UV^M2Delta_PT_Entry]
[UV^M2DeltaN] [UV^M2Delta_PT] = N
[UV^M2DeltaY] [UV^M2Delta_PT] = Y
[UV^System_Voltage_P2G] / [UV^2_PTRS] * 1.73 *
[UV^M2LoadNomVoltage] [UV^M2DeltaY] + [UV^System_Voltage_P2G] / [UV^2_PTRS] *
[UV^M2DeltaN]
[UV^M2SourceNomVoltage] (Open Delta) [UV^System_Voltage_KV] * 1000 / [UV^2_PTR]
[UV^M2SourceNomVoltage] (Wye) [UV^System_Voltage_P2G] * 1000 / [UV^2_PTR]
[UV^Max_Parallel_Time] [UV^Max_Parallel_Time_Entry] * 60
[UV^1_PTR] * [UV^RatioTestResult] + [UV^2_PTR] *
[UV^PTRTEST]
[UV^RatioResult2]
[UV^RatioResult2] [UV^RatioTest2] < 1
[UV^RatioTest] [UV^1_PTR] / [UV^2_PTR]
[UV^RatioTest2] [UV^2_PTR] / [UV^1_PTR]
[UV^RatioTestResult] [UV^RatioTest] <= 1
[UV^Sync_High_Thresh] [UV^Sync_High_Thresh_Entry]
[UV^Sync_Low_Thresh] [UV^Sync_Low_Thresh_Entry]
[UV^System_Voltage_P2G] [UV^System_Voltage_KV] * 1000 / 1.73
[UV^Tie_Breaker_Open_Time] [UV^Tie_Breaker_Open_Time_Entry] * 60
[UV^Transfer_Initiate_Time_Delay] [UV^Transfer_Intiate_Time_Delay_Entry] * 60
[UV^Transfer_Initiate_Voltage] [UV^Transfer_Initate_Voltage_Entry] / 100
[UV^Transfer_Time_Close_Delay] [UV^Transfer_Time_Close_Delay_Entry] * 60
Table 68 Design Variables Cross Reference
Design Variable Design Setting
1_25ANG1 Synchronism Check Maximum Angle
1_25SF Maximum Slip Frequency
1_50P2P Transfer Block Phase Overcurrent Level
1_51G1C Ground Time-Overcurrent Curve
1_51G1P Ground Time-Overcurrent Pickup
1_51G1TD Ground Time-Overcurrent Delay
1_51P1C Phase Time-Overcurrent Curve
1_51P1P Phase Time-Overcurrent Pickup
1_51P1TD Phase Time-Overcurrent Delay
1_59QP Negative-Sequence Voltage
1_CTR Phase CT Ratio

LDG0006-01
1_CTRN If Neutral Is Used, Enter Neutral Ground CT Ratio
1_DMTC Demand Meter Time Constant
1_EDEM Demand Metering Method
1_ESSI Enable VSSI Report
1_PTR Main 1 Source-Side PT Ratio
1_PTRS Main 1 Load-Side PT Ratio
1_RID Relay Identifier
1_SV11PU Breaker Trip Failure Time
1_SV16PU Breaker Close Failure Time
1_SYNCP Synchronizing Phase
1_TCLOSD Main 1 Breaker Close Time
1_TID Terminal Identifier
1_VINT Phase Voltage Interruption Pickup
1_VSAG Phase Voltage Sag Pickup
1_VSWELL Phase Voltage Swell Pickup
2_51G1C Ground Time-Overcurrent Curve
2_51G1P Ground Time-Overcurrent Pickup
2_51G1TD Ground Time-Overcurrent Delay
2_51P1C Phase Time-Overcurrent Curve
2_51P1P Phase Time-Overcurrent Pickup
2_51P1TD Phase Time-Overcurrent Delay
2_CTR Phase CT Ratio
2_CTRN If Neutral Is Used, Enter Neutral Ground CT Ratio
2_PTR Main 2 Source-Side PT Ratio
2_PTRS Main 2 Load-Side PT Ratio
2_RID Relay Identifier
2_SYNCP Synchronizing Phase
2_TCLOSD Main 2 Breaker Close Time
2_TID Terminal Identifier
Automatic_Retransfer_Time_Delay_Entry Automatic Retransfer Time Delay
Dead_Bus_Voltage_Entry Dead Bus Voltage
Delta_PT_Entry Is Main 1 Load-Side PT Connected Phase-to-Phase?
G_LER Event Report Length
G_NFREQ System Frequency

LDG0006-01
G_PB10D Trip Pushbutton Delay
G_PB9D Close Pushbutton Delay
G_PHROT System Phase Rotation
G_PRE Prefault Event Report Length
Use Neutral Elements Instead of Residual Elements for Ground

Ground_Enable_2_Entry
Protection?
Use Neutral Elements Instead of Residual Elements for Ground

Ground_Enable_Entry
Protection?
Healthy_Source_Voltage_Entry Healthy Source Voltage
M2Delta_PT_Entry Is Main 2 Load-Side PT Connected Phase-to-Phase?
Max_Parallel_Time_Entry Maximum Time Sources Can Be Paralleled in Close Transition Mode
Sync_High_Thresh_Entry Synchronism Check High-Voltage Threshold
Sync_Low_Thresh_Entry Synchronism Check Low-Voltage Threshold
System_Voltage_KV System Voltage
Tie_Breaker_Open_Time_Entry Tie Breaker Open/Main Breaker Close Delay for Retransfers
Transfer_Initiate_Voltage_Entry Transfer Initiate Voltage
Transfer_Intiate_Time_Delay_Entry Transfer Initiate Time Delay
Transfer_Time_Close_Delay_Entry Transfer Tie Close Time Delay
Summary of Logic and I/O Usage

The following table lists how the relay SELOGIC® control equations, latch bits, pushbuttons, MIRRORED
BITS communications, inputs, and outputs are used for the main and tie breaker control schemes. Elements
not listed, or listed as “Not Used,” are available for use in other control logic.
Table 69 Summary of Logic and I/O Usage

Element Main 1 and Main 2
SV1 Remote Source Healthy
SV2 Scheme Auto Ready
SV3 Automatic Transfer Tie Close
SV4 Automatic Retransfer – Tie Open (Open Transitions)
SV5 Automatic Retransfer – Main Close (Close Transitions)
SV6 Parallel Sources – Open Tie
SV7 Automatic Retransfer – Main Close (Open Transitions)
SV8 Tie Breaker Failure Trip
SV9 Local Source Healthy

LDG0006-01
SV10 Automatic Transfer Time Delay (Main Trip)
SV11 Main Breaker Failure Trip
SV12 Tie Breaker and Remote Breaker Closed
SV13 Automatic Transfer Block
SV14 Tie Close PB Delay
SV15 Tie Trip PB Delay
SV16 Tie Breaker Failure to Close
LT1 Automatic Transfer Enable
LT2 Automatic Retransfer Enable
LT3 Preferred/Alternate Select
LT4 Open Transition Enable
LT5 Lock Front Panel
LT6 Hot Line Tag
LT7 Not Used
LT8 Automatic Scheme Lockout
LT9 Automatic Scheme Lockout
LT10 Tie Breaker Manual Close
LT11 Tie Breaker Manual Open
LT12 Main Manual Trip
PB1/LED1 Automatic Transfer Enable
PB2/LED2 Automatic Retransfer Enable
PB3/LED3 Preferred/Alternate Select
PB4/LED4 Open Transition Enable
PB5/LED5 Front-Panel Lock
PB6/LED6 Hot Line Tag
PB7/LED7 Tie Breaker Close
PB8/LED8 Tie Breaker Trip
PB9/LED9 Main Breaker Close
PB10/LED10 Main Breaker Trip
LED11 Relay Enabled
LED12 Trip (Other Than Manual or Transfer Scheme)
LED13 Scheme Test Mode
LED14 Communications Error
LED15 Automatic Scheme Lockout
LED16 Current Overload (Transfers Blocked)
LED17 Time Overcurrent Trip
LED18 Under-/Overfrequency Trip

LDG0006-01
LED19 Automatic Scheme Ready
LED20 Main Breaker Failure
LED21 Tie Breaker Failure
LED25 LOP Condition Exists
LB1 Test Mode
TMB1A Local Main Breaker Status
TMB2A Automatic Transfers Enabled
TMB3A Local Source Healthy
TMB4A Open Transition Mode Enabled
TMB5A Local Load Bus Dead
TMB6A Scheme Lockout
TMB7A Preferred Source Selector
TMB8A Automatic Retransfers Enabled
IN101 Main Breaker Status (52A)
IN102 Tie Breaker Status (52A)
IN103 Breaker Racked-In
IN104 Scheme Lockout
IN105 Not Used
IN106 Not Used
OUT101 Main Breaker Trip
OUT102 Main Breaker Close
OUT103 Tie Breaker Trip
OUT104 Tie Breaker Close
OUT105 Not Used
OUT106 Not Used
OUT107 Scheme Alarm
ALARM Relay Self Test Alarm
Logic Descriptions and Diagrams

The default logic included with an SEL-351S when shipped from the factory must be changed using the
settings included in this Design Template in order for the transfer scheme to function as described. This is
accomplished by uploading the settings from the Design Template to the relays using ACSELERATOR
QuickSet software. The following is a detailed description of the logic settings used to accomplish the
functions particular to the main-tie-main application.
Note: All timers that trip or close a breaker have dropout times equal to the breaker failure time plus three
cycles to ensure trips and closes are held long enough to prevent contact damage.

LDG0006-01
Main Breaker Overall Trip Logic
The main breakers can be tripped by the serial communications OPEN command, overcurrent elements
(51P1T, 51G1T, 67P1, and 51N1T), the relay front-panel {MAIN TRIP} pushbutton, tie breaker fail trip (for
alternate source main breaker), and by the transfer scheme trip (SV10T). LT12 holds the {MAIN TRIP}
pushbutton and the serial communications OPEN command related trips. See Figure 4 for a logic diagram
of the overall trip logic.
LT12
(Pushbutton/Serial Command Trip)
Protection Trip
(51P1T + 51G1T + 67P1 + 51N1T)
RMB1A
(Remote 52A)
IN102 Anti Paralleling
(Tie Breaker SV12
Status)
Tie Breaker LT3 SV6

Failure (Preferred
Backup Source) OUT101
Tie Breaker
OUT103 Failure (Main
(Tie Breaker Breaker
Open) Open)
!TRGTR SV8
SV8T
52A
SV11T
LT8 (Main BF)
(Lockout) SV10T
Seal-In
LT1 Auto Scheme
(Auto Mode) Trip
Auto Wye 27A1 (27AB)

Scheme (Open 27B1 (27BC) SV10
Trip Logic Delta) 27C1 (27CA)
59Q
LOP
LB1
50P2
(Overcurrent Block)
RMB3A
(Remote Source Healthy)
Other Logic
(Involves Retransfers)
Figure 4 Overall Main Trip Logic
Manual Trip and Protection Trip

• The relay is tripped manually by pressing the {MAIN TRIP} pushbutton or asserting the serial
communications OPEN command. This asserts LT12, which will trip the main breaker. See
Figure 5 for pushbutton trip logic. The pushbutton trip is latched until either the main breaker
opens or the breaker failure timer times out.
• The main breaker and tie breaker trip if any of the following elements assert (see Figure 6):
– Phase time-overcurrent (51P1T)
– Ground time-overcurrent (51G1T)
– Phase instantaneous/definite time-overcurrent (67P1)
– Neutral time-overcurrent (51N1T)

LDG0006-01
Note: Overcurrent elements trip the main breaker and the tie breaker via the TRIP Relay Word bit. The
TRIP is held until the {TARGET RESET} pushbutton is pressed.
PB10
(Main Trip PB)
S SET Q
OC
(Serial Open Command)
R CLR Q
52A
SV11T
(Main Trip Failure)
Figure 5 Main Pushbutton/Serial Trip

51P1T
51G1T
67P1
51N1T
Figure 6 Protection Trip Logic
Tie Breaker Failure Backup Trip

If the tie breaker failure trip logic asserts and both main breakers are closed, the alternate source main
breaker trips to prevent source paralleling for an extended time. The following must all be true for a tie
breaker backup trip to occur:
• A tie breaker failure must occur (SV8T).
• All breakers must be closed (SV6).
• The local main is the alternate source (!LT3).
Automatic Transfer Trip (SV10T)

The timer (SV10T) serves as an automatic transfer tripping condition for the main breaker, and it asserts if
all of the following are true:
• The local source becomes unhealthy (27A1 + 27B1 + 27C1 + 59Q). The phase undervoltage
elements assert when the associated phase drops below the 27P1P threshold.
• There is not a loss-of-potential condition (!LOP). LOP supervision can be disabled via the front
panel to help ease testing via LB1.
• Auto transfers are enabled (LT1).
• The scheme is not in lockout (!LT8).
• There is no overload condition to prevent transfers (50P2).
• There is no blocking condition (!SV13). SV13 asserts and blocks transfer operations if the remote
source is not healthy.
• The local main breaker is closed (52A).
Note: For delta-connected loads, the parenthetical of this equation is substituted with (27AB + 27BC +
27CA + 59Q) and operates off the 27PP-setting threshold. The negative-sequence overvoltage
elements both operate off the 59QP setting.

LDG0006-01
Main Breaker Close Logic
The main breakers can be closed manually when automatic transfers are disabled or automatically on a
retransfer from the tie breaker. See Figure 7 for a logic diagram of the overall close logic.
Manual Close
The main breakers can be closed manually via the {MAIN CLOSE} pushbutton if all of the following conditions
are true:
• There is no hot line tag (LT6).
• Automatic transfers are disabled (!LT1).
• Either one of the following are true:
– Both sources are synchronized (25A1).
– The local source is healthy (SV9), and the bus is dead (27S).
• The pushbuttons are not locked (LT5).
Automatic Close
The main breakers can also be closed via two types of retransfers: open transitions (SV7T) or close
transitions (SV5T). When open transitions are selected, the tie breaker opens first on a retransfer, and then
the main closes. This prevents paralleling sources, and a synchronism check is not needed. When close
transitions are selected, the main breaker closes first on retransfers, and then the tie breaker opens. This
allows for no loss of load during retransfers, but the two sources are paralleled for a brief amount of time.
Common Logic for Open and Close Transitions

The following statements are common logic between close and open transitions. All must be true for either
transition to occur.
• Automatic transfers are enabled (LT1).
• Automatic retransfers are enabled (LT2).
• The local source is healthy, and the required time has been met (SV9T).
Close Transition Logic (SV5T)

All of the following must be true for close transitions to occur:
• The open transition mode is not asserted (!LT4).
• Both sources are synchronized (25A1).
• The remote source is healthy, and the required time has been met (SV1T).
Open Transition Logic (SV7T)

All of the following must be true for open transitions to occur:
• The tie breaker and remote main breaker are not both closed (!SV12T).
• The local breaker is open (!52A).

LDG0006-01
• The load side of the local breaker is dead (27S1). The load side of the main breaker must always
be dead to close. Otherwise, equipment such as motors connected to the bus can be damaged.
• At least one of the following conditions are true:
– The tie breaker is open (!IN102). Allow the local source to close in if the remote main is
closed, the tie is open, and the local source is healthy.
– The remote source is not healthy (!SV1T). Allow the scheme to close the local source if the
tie is closed, both mains are open, and only the local source is healthy.
– The local breaker is the preferred source (LT3). Allow the scheme to close the preferred
source first if the tie is closed, both mains are open, and both sources are healthy.
LT5 (FP Not
Locked)
LT6 (No
Hot Line Tag)
LT1
Manual Close Logic
(Auto Mode)
PB9
(Close Main)
CC
(SCADA Close)
25A1
(Synch Check)
SV9
(Loc. Src. Healthy)
27S
(Load Side Dead)
OUT102
Close
Main Breaker
Close
IN102
RMB1A
(Remote 52A) SV12 SV12T 52A
52A
Seal-In SV7T
Main Close
RMB3A
(Remote SV9)
SV7
Seal-In SV7T
LT3 SV7T
(Preferred Source)
27S
(Load Side Dead)
LT2
(Auto Return)
Common Logic
SV7 and SV5
59Q
3P59
SV9 SV9T
LT8
(Lockout) 52A
Seal-In SV5T
Main Close
LT4 (Open
Transition Mode)
25A1 SV5
Seal-In SV5T
(Synch Check) SV5T
Figure 7 Overall Main Close Logic
Tie Breaker Overall Trip Logic

The tie breaker can be opened manually using the {TIE OPEN} pushbutton or automatically during a retransfer.
The overcurrent elements that trip the main breaker also trip the tie breaker to isolate the faulted bus
section. See Figure 6 for protection trip logic. See Figure 8 for overall tie breaker trip logic.

LDG0006-01
Manual Trip and Protection Trip
The tie breaker is opened by pressing the {TIE TRIP} pushbutton. Once the pushbutton is pressed, SV15 (Tie
Breaker Trip Delay) asserts and sets LT11, which trips the tie breaker via OUT103. The tie breaker and
main breaker are tripped by any of the following protection elements:
• Phase time-overcurrent (51P1T)
• Ground time-overcurrent (51N1T or 51G1T)
• Phase instantaneous overcurrent (67P1)
Note: Overcurrent elements trip the main breaker and the tie breaker via the TRIP Relay Word bit. The
TRIP is held until the {TARGET RESET} pushbutton is pressed.
Automatic Open
The tie breaker can be opened automatically via two types of retransfers: open retransfers and close
retransfers. In an open retransfer, the tie breaker will open before the main closes. In a close retransfer, the
main closes first and then the tie opens. Two SELOGIC control equation timers accommodate both types of
retransfers.
Close Transition Logic (SV6T)

All of the following must be true for the tie breaker to open on close transition retransfers:
• The remote main is closed (RMB1A).
• The tie breaker is closed (IN102).
• The local main is closed (52A).
Note: The trip for the tie is sealed in until the breaker failure timer expires (plus three cycles).
While this logic is used to open the tie breaker for close retransfers, it also trips the tie breaker if all three
breakers are closed.
Open Transition Logic (SV4T)

All of the following must be true for the tie breaker to open on open transition retransfers:
• Automatic retransfers are enabled (LT2).
• Open transitions are enabled (LT4).
• The remote source is healthy (SV1T).
• The local source is healthy (SV9T).
Note: When both sources are healthy for the appropriate time, the tie breaker will open to begin the
retransfer.

LDG0006-01
Protection Trip
(51P1T + 51G1T + 67P1 + 51N1T)
RMB1A
(Remote 52A)
Parallel Sources Logic IN102
(Tie Status)
SV12
Tie Open
52A
SV6
SV6T
SV8T
(Tie Breaker Seal-In SV6T
Failure Timer)
Seal-In SV6T
LT1 (Auto
Mode)
LT2 (Auto
Return)
SV4
LT4 (Open
Transition Mode)
LT8 OUT103
Tie Open
(Lockout) SV4T
(Tie
RMB3A Breaker
(Remote SV9) Open)
SV1T Seal-In SV6T
59Q SV8T
3P59 IN102
SV9 SV9T Seal-In SV6T
Manual Tie Open
PB8 (Tie
Breaker Open)
S SET Q
SV15T
IN102 R CLR Q
LT11
Figure 8 Overall Tie Breaker Trip Logic
Tie Breaker Close Logic

The tie breaker can be closed manually via the {TIE CLOSE} pushbutton under certain conditions. The tie
breaker can also be closed automatically during an automatic transfer (SV3T). See Figure 9 for overall tie
breaker close logic.
Tie Breaker Manual Close Logic

The tie breaker is closed by pressing the {TIE CLOSE} pushbutton. Because there is no synchronism available
across the tie breaker, manual close must be supervised to ensure at least one bus is dead and the other bus
is healthy. Also, the tie breaker can not be permitted to close if both mains are already closed because the
tie would trip immediately via the parallel source logic (SV6T). All of the following must be true for
manual tie breaker closes to occur:

LDG0006-01
• The front panel is not locked (LT5).
• There is no local trip condition (!TRIP).
• Both mains are not closed !(52A * RMB1A)—one main must be open.
• One of the following must be true:
– The remote source is closed, healthy, and the local bus is dead (RMB1A * SV1 * 27S).
– The local source is closed and healthy, and the remote bus is dead (52A * SV9 * RMB5A).
• The {TIE CLOSE} pushbutton (PB7) is pressed.
Once all of these conditions are met, LT10 is asserted and closes the tie breaker via OUT104. The close
condition is removed when LT10 is reset. LT10 can be reset if any of the following conditions occur:
• The tie breaker close failure timer expires (SV16T)—when this timer expires, a tie breaker close
failure has occurred.
• The tie breaker closes before the tie breaker close failure expires (IN102).
Note: Both relays in the scheme can control the tie breaker manually. If one of those relays has detected a
fault, the trip contact remains asserted and prevents a manual close on the nonfaulted relay.
Tie Breaker Automatic Close Logic

The tie breaker can be closed automatically during an automatic transfer via the automatic tie breaker
transfer close logic (SV3T). For a tie breaker automatic close to occur, all of the following must be true:
• There is no lockout condition (!LT8).
• MIRRORED BITS communications is enabled (ROKA).
• The tie breaker is open (!IN102).
• The local main is closed (52A).
• The remote main is open (!RMB1A).
• The remote source is not healthy (!RMB3A).
• The remote bus is dead (RMB5A).
Once these conditions are met, the tie breaker will close. The close signal will remain sealed in until one of
the following occurs:
• The tie breaker closes successfully (IN102).
• The tie close breaker failure asserts (SV16T).

LDG0006-01
TRIP
LT5
(FP Unlocked)
PB7
(Tie Close)
LT1
(Auto Mode)
LT6 S SET Q OUT104
Tie Manual Close
(No Hot Line Tag) Tie Close

52A R CLR Q
RMB1A
(Remote 52A)
SV1
IN102
(Remote Healthy)
(Tie Breaker Status)
27S TRGTR SV16
(Local Bus Dead) (Target Reset) SV16T
52A SV16 Seal-In

SV9
(Local Healthy)
RMB5A
(Remote Bus Dead)
IN102 LT6
(Tie Breaker Status) (No Hot Line Tag)
52A
RMB3A
(Remote Healthy)
RMB1A SV3 Seal-In
(Remote Status) SV3T
Tie Automatic Close
LT1
(Auto Mode)
ROKA SV3
59Q
3P59
SV9
LT8 SV9T
(Lockout)
RMB5A
(Remote Bus Dead)
Figure 9 Overall Tie Breaker Close Logic
Automatic Transfer Enable Logic

The automatic transfer scheme is enabled and disabled by setting LT1 as shown in Figure 10. LT1 is set
using the {AUTO TRANSFER ENABLE} pushbutton on the front panel of either main breaker relay. Once the {AUTO
TRANSFER ENABLE} pushbutton is pressed on one relay, this information is transmitted via MIRRORED BITS
communications to the other relay (MIRRORED BIT 2A) to enable automatic transfers in both relays. For the
automatic transfer scheme to be enabled via the {AUTO TRANSFER ENABLE} pushbutton, the automatic transfer
scheme ready logic must be asserted (SV2). To assert SV2, all of the following must be true:
• The scheme is not locked out (!LT8).
• All the breakers are racked-in (IN103).
• The remote source is healthy (SV1T).
• The local main is closed (IN101).
• The remote main is closed (RMB1A).
• MIRRORED BITS communications is good (!RBADA).

LDG0006-01
LT1 is reset if the {AUTO TRANSFER ENABLE} pushbutton in either relay is pushed again, or if the falling edge of
RMB2A is received. The scheme is also reset if any type of lockout condition (LT8) occurs.
PB1
(Auto Transfer En.)
LT5
(FP Unlocked)
RMB2A
(Remote Relay LT1)
LT8
(Lockout)
IN103
(All Breakers Racked-In)
Auto Scheme Ready Logic
SV9T
(Local Source Healthy)
SV1T
IN101
(Local Main Status) SV2
RMB1A
(Remote Main Status) S SET Q
IN102
(Tie Status)
R CLR Q
RBADA
(MB Comm Bad) LT1
PB1
(Auto Transfer En.)
LT5
(FP Unlocked)
RMB2A
(Remote Relay LT1)
LT8
(Lockout)
Figure 10 Automatic Transfer Enable Logic
Automatic Retransfer Enable Logic

Automatic retransfer is enabled and disabled by setting LT2 in either main breaker relay. LT2 is set using
the {AUTO RETRANSFER ENABLE} pushbutton on the front panel of either main breaker relay. Once the {AUTO
RETRANSFER ENABLE} pushbutton is pressed on one relay, this information is transmitted via MIRRORED BITS
communications to the other relay (MIRRORED BIT 8A) to enable automatic retransfers in both relays. See
Figure 11 for automatic retransfer enable logic. To enable automatic retransfers, all the following must be
true when the {AUTO RETRANSFER ENABLE} pushbutton is pressed:
• The front panel is not locked (LT5).
• The scheme is not locked out (!LT8).
If LT2 is asserted, LT2 is reset if any of the following are true:
• The {AUTO RETRANSFER ENABLE} pushbutton is pressed and the front panel is not locked (LT5).
• The remote relay has disabled automatic retransfers (\RMB8A).
• The scheme is in lockout (LT8).

LDG0006-01
PB2
(Auto Retransfer En.)
LT5
(FP Unlocked)
RMB8A
(Remote Relay LT2)
LT8
(Lockout)
IN102
LT1
(Auto Transfer En.)
LT2
S SET Q
(Auto Retransfer En.)
PB2 R CLR Q
(Auto Retransfer En.) LT2
LT5
(FP Unlocked)
LT1
(Auto Transfer En.)
RMB8A
(Remote Relay LT2)
LT8
(Lockout)
Figure 11 Automatic Retransfer Enable
Breaker Trip and Close Failure Logic

Each relay is provided with logic that detects when the main or tie breaker has failed to respond to a trip or
close signal issued by the relay. This logic disables the automatic transfer scheme by setting the scheme
lockout latch (LT8). Once this latch is set, automatic transfers are disabled by resetting LT1. The breaker
failure logic also illuminates the LED that corresponds to the breaker that failed—MAIN FAIL for a main
breaker failure or TIE FAIL for a tie breaker failure. The display points on the front of the relay will indicate if
the failure was on a close (DP1) or on a trip (DP8). All breaker failure timers are sealed in until the {TARGET
RESET} pushbutton is pressed on the relay. The main close failure logic is built into the relay using the CF
Relay Word bit.
Main Breaker Trip Failure

A main breaker trip failure occurs when the breaker fails to operate within the specified breaker failure time
(SV11PU). The main breaker trip failure is supervised by a breaker contact (52A). See Figure 12 for main
breaker trip failure logic.
TRGTR
(Target Reset PB)
OUT101
(Main Trip) SV11T
52A
(Main Status)
Figure 12 Main Breaker Trip Failure

Note: Main breaker close failure is included in the relay internal logic. The Relay Word bit CF asserts for a
main close failure condition.

LDG0006-01
Tie Breaker Trip Failure
A tie breaker trip failure occurs when the breaker fails to operate within the specified breaker failure time
(SV8PU). The tie breaker trip failure is supervised by a breaker contact (52A). See Figure 13 for tie breaker
trip failure logic.
TRGTR
(Target Reset PB)
OUT103
(Tie Trip) SV8T
IN102
(Tie Status)
Figure 13 Tie Breaker Trip Failure
Tie Breaker Close Failure

A tie breaker close failure occurs when the breaker fails to close within the specified close breaker failure
time (SV16PU). See Figure 14 for tie breaker close failure logic.
TRGTR
(Target Reset PB)
OUT104
(Tie Close) SV16T
IN102
(Tie Status)
Figure 14 Tie Breaker Close Failure
Automatic Scheme Lockout Logic

The automatic scheme lockout latch (LT8) disables automatic transfers if any number of conditions occur
that could lead to unreliable or undesirable operations. If LT8 asserts while the automatic transfer scheme is
enabled, then the scheme will be disabled. Also, the automatic transfer scheme cannot be enabled while any
condition of the automatic scheme lockout logic is true. Once the lockout condition is fixed, the lockout
latch can be reset via the {TARGET RESET} pushbutton. Because there are a number of conditions that can
lockout the scheme, LT9 is also used to assert LT8. See Figure 15 for automatic scheme lockout logic. Any
of the following conditions will assert LT8 and lockout the automatic transfer scheme if automatic transfers
are enabled (LT1):
• MIRRORED BITS communications is bad (RBADA).
• Not all of the breakers are racked-in (!IN103).
• The main breaker trip failure asserts (SV11T).
• The main breaker close failure asserts (CF).
• The tie breaker close failure asserts (SV16T).
• The tie breaker trip failure asserts (SV8T).
• A main breaker trip is issued that is not related to an automatic transfer scheme trip. This includes
any protection trip (overcurrent elements) or a manual pushbutton trip.
• The automatic scheme lockout input asserts (IN104).
• The remote breaker detects a scheme lockout (/RMB6A).

LDG0006-01
• The main status changes without OUT101 being asserted. This would indicate an external trip not
issued by the relay.
• The tie breaker status changes but no automatic scheme trip was issued. This would indicate an
external trip not issued by the relay.
Note: Any external trip issued to any breaker will disable automatic transfers.
RBADA
(MB Comm Bad)
IN103
(Breakers Racked-In)
52A
(Local Main Status)
OUT101
(Main Breaker Trip)
LT1
(Auto Transfer En.)
LT1
(Auto Transfer En.)
S SET Q
IN102
R CLR Q
SV4T
(Auto Retransfer Tie Trip) LT9 S SET Q
R CLR Q
SV6 LT8
(Tie Trip Parallel Sources)
TRGTR
(Target Reset PB)
IN104
(Lockout Input)
SV11T
(Main Trip Failure)
CF
(Main Close Failure)
SV16T
(Tie Close Failure)
Trip
(Protection or Manual Trip)
SV8T
(Tie Trip Failure)
IN104
(Lockout Input)
RMB6A
(Remote Scheme Lockout)
LT1
(Auto Transfer En.)
Figure 15 Scheme Lockout
Preferred/Alternate Source Logic

The preferred/alternate source logic is used in two cases:
• If the tie breaker fails to trip and all three breakers are closed, the alternate source breaker will trip
as a backup for the tie breaker failure. This will prevent the two sources from being parallel in the
event of a tie breaker trip failure.

LDG0006-01
• If the tie breaker is the only breaker closed and both sources return simultaneously, the preferred
source will close first, and then the alternate source will close in. A staggered return is needed in
case both sources are not synchronized.
The preferred/alternate source logic is toggled via PB3. When PB3 is pressed on one relay,
MIRRORED BIT 7A is sent to the other relay to change the status. This should be set up before the scheme is
enabled. Figure 16 shows the preferred/alternate source logic.
RMB7A
(Remote LT3 Status)
ROKA
(MB Communications OK)
PB3
(Preferred/Alternate PB)
LT5
(FP Not Locked) S SET Q
R CLR Q
RMB7A
(Remote LT3 Status) LT3
ROKA
(MB Communications OK)
PB3
(Preferred/Alternate PB)
LT5
(FP Not Locked)
Figure 16 Preferred/Alternate Source Selection
Open Transition Enable

The open transition enable logic determines the type of retransfers the scheme will perform. If open
transitions are chosen, the tie breaker will open, and then the main breaker will close on retransfers. If
closed transitions are chosen, the main breaker will close first with a synchronism check, and then the tie
breaker will open on retransfers. When LT4 is asserted, open transitions are enabled. When LT4 is
deasserted, close transitions are enabled. The state of LT4 is controlled via the {OPEN TRANSITION ENABLE}
pushbutton. The remote relay can toggle the local status of LT4 via MIRRORED BIT 4A. See Figure 17 for
open transition enable logic.

LDG0006-01
LT4
(Open Transition Enable)
PB4
LT5
(FP Not Locked)
S SET Q
RMB4A
(Remote LT4)
R CLR Q
LT4 LT4
PB4
LT5
(FP Not Locked)
RMB4A
(Remote LT4)
Figure 17 Open Transition Enable
Scheme Alarm Logic

OUT107 on both relays is programmed to close on several scheme and system alarm conditions and can be
used for remote monitoring. See Figure 18 for scheme alarm logic. Any of the following conditions will
provide an alarm:
• A tie breaker trip failure occurs (SV8T).
• A main breaker trip failure occurs (SV11T).
• A main breaker close failure occurs (CF).
• A tie breaker close failure occurs (SV16T).
• A scheme lockout occurs (LT8).
• MIRRORED BITS communications is down (RBADA).
• A loss-of-potential condition is detected (LOP).
Note: If the user is in test mode (LB1 asserted), the LOP condition will not assert an alarm.

LDG0006-01
SV8T
(Tie Breaker Trip Failure)
SV11T
(Main Breaker Failure Trip)
CF
(Main Breaker Close Failure)
SV16T
(Tie Breaker Close Failure)
LT8
(Scheme Lockout) OUT107
(Alarm)
RBADA
(MB Communications Bad)
LB1
(Test Switch Enable)
LOP
(Loss of Potential)
Figure 18 Alarm Output Contact
Other Logic
Automatic Transfer Block (SV13T)

SV13T is used to supervise main tripping conditions during automatic transfers (SV10T). SV13T will
block automatic transfers if the following condition is true:
• Remote source is not healthy (!RMB3A). The local main should not begin a transfer if the remote
source is not healthy.
Another condition that blocks an unintentional automatic retransfer is detailed below. All of the following
must be true to block automatic retransfers from occurring:
• Automatic retransfers are disabled (!LT2).
• The remote main breaker is open (!RMB1A).
• The local source is not healthy (!3P59).
• The remote source is healthy (RMB3A).
This logic blocks timer SV10T from tripping the local breaker during a retransfer condition, unless
retransfers are enabled.
If the scheme went through a transfer operation (local main breaker closed, tie breaker closed, remote main
breaker open) and then the local source went dead and the remote source became healthy, the scheme
would retransfer regardless of if retransfers were enabled or not. SV13 was added to prevent the local main
breaker from opening during this condition unless retransfers are enabled. See Figure 19 for automatic
transfer block logic.

LDG0006-01
RMB3A
SV13
(Auto Transfer Block)
LT2
(Auto Retransfers En.)
IN102
RMB1A
(Remote Breaker Status)
3P59
(Local Source Healthy)
RMB3A
Figure 19 Automatic Transfer Block Logic
Tie Breaker Trip/Close Pushbutton Logic

To accommodate the ability to use manual pushbutton trip and close delays on the tie breaker, timers were
created. These timers allow the user to program trip and close delays for pushbutton operations. See
Figure 20 for tie breaker trip and close pushbutton logic.
Note: If pushbutton time delays are used on the tie breaker, the associated led will not blink.
PB7
(Tie Breaker Close PB) LT10
(Tie Breaker
LT5 Manual Close)
(FP Not Locked) SV14T
PB8 LT1
(Tie Breaker Trip PB) (Tie Breaker
Manual Trip)
SV15T
Figure 20 Tie Breaker Trip and Close Pushbutton Logic

LDG0006-01
Flow Chart
The flow chart in Figure 21 shows the operation on the scheme for various situations when Automatic
Transfers and Automatic Retransfers are enabled.
Failed Source = Any phase voltage that drops below the Transfer Initiate Voltage setting
START
Healthy source = All phase voltages are above the Healthy Source Voltage setting
Dead Bus = Load-side voltage is below the Dead Bus Voltage setting
Both Sources Feeding Load,

Normal Operation
Yes Yes
Breaker Breaker Tie Breaker Open After

Lockout No
Closed? Opened? Maximum Parallel Time
One Source Both

Failed? Sources Failed? Yes
After Tie Opens and Bus
Is Dead, Close Main After
Main Close Delay
Yes Yes No
Did
Breaker Close?
Is One No Breaker Wait for Bus

No Voltage to Decay Yes No
Source Healthy? Operation
No
No Is Bus Dead?
Lockout
Yes Yes
Yes
Yes No After voltage has been
Open Breaker of healthy for Automatic
Failed Source After Return of Return of Both Retransfer Time, initiate a
Yes No
Transfer Initiate One Source Sources main breaker close (includes
Breaker
Time Delay relay time delay).
Opened?
No Action
No
After voltage has been
healthy for Automatic
Breaker Retransfer Time, initiate a Yes
Wait for Bus
Yes Dead Bus? No tie breaker open (includes
Opened? Voltage to Decay Are Sources
relay time delay).
In Sync?
Yes
Yes
No No
Yes
Close Tie Breaker Is Open Both Main

After Tie Breaker Transitions Yes Sources No Closed Source
Lockout Close Delay Open Breaker of
Enabled? Healthy? Healthy?
Failed Source After
Transfer Initiate
No Time Delay
No
Main
Yes No Action No Open Source Yes
Healthy?
Breaker Did Breaker
Yes Lockout No
Closed? Open?
No
Both Sources Loss of Second Yes

Healthy? Source? Did Breaker
Yes Close?
After voltage has been
healthy for Automatic
Retransfer Time, initiate a
Yes main breaker close (includes
relay time delay).
One Source Feeding Load RETURN TO
(Tie Closed) START
Figure 21 Scheme Flowchart

LDG0006-01
Relay Settings
The following is a list of the relay settings that will reside in the SEL-351S if the settings are sent to the
control using the default Design Template (no change to design settings). Modifying design settings will
result in changes to one or more of the relay settings. These settings are for the wye PT configuration.
Main Breaker 1 Settings

sho g
Global Settings:
PTCONN= WYE VSCONN= VS TGR = 180.00
NFREQ = 60 PHROT = ABC DATE_F= MDY
FP_TO = 15 SCROLD= 2 FPNGD = IG
LER = 15 PRE = 4 DCLOP = OFF DCHIP = OFF
IN101D= 0.50 IN102D= 0.50 IN103D= 0.50 IN104D= 0.50
IN105D= 0.50 IN106D= 0.50
EBMON = Y COSP1 = 10000 COSP2 = 150 COSP3 = 12
KASP1 = 1.20 KASP2 = 8.00 KASP3 = 20.00
LED12L= Y LED13L= N LED14L= N LED15L= N
LED16L= N LED17L= Y LED18L= Y LED19L= N
LED20L= N LED21L= N LED25L= Y LED26L= N
RSTLED= Y
PB9D = 0.00 PB10D = 0.00
Group Settings:
RID =MAIN BREAKER 1 TID =SWITCHGEAR A
CTR = 600 CTRN = 600
PTR = 120.00 PTRS = 120.00 VNOM = 66.47
Z1MAG = 2.14 Z1ANG = 68.86 Z0MAG = 6.38 Z0ANG = 72.47
LL = 4.84
E50P = 2 E50N = N E50G = N E50Q = N
E51P = 1 E51N = 1 E51G = 1 E51Q = N
E32 = N ELOAD = N ESOTF = N EVOLT = Y
E25 = Y EFLOC = N ELOP = N ECOMM = N
E81 = N E79 = N ESV = 16 EDEM = THM
EPWR = N ESSI = Y
50P1P = OFF 50P2P = 6.00
67P1D = 0.00 67P2D = 0.00
50PP1P= OFF 50PP2P= OFF
51P1P = 6.00 51P1C = U3 51P1TD= 3.00 51P1RS= N
51P1CT= 0.00 51P1MR= 0.00
51N1P = 1.500 51N1C = U3 51N1TD= 1.50 51N1RS= N
51N1CT= 0.00 51N1MR= 0.00
51G1P = 1.50 51G1C = U3 51G1TD= 1.50 51G1RS= N
51G1CT= 0.00 51G1MR= 0.00
27P1P = 53.18 27P2P = 59.82 59P1P = 59.82 59P2P = 73.12
59N1P = OFF 59N2P = OFF 59QP = 6.65
59V1P = OFF 27SP = 16.62 59S1P = 73.12 59S2P = 59.82
27PP = OFF 59PP = OFF
25VLO = 59.82 25VHI = 73.12 25SF = 0.042
25ANG1= 10.00 25ANG2= 40.00 SYNCP = VA TCLOSD= 0.00
DMTC = 15
PDEMP = OFF NDEMP = OFF GDEMP = OFF QDEMP = OFF
TDURD = 9.00 CFD = 60.00 3POD = 2.00 50LP = OFF
SV1PU = 600.00 SV1DO = 0.00 SV2PU = 0.00 SV2DO = 0.00
SV9PU = 600.00 SV9DO = 0.00 SV10PU= 300.00 SV10DO= 3.00
SV11PU= 8.00 SV11DO= 0.00 SV12PU= 0.00 SV12DO= 10.00
VINT = 10.00 VSAG = 90.00 VSWELL= 110.00

LDG0006-01
SELogic group 1
SELogic Control Equations:

TR =51P1T + 51G1T + 67P1 + 51N1T
TRCOMM=0
TRSOTF=0
DTT =0
ULTR =0
PT1 =0
LOG1 =0
PT2 =0
LOG2 =0
BT =0
52A =IN101
CL =SV5T + SV7T + !LT1 * (PB9 * LT5 + CC) * (25A1 + SV9 * 27S)
ULCL =TRIP
79RI =0
79RIS =0
79DTL =0
79DLS =0
79SKP =0
79STL =0
79BRS =0
79SEQ =0
79CLS =0
SET1 =!LT1 * (PB1 * LT5 + /RMB2A) * SV2
RST1 =LT1 * (PB1 * LT5 + \RMB2A) + LT8
SET2 =!LT2 * LT1 * (PB2 * LT5 + /RMB8A) * !LT8 * !IN102
RST2 =LT2 * (PB2 * LT5 + \RMB8A + !LT1) + LT8
SET3 =!LT3 * (PB3 * LT5 + \RMB7A * ROKA)
RST3 =LT3 * (PB3 * LT5 + /RMB7A * ROKA)
SET4 =!LT4 * (PB4 * LT5 + /RMB4A)
RST4 =LT4 * (PB4 * LT5 + \RMB4A)
SET5 =!LT5 * PB5
RST5 =LT5 * PB5
SET6 =!LT6 * PB6 * LT5
RST6 =LT6 * PB6 * LT5
SET7 =0
RST7 =0
SET8 =!LT8 * (/RMB6A + LT9 + SV11T + CF + SV16T + TRIP + SV8T + IN104) * LT1
RST8 =TRGTR * !IN104 * LT8
SET9 =(RBADA + !IN103 + LT1 * \52A * !OUT101) * !LT9 + LT1 * \IN102 * !(SV4T + SV6) * !LT9
RST9 =TRGTR * LT9
SET10 =\SV14T * !LT1 * LT6 * !(RMB1A * 52A) * !LT10 * (27S * SV1 * RMB1A + SV9 * 52A * RMB5A)
RST10 =LT10 * (IN102 + SV16T)
SET11 =\SV15T * !LT11
RST11 =!IN102 * LT11
SET12 =(OC + PB10) * !LT12
RST12 =(!52A + SV11T) * LT12
SET13 =0
RST13 =0
SET14 =0
RST14 =0
SET15 =1 * 1 + 0 * 0
RST15 =0 * 1 + 1 * 0
SET16 =0
RST16 =0
67P1TC=1
67P2TC=1
67P3TC=1
67P4TC=1
67N1TC=1
67N2TC=1
67N3TC=1
67N4TC=1

LDG0006-01
67G1TC=1
67G2TC=1
67G3TC=1
67G4TC=1
67Q1TC=1
67Q2TC=1
67Q3TC=1
67Q4TC=1
51P1TC=1
51N1TC=!LT15
51G1TC=LT15
51P2TC=1
51N2TC=1
51G2TC=1
51QTC =1
SV1 =RMB3A
SV2 =!LT8 * IN103 * SV9 * SV1 * IN101 * !IN102 * RMB1A * !RBADA
SV3 =!RMB3A * RMB5A * !RMB1A * LT1 * !LT8 * 52A * SV9T * !IN102 * ROKA + SV3T * !IN102 * !SV16T
SV4 =SV9T * IN102 * LT1 * !LT8 * LT2 * LT4 * SV1T * ROKA + SV4T * IN102 * !SV8T
SV5 =LT2 * !LT4 * 25A1 * LT1 * !LT8 * SV9T * SV1T * ROKA + SV5T * !52A
SV6 =SV12 * 52A + SV6T * IN102 * !SV8T
SV7 =!SV12T * SV9T * !52A * LT1 * !LT8 * (!IN102 + LT3 + !SV1T * ROKA) * LT2 * 27S + SV7T *
!52A
SV8 =OUT103 * IN102 + SV8T * !TRGTR
SV9 =3P59 * !59Q
SV10 =(!LOP + LB1) * (27A1 + 27B1 + 27C1 + 59Q) * !SV13 * LT1 * !LT8 * !50P2 * 52A + SV10T *
52A * !SV11T
SV11 =OUT101 * 52A + (SV11T * !TRGTR)
SV12 =IN102 * RMB1A * ROKA
SV13 =(!RMB3A + !LT2 * IN102 * !RMB1A * !3P59 * RMB3A)
SV14 =PB7 * LT5 * !TRIP
SV15 =PB8
SV16 =OUT104 * !IN102 + SV16T * !TRGTR
OUT101=TRIP + SV10T + (SV8T * SV6 * !LT3) + LT12
OUT102=CLOSE * LT6
OUT103=TRIP + SV6T + SV4T + LT11
OUT104=SV3T * LT6 + LT10
OUT105=0
OUT106=0
OUT107=SV8T + SV11T + CF + SV16T + LT8 + RBADA + LOP * !LB1
LED1 =LT1
LED2 =LT2
LED3 =LT3
LED4 =LT4
LED5 =!LT5
LED6 =!LT6
LED7 =IN102
LED8 =!IN102
LED9 =52A
LED10 =!52A
LED12 =TRIP
LED13 =LB1
LED14 =RBADA
LED15 =LT8
LED16 =50P2
LED17 =51P1T + 51G1T + 51N1T + 67P1
LED18 =81D1T
LED19 =SV2
LED20 =SV11T + CF
LED21 =SV8T + SV16T
LED25 =51G1 + 51N1
LED26 =LOP * !LB1
DP1 =RBADA
DP2 =!IN103
DP3 =LT8
DP4 =!SV9
DP5 =IN102
DP6 =LB1

LDG0006-01
DP7 =CF + SV16T
DP8 =SV8T + SV11T
DP9 =0
DP10 =0
DP11 =0
DP12 =0
DP13 =0
DP14 =0
DP15 =0
DP16 =0
SS1 =0
SS2 =0
SS3 =0
SS4 =0
SS5 =0
SS6 =0
ER =/51P1 + /51G1 + /OUT103 + /51N1
FAULT =51P1 + 51G1 + 51N1
BSYNCH=59S1 + !59S2 + 59A2 + 27A2
CLMON =0
BKMON =TRIP
E32IV =1
TMB1A =52A
TMB2A =LT1
TMB3A =SV9
TMB4A =LT4
TMB5A =27S
TMB6A =LT8
TMB7A =LT3
TMB8A =LT2
TMB1B =0
TMB2B =0
TMB3B =0
TMB4B =0
TMB5B =0
TMB6B =0
TMB7B =0
TMB8B =0
Text Labels:
NLB1 =TEST MODE CLB1 =OFF SLB1 =ON PLB1 =
NLB2 = CLB2 = SLB2 = PLB2 =
NLB10 = CLB10 = SLB10 = PLB10 =
NLB11 = CLB11 = SLB11 = PLB11 =
NLB12 = CLB12 = SLB12 = PLB12 =
NLB13 = CLB13 = SLB13 = PLB13 =
NLB14 = CLB14 = SLB14 = PLB14 =
NLB15 = CLB15 = SLB15 = PLB15 =
NLB16 = CLB16 = SLB16 = PLB16 =
DP1_1 =COMM FAIL DP1_0 =
DP2_1 =ABNORMAL TOC DP2_0 =
DP3_1 =ATS LOCKOUT DP3_0 =
DP4_1 =UNDERVOLTAGE DP4_0 =
DP5_1 =TIE BK CLOSED DP5_0 =TIE BK OPEN
DP6_1 =TST MODE ENBLD DP6_0 =
DP7_1 =CLOSE FAILURE DP7_0 =
DP8_1 =TRIP FAILURE DP8_0 =
DP9_1 = DP9_0 =
DP10_1= DP10_0=
DP11_1= DP11_0=
DP12_1= DP12_0=
DP13_1= DP13_0=
DP14_1= DP14_0=

LDG0006-01
DP15_1= DP15_0=
DP16_1= DP16_0=
79LL = 79SL =
Port 3
PROTO = MBA
SPEED = 38400 RTSCTS= N RBADPU= 15 CBADPU= 1000
RXID = 1 TXID = 2 RXDFLT=0X1XXX0X
RMB1PU= 1 RMB1DO= 1 RMB2PU= 1 RMB2DO= 1
Sequential Events Recorder trigger lists:

SER1 =OUT101,OUT102,OUT103,OUT104,IN101,IN102,IN103,TRIP,CLOSE,CF,SV10T,SV8
SER2 =LT1,LT2,LT3,LT4,LT5,LT6,LT7,LT8,LT9,SV1,SV2,SV3,SV4T,SV5,SV6,SV7,SV8T
SV9,SV10,SV11,SV12,SV16T,SV1T,SV11T
SER3 =RMB1A,RMB2A,RMB3A,RMB4A,RMB5A,RMB6A,RMB7A,RMB8A,SV2T,SV3T,SV4T,SV6T
SV12T,SV14T,SV16T,25A1,59Q,59AB,59BC,59CA,27A1,27B1,27C1,TMB5A
Load Profile settings:

LDLIST=0
LDAR = 15
Main Breaker 2 Settings

Global Settings:
PTCONN= WYE VSCONN= VS TGR = 180.00
NFREQ = 60 PHROT = ABC DATE_F= MDY
FP_TO = 15 SCROLD= 2 FPNGD = IG
LER = 15 PRE = 4 DCLOP = OFF DCHIP = OFF
IN101D= 0.50 IN102D= 0.50 IN103D= 0.50 IN104D= 0.50
IN105D= 0.50 IN106D= 0.50
IN201D= 0.50 IN202D= 0.50 IN203D= 0.50 IN204D= 0.50
IN205D= 0.50 IN206D= 0.50 IN207D= 0.50 IN208D= 0.50
EBMON = Y COSP1 = 10000 COSP2 = 150 COSP3 = 12
KASP1 = 1.20 KASP2 = 8.00 KASP3 = 20.00
LED12L= Y LED13L= N LED14L= N LED15L= N
LED16L= N LED17L= Y LED18L= Y LED19L= N
LED20L= N LED21L= N LED25L= Y LED26L= N
RSTLED= Y
PB9D = 0.00 PB10D = 0.00
Group 2
Group Settings:
RID =MAIN BREAKER 2 TID =SWITCHGEAR B
CTR = 600 CTRN = 600
PTR = 120.00 PTRS = 120.00 VNOM = 66.47
Z1MAG = 2.14 Z1ANG = 68.86 Z0MAG = 6.38 Z0ANG = 72.47
LL = 4.84
E50P = 2 E50N = N E50G = N E50Q = N
E51P = 1 E51N = 1 E51G = 1 E51Q = N
E32 = N ELOAD = N ESOTF = N EVOLT = Y
E25 = Y EFLOC = N ELOP = N ECOMM = N
E81 = N E79 = N ESV = 16 EDEM = THM
EPWR = N ESSI = Y
50P1P = OFF 50P2P = 6.00
67P1D = 0.00 67P2D = 0.00
50PP1P= OFF 50PP2P= OFF
51P1P = 6.00 51P1C = U3 51P1TD= 3.00 51P1RS= N
51P1CT= 0.00 51P1MR= 0.00
51N1P = 1.500 51N1C = U3 51N1TD= 1.50 51N1RS= N
51N1CT= 0.00 51N1MR= 0.00
51G1P = 1.50 51G1C = U3 51G1TD= 1.50 51G1RS= N
51G1CT= 0.00 51G1MR= 0.00

LDG0006-01
27P1P = 53.18 27P2P = 59.82 59P1P = 59.82 59P2P = 73.12
59N1P = OFF 59N2P = OFF 59QP = 6.65
59V1P = OFF 27SP = 16.62 59S1P = 73.12 59S2P = 59.82
27PP = OFF 59PP = OFF
25VLO = 59.82 25VHI = 73.12 25SF = 0.042
25ANG1= 10.00 25ANG2= 40.00 SYNCP = VA TCLOSD= 0.00
DMTC = 15
PDEMP = OFF NDEMP = OFF GDEMP = OFF QDEMP = OFF
TDURD = 9.00 CFD = 60.00 3POD = 2.00 50LP = OFF
SV9PU = 600.00 SV9DO = 0.00 SV10PU= 300.00 SV10DO= 3.00
VINT = 10.00 VSAG = 90.00 VSWELL= 110.00
SELogic group 2
SELogic Control Equations:

TR =51P1T + 51G1T + 67P1 + 51N1T
TRCOMM=0
TRSOTF=0
DTT =0
ULTR =0
PT1 =0
LOG1 =0
PT2 =0
LOG2 =0
BT =0
52A =IN101
CL =SV5T + SV7T + !LT1 * (PB9 * LT5 + CC) * (25A1 + SV9 * 27S)
ULCL =TRIP
79RI =0
79RIS =0
79DTL =0
79DLS =0
79SKP =0
79STL =0
79BRS =0
79SEQ =0
79CLS =0
SET1 =!LT1 * (PB1 * LT5 + /RMB2A) * SV2
RST1 =LT1 * (PB1 * LT5 + \RMB2A) + LT8
SET2 =!LT2 * LT1 * (PB2 * LT5 + /RMB8A) * !LT8 * !IN102
RST2 =LT2 * (PB2 * LT5 + \RMB8A + !LT1) + LT8
SET3 =!LT3 * (PB3 * LT5 + \RMB7A * ROKA)
RST3 =LT3 * (PB3 * LT5 + /RMB7A * ROKA)
SET4 =!LT4 * (PB4 * LT5 + /RMB4A)
RST4 =LT4 * (PB4 * LT5 + \RMB4A)
SET5 =!LT5 * PB5
RST5 =LT5 * PB5
SET6 =!LT6 * PB6 * LT5
RST6 =LT6 * PB6 * LT5
SET7 =0
RST7 =0
SET8 =!LT8 * (/RMB6A + LT9 + SV11T + CF + SV16T + TRIP + SV8T + IN104)
RST8 =TRGTR * !IN104 * LT8
SET9 =(RBADA + !IN103 + LT1 * \52A * !OUT101) * !LT9 + LT1 * \IN102 * !(SV4T + SV6) * !LT9
RST9 =TRGTR * LT9
SET10 =\SV14T * !LT1 * LT6 * !(RMB1A * 52A) * !LT10 * (27S * SV1 * RMB1A + SV9 * 52A * RMB5A)
RST10 =LT10 * (IN102 + SV16T)
SET11 =\SV15T * !LT11
RST11 =!IN102 * LT11
SET12 =(OC + PB10) * !LT12
RST12 =(!52A + SV11T) * LT12
SET13 =0

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RST13 =0
SET14 =0
RST14 =0
SET15 =1 * 1 + 0 * 0
RST15 =0 * 1 + 1 * 0
SET16 =0
RST16 =0
67P1TC=1
67P2TC=1
67P3TC=1
67P4TC=1
67N1TC=1
67N2TC=1
67N3TC=1
67N4TC=1
67G1TC=1
67G2TC=1
67G3TC=1
67G4TC=1
67Q1TC=1
67Q2TC=1
67Q3TC=1
67Q4TC=1
51P1TC=1
51N1TC=!LT15
51G1TC=LT15
51P2TC=1
51N2TC=1
51G2TC=1
51QTC =1
SV1 =RMB3A
SV2 =!LT8 * IN103 * SV9 * SV1 * IN101 * !IN102 * RMB1A * !RBADA
SV3 =!RMB3A * RMB5A * !RMB1A * LT1 * !LT8 * 52A * SV9T * !IN102 * ROKA + SV3T * !IN102 * !SV16T
SV4 =SV9T * IN102 * LT1 * !LT8 * LT2 * LT4 * SV1T * ROKA + SV4T * IN102 * !SV8T
SV5 =LT2 * !LT4 * 25A1 * LT1 * !LT8 * SV9T * SV1T * ROKA + SV5T * !52A
SV6 =SV12 * 52A + SV6T * IN102 * !SV8T
SV7 =!SV12T * SV9T * !52A * LT1 * !LT8 * (!IN102 + LT3 + !SV1T * ROKA) * LT2 * 27S + SV7T *
!52A
SV8 =OUT103 * IN102 + SV8T * !TRGTR
SV9 =3P59 * !59Q
SV10 =(!LOP + LB1) * (27A1 + 27B1 + 27C1 + 59Q) * !SV13 * LT1 * !LT8 * !50P2 * 52A + SV10T *
52A * !SV11T
SV11 =OUT101 * 52A + (SV11T * !TRGTR)
SV12 =IN102 * RMB1A * ROKA
SV13 =(!RMB3A + !LT2 * IN102 * !RMB1A * !3P59 * RMB3A)
SV14 =PB7 * LT5 * !TRIP
SV15 =PB8
SV16 =OUT104 * !IN102 + SV16T * !TRGTR
OUT101=TRIP + SV10T + (SV8T * SV6 * !LT3) + LT12
OUT102=CLOSE * LT6
OUT103=TRIP + SV6T + SV4T + LT11
OUT104=SV3T * LT6 + LT10
OUT105=0
OUT106=0
OUT107=SV8T + SV11T + CF + SV16T + LT8 + RBADA + LOP * !LB1
OUT201=0
OUT202=0
OUT203=0
OUT204=0
OUT205=0
OUT206=0
OUT207=0
OUT208=0
OUT209=0
OUT210=0
OUT211=0
OUT212=0
LED1 =LT1
LED2 =LT2

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LED3 =LT3
LED4 =LT4
LED5 =!LT5
LED6 =!LT6
LED7 =IN102
LED8 =!IN102
LED9 =52A
LED10 =!52A
LED12 =TRIP
LED13 =LB1
LED14 =RBADA
LED15 =LT8
LED16 =50P2
LED17 =51P1T + 51G1T + 51N1T + 67P1
LED18 =81D1T
LED19 =SV2
LED20 =SV11T + CF
LED21 =SV8T + SV16T
LED25 =51G1 + 51N1
LED26 =LOP * !LB1
DP1 =RBADA
DP2 =!IN103
DP3 =LT8
DP4 =!SV9
DP5 =IN102
DP6 =LB1
DP7 =CF + SV16T
DP8 =SV8T + SV11T
DP9 =0
DP10 =0
DP11 =0
DP12 =0
DP13 =0
DP14 =0
DP15 =0
DP16 =0
SS1 =0
SS2 =0
SS3 =0
SS4 =0
SS5 =0
SS6 =0
ER =/51P1 + /51G1 + /OUT103 + /51N1
FAULT =51P1 + 51G1 + 51N1
BSYNCH=59S1 + !59S2 + 59A2 + 27A2
CLMON =0
BKMON =TRIP
E32IV =1
TMB1A =52A
TMB2A =LT1
TMB3A =SV9
TMB4A =LT4
TMB5A =27S
TMB6A =LT8
TMB7A =LT3
TMB8A =LT2
TMB1B =0
TMB2B =0
TMB3B =0
TMB4B =0
TMB5B =0
TMB6B =0
TMB7B =0
TMB8B =0
Text Labels:
NLB1 =TEST MODE CLB1 =OFF SLB1 =ON PLB1 =

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NLB10 = CLB10 = SLB10 = PLB10 =
NLB11 = CLB11 = SLB11 = PLB11 =
NLB12 = CLB12 = SLB12 = PLB12 =
NLB13 = CLB13 = SLB13 = PLB13 =
NLB14 = CLB14 = SLB14 = PLB14 =
NLB15 = CLB15 = SLB15 = PLB15 =
NLB16 = CLB16 = SLB16 = PLB16 =
DP1_1 =COMM FAIL DP1_0 =
DP2_1 =ABNORMAL TOC DP2_0 =
DP3_1 =ATS LOCKOUT DP3_0 =
DP4_1 =UNDERVOLTAGE DP4_0 =
DP5_1 =TIE BK CLOSED DP5_0 =TIE BK OPEN
DP6_1 =TST MODE ENBLD DP6_0 =
DP7_1 =CLOSE FAILURE DP7_0 =
DP8_1 =TRIP FAILURE DP8_0 =
DP9_1 = DP9_0 =
DP10_1= DP10_0=
DP11_1= DP11_0=
DP12_1= DP12_0=
DP13_1= DP13_0=
DP14_1= DP14_0=
DP15_1= DP15_0=
DP16_1= DP16_0=
79LL = 79SL =
Port 3
PROTO = MBA
SPEED = 38400 RTSCTS= N RBADPU= 15 CBADPU= 1000
RXID = 2 TXID = 1 RXDFLT=0X1XXX0X
Sequential Events Recorder trigger lists:

SER1 =OUT101,OUT102,OUT103,OUT104,IN101,IN102,IN103,TRIP,CLOSE,CF,SV10T,SV8
SER2 =LT1,LT2,LT3,LT4,LT5,LT6,LT7,LT8,LT9,SV1,SV2,SV3,SV4T,SV5,SV6,SV7,SV8T
SV9,SV10,SV11,SV12,SV16T,SV1T,SV11T
SER3 =RMB1A,RMB2A,RMB3A,RMB4A,RMB5A,RMB6A,RMB7A,RMB8A,SV2T,SV3T,SV4T,SV6T
SV12T,SV14T,SV16T,25A1,59Q,59AB,59BC,59CA,27A1,27B1,27C1,TMB5A
Load Profile settings:

LDLIST=0
LDAR = 15

LDG0006-01
Using Design Templates
What Is a Design Template?

A Design Template is a customized user interface for manipulating the settings of any SEL product
supported by ACSELERATOR® QuickSet™ SEL-5030 Software. Design Templates are created with
™
ACSELERATOR QuickSet Designer SEL-5031 Software. They are stored as relay files in an
ACSELERATOR QuickSet software relay database file (*.rdb) and can be used with ACSELERATOR
QuickSet software.
This section gives general instructions for working with Design Templates in ACSELERATOR QuickSet
software. The graphical user interface (GUI) screen captures shown in this section are not specific to the
examples in the preceding sections of this Design Template.
Components
Design Templates consist of the following components:
• Design settings that are entered using a custom settings interface
• A set of design equations that use the design settings and/or constants to derive the device settings
• A device settings file that contains a complete set of the derived device settings
While some device settings are calculated by the equations, others are not affected by the Design Template
(see Figure 22). Generally, these other settings do not require any modification from the default values that
were established when the Design Template was developed.
Purpose and Function

The intention of a Design Template is to make available to the user only particular settings that might need
to be modified for a specific device application. These user-defined settings are referred to as design
settings. They are the settings that are accessible through the Design Template view in ACSELERATOR
QuickSet software. All of the actual device settings remain unseen when in the Design Template view; only
the design settings are visible in this view.
Note: For Design Templates written by SEL, SEL recommends that only users experienced with the
Design Template and the device settings attempt to directly modify any of the device settings in the
SEL device (such as through a terminal emulation program or front-panel interface) or within the
database via the settings editor. Incorrectly altering these settings (especially the logic) can result in
failure of the device to operate as intended for a specific application.

LDG0006-01
DESIGN SETTINGS DEVICE SETTINGS FILE
and
DESIGN EQUATIONS
Derived Settings
Settings modified and

manipulated by the
Design Template
DESIGN TEMPLATE DESIGN EQUATIONS
VIEW
Device settings are
Remaining Settings
Design settings are calculated when settings
entered in the Design in the Design Template
Settings not
Template view view are merged with
associated with a
design equations
design equation
remain unchanged
(user-defined settings) (user-defined equations)
Figure 22 Design Template Structure
Opening the Design Template

Follow the same steps to open a Design Template as you would when opening other device settings in
ACSELERATOR QuickSet software.
Step 1. Select File > Open… from the toolbar.
Figure 23 Open a Design Template

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Step 2. In the Open Settings dialog box, check the box labeled Show Settings with Design Templates
and then select the Design Template to open, as shown in Figure 24.
If the desired Design Template is not listed, then it is not in the currently active database. Select
Cancel. From the toolbar select File > Active Database… to select another database. Design
Templates can also be copied from other databases using the Database Manager… option under
the File menu.
Figure 24 Select Show Settings With Design Templates

When the Design Template is loaded, the view will default to the Design Template view as shown in
Figure 25.
Figure 25 Design Template View in ACSELERATOR QuickSet Software
Changing the Part Number

Each device in an ACSELERATOR QuickSet software database has a part number associated with it.
ACSELERATOR QuickSet software uses this part number to determine what rules to use for checking the

LDG0006-01
settings entered by the user. Before modifying the settings in the Design Template, configure the settings
part number to match the device with which you are working.
Step 1. From the toolbar select Edit > Part Number to open the Device Part Number dialog box.
Step 2. Modify the part number using the Device Part Number dialog box as shown in Figure 26.
When finished, click OK.
Figure 26 Configuring the Part Number in ACSELERATOR QuickSet Software

Step 3. Save the changes to the part number by selecting File > Save or Save As… from the toolbar.

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Design Settings
Design settings are organized in forms that can be selected using the tabs in the Design Template view or
by using the Design Template Manager directory tree on the left side of the Design Template view (see
Figure 27.
Figure 27 Design Template Manager Directory Tree
Sending Settings
To send the settings to the device, select File > Send… from the toolbar in the Design Template view, as
shown in Figure 28.
Figure 28 Sending Settings From the Design Template View

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ACSELERATOR QuickSet software will send only the groups of device settings that were specified when the
Design Template was developed. This option can be modified only by using ACSELERATOR QuickSet
Designer software.
It is important to note that the settings sent to the device are the device settings and not the design settings.
Because the design settings are not stored in the device, SEL recommends that a Design Template for each
installed device or relay be maintained in a database as a record of how the device is configured. Do not
modify device settings directly in the device via terminal communications or the front panel unless you
have a detailed knowledge of the interaction of design settings and device settings.
Design Template Reports

The following Design Template reports can be viewed and printed from ACSELERATOR QuickSet software:
• Design Report—a list of all design settings, including range, value, units, comments, and legend.
• Design Settings Sheet—the settings report with the Value field left blank.
• Design Equations Report—a list of design equations, including the value derived by the equation
and, for equations that calculate device settings, the value that will be used for the device setting.
A table is also included at the beginning of the report, which shows the design setting associated
with each design variable. The design variables are used in the equations, and the design settings
are the actual panel names presented to the user in the settings forms.
To view reports for the open Design Template, select File > Print Design… from the toolbar in the Design
Template view as shown in Figure 29. Use the Print Page Settings dialog box shown in Figure 30 to select
the report options; when finished, click OK. The selected report(s) will open in a print preview window.
The report can be printed or saved to an HTML file using the File menu.
Figure 29 Viewing and Printing Design Template Reports

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Figure 30 Design Report Options
Reading Settings From a Device

The design settings are not stored in the device, only the device settings are present. For this reason, when
you read settings from a device using ACSELERATOR QuickSet software, the settings will not be associated
with a Design Template unless you choose to perform a merge operation.
Device settings are read from the device by selecting File > Read from the toolbar in ACSELERATOR
QuickSet software. While the settings are being read, the transfer status is displayed. After the settings files
have been read, ACSELERATOR QuickSet software checks to see if Design Templates for the same device
model are in the active database. If so, you will have the option of merging the newly read settings with a
Design Template (see Figure 31). The merged data are stored as a new settings file in the database, so the
existing Design Template is unaffected by this merge operation. If you choose not to merge with a Design
Template (or there is no Design Template in the active database), then the settings will appear in the main
settings view.
Figure 31 Merge Dialog Box in ACSELERATOR QuickSet Software

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When device settings are merged with a Design Template, it is important to understand the merge process
and what the end result will be. A review of the Design Template structure is beneficial in order to
understand what happens when the merge operation is performed.
As stated previously, the Design Template consists of three major components:
• Design settings
• Design equations
• A complete set of derived device settings
Referring back to Figure 22, the design equations use the design settings (and sometimes constants) to
derive certain device settings. These derived device settings, while residing in the ACSELERATOR QuickSet
software database, are always controlled by an equation and cannot be directly manipulated by the user.
Additionally, the derived settings are not refreshed with settings read from the device during the merge
process because the design settings and design equations have precedence over derived device settings.
When a merge takes place, the design settings and design equations for the existing Design Template are
combined with the newly read device settings to form a new Design Template. Therefore, as the design
settings and design equations are merged with the device settings, it is possible that some of the newly read
settings will be recalculated so that they no longer match the settings in the device. ACSELERATOR
QuickSet software will notify the user that this condition exists before the merge is completed (see
Figure 32). The other difference that may occur is between the nonderived settings that were in the original
Design Template and the nonderived settings that have been read from the device. In this case, the settings
read from the device have precedence over those in the Design Template and will replace them.
ACSELERATOR QuickSet software also informs the user of this condition.
Figure 32 Final Step in Merging Settings and Design Template

As the preceding instructions indicate, it is not possible for ACSELERATOR QuickSet software to derive the
original design settings using the settings read from the device. Therefore, the Design Template that was
originally used to set the device should be maintained as a record of how the device was configured. If
there is any doubt about how a device is actually set, reading the settings and merging them with a Design
Template known to contain the desired settings will reveal if the device settings have been changed and no
longer match those settings in the original Design Template.
Merging a Design Template with settings read from the device is considered to be an advanced feature that
is rarely required. It is recommended, in most cases, that the merge option be declined at the time that
settings are retrieved.

LDG0006-01
SEL Solutions
Systems, Services, and Products for the

Protection, Monitoring, Control, Automation,
and Metering of Utility and Industrial Electric Power
Systems Worldwide
*LDG0006-01*

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SEL QuickSet™

Design Template Guide

SEL-351S Two-Relay Main-Tie-Main

Date Code 20080317 LDG0006-01

Description of Operations ............................................................................................ 9

Design Settings Descriptions and Settings Sheets ................................................. 15

Automatic Transfer Scheme Setup............................................................................ 29

Date Code 20080317 SEL Design Template Guide i

Using Design Templates............................................................................................. 73

ii SEL Design Template Guide Date Code 20080317

Date Code 20080317 SEL Design Template Guide iii

iv SEL Design Template Guide Date Code 20080317

Date Code 20080317 SEL Design Template Guide 1

Relay Selection and Connections

2 SEL Design Template Guide Date Code 20080317

Date Code 20080317 SEL Design Template Guide 3

OUT101 OUT103 IN104 IN104 OUT103 OUT101

Main 1 52A 52A Main 2

Figure 1 Relay Connections With Nonparallel CT Connections

Figure 2 Parallel CT Connections

4 SEL Design Template Guide Date Code 20080317

AUTO HOT LINE

Figure 3 SEL-351S Main Breaker Front-Panel Operator Interface

Table 1 Status and Target LEDs

Table 2 Operator Control Pushbutton and LED Functions

Date Code 20080317 SEL Design Template Guide 5

6 SEL Design Template Guide Date Code 20080317

Manual Transfer to Tie Breaker

Date Code 20080317 SEL Design Template Guide 7

Manual Retransfer to Main Breakers

8 SEL Design Template Guide Date Code 20080317

Automatic Transfer Initiation

Date Code 20080317 SEL Design Template Guide 9

Live-Source Seeking Logic

10 SEL Design Template Guide Date Code 20080317

Date Code 20080317 SEL Design Template Guide 11

Design Template Setting Nodes

General Settings Node Descriptions

General: System Information

Table 4 System Phase Rotation Setting

Table 5 System Voltage (Open Delta)

Date Code 20080317 SEL Design Template Guide 13

General: Manual Control and Breaker Failure Settings

Table 8 Trip Pushbutton Delay Setting

Table 9 Breaker Trip Failure Time Setting

Table 10 Breaker Close Failure Time Setting

General: Metering and Reports

14 SEL Design Template Guide Date Code 20080317

Table 13 Phase Voltage Interruption Pickup Setting

Table 14 Phase Voltage Swell Pickup Setting

Table 15 Demand Metering Method Setting

Table 16 Demand Meter Time Constant Setting

Table 17 Event Report Length Setting

Table 18 Prefault Event Report Length

Date Code 20080317 SEL Design Template Guide 15

Table 19 Main 1 Source-Side PT Ratio Setting

Table 20 Main 1 Load-Side PT Ratio Setting

Table 21 Is Main 1 Load-Side PT Connected Phase-to-Phase Setting

Table 22 Main 2 Source-Side PT Ratio Setting

Table 23 Main 2 Load-Side PT Ratio Setting

Table 24 Is Main 2 Load-Side PT Connected Phase-to-Phase Setting

16 SEL Design Template Guide Date Code 20080317

Table 26 Automatic Retransfer Time Delay Setting