Microprocessor

• A microprocessor is a semiconductor chip or a chipset that

implements the central processor of computer
• The microprocessor works as a brain of a microcomputer
• It consist of Arithmetic & Logic Unit and a Control Unit
• The microprocessor is characterized by
(a) Speed
(b) Word length
(c) Architecture
(d) Instruction Set

Central Processing Unit built on single chip is called

microprocessor
 FEATURES OF INTEL 8085
➢ The INTEL 8085 is an 8 bit NMOS microprocessor.

➢ It is a 40 pin I.C. (duel in line) fabricated on a single LSI chip. It uses a

single +5V supply for its operation.
The feature of 8085 include
1. It is a 8 bit microprocessor i.e. it can accept or provide 8 bit data
simultaneously.

2. It is a single chip. NMOS device implemented with 6200 transistors.

3. It requires a single +5V power supply.

4. It provide on chip clock generator, hence it does not require external

clock generator, but it requires external tuned circuit like LC, RC or
crystal.
5. It requires two phase, 50% duty cycle, TTL clock. These clock signals
are generated by an internal clock generator.

6. The maximum clock frequency is 3 MHz and minimum clock frequency

is 500 KHz.

7. It provides 74 out of 256 instructions with the following addressing

mode: Register, direct, immediate, indirect and implied.
8. The data bus is multiplexed with address bus. Hence it requires
external hardware to separate data lines from address line (This is the
drawback of 8085).

9. It provides 16 address lines; hence it can access 216 = 64 K bytes of

memory.

10. 8 bit I/O address. Hence it can access 28=256 Input ports & 256 Output
ports.

11. It generates performs the following arithmetic and logical operations

(a) 8 bit binary addition
(b) 16 bit binary addition
(c) 2 digit BCD addition
(d) 8 bit binary subtraction
(e) 8 bit logical AND, OR , EXOR, complement and shift
operations
12. It provides 5 level interrupts.
13. It provides on chip controller hence external bus controller is not
required.
14. It provides one accumulator, one flag register, 6 general purpose
registers and two special purpose registers.
15. It provides status for advanced control signals (Advanced control
signals are used in large system).
16. It can be used to implement three chip microcomputer (8085, 8155 and
8355).
17. It provides two serial I/O lines viz SOD and SID, hence serial
peripherals can be interacted with 8085 directly.
8085 FUNCTIONAL PIN DEFINITION
The 8085A is an 8 bit general purpose microprocessor having 40 pins and
works on +5V single power supply.

Fig.1 shows the pin diagram of 8085A.

Fig.1
To study the pin diagram we group the signals as shown in Fig.2. They
are as follows
1. Address Bus
2. Data Bus
3. Status Signals
4. Control Signals
5. Power Supply
6. Clock Signals
7. Interrupt Signals
8. Serial Input Output Signals
9. DMA Request Signals
10. Reset Signals

Fig.2
Symbol Name and Function
A8-A15 Address Bus :-
• These are output, tristate signals used as higher
order 8 bits of 16 bit address.

• These signals are unidirectional meaning that the

address is given by 8085 to select a memory or an
I/O device.

• These lines are tristated by 8085 in response to

following conditions (1) Reset (2) HOLD and (3) Halt
Symbol Name and Function
AD0-AD7 Multiplexed Address/Data Bus:-

➢ These are input/output, tristate signals having two set of signals.

➢ They are address and data. The lower order 8 bits of 16 bit address is multiplexed or
time shared with data bus.

➢ In an operation cycle during earlier part it is used as lower order address and in later
part it is used as data bus.

➢ But for peripheral devices we want separate address & data signals so these signals
are demultiplexed by using latch and an ALE signal. These lines are tristated by 8085
for conditions same as A8-A15.

➢ The multiplexed bus has advantages and disadvantages as well. The advantage is the
address and data lines are shared so less pins are required. But the disadvantage is it
requires separation of address and data lines. i.e. demultiplexing D0-D7 and A0-A7.

➢ When we compare multiplex address/data bus with complete parallel data/address bus
the later will require less time to read/write data. This less time required will increase
the speed of operation.
Symbol Name and Function
ALE Address Latch Enable:-

➢ This is an output status signal which is used to give information of AD0-AD7

contents.

➢ When a pulse occurs on ALE it indicates that the contents of AD0-AD7 are
address.

➢ When ALE is low it indicates that the contents are data.

➢ It is a positive going pulse of half clock pulse width generated when a new
operation or cycle is started by a microprocessor i.e during starting of T1
clock pulse of each operation or cycle.

➢ It is basically used to demultiplex address and data i.e. separate A0-A7 and
D0-D7. To achieve this, a latch is connected to AD0-AD7 and is controlled by
ALE signal.
Symbol Name and Function
ഥ
𝐈𝐎/𝐌 Input Output/ Memory:-

➢ This is an output status signal used to give status of operation to be

performed with memory or I/O device.

ഥ
➢ When 𝐈𝐎/𝐌=0, the microprocessor is performing a memory related
operation and when 𝐈𝐎/𝐌=1,ഥ the microprocessor is performing an
I/O device related operation.

➢ This is the signal which separates memory and I/O devices.

➢ To implement this 𝐈𝐎/𝐌 signal is combined with read & write control
signals and two sets of signals are generated one for memory &
other for I/O device.
Symbol Name and Function
S0 and S1 Status Signals S0 and S1:-
These are output status signals used to give status of what operation microprocessor is
performing (They tell the current operation which is in progress in 8085).

➢ These are generally not used in small systems but can be used to generate advanced
control signals for large systems.

➢ The S0 and S1 lines specify four different conditions of 8085 machine cycles.

➢ These 4 cycles are as follows

S0 S1 Cycle
0 0 Halt
0 1 Read
1 0 Write
1 1 Opcode Fetch
➢ When S0 and S1 is combined with 𝐈𝐎/𝐌 , we get machine cycle status of all the machine
cycles executed by 8085 as shown in table below
 8085 Machine Cycle Status & Control Signals
Machine Cycle Status
Machine Cycle Status
𝐈𝐎/𝐌 S1 S0 Status Control Signal
0 1 1 Opcode fetch RD = 0
0 1 0 Memory read RD = 0
0 0 1 Memory write WR = 0
1 1 0 I/O read RD = 0
1 0 1 I/O write WR = 0
1 1 1 Interrupt INTA = 0
acknowledge
Z 0 0 Halt RD,WR = 0
Z X X Hold & INTA = 0
Z X X Reset

Note: Z-Tristate (High Impedance) Condition

X-Unspecified Condition
Symbol Name and Function
𝐑𝐃 Read:-
➢ This is an active low, output control signal used to read data from memory of an I/O
device.
➢ To read data from device microprocessor selects a device, make data bus available for
data transfer & then generates signals RD to read data from selected device

➢ This line is tristated by 8085 for conditions same as A8 to A15.

𝐖𝐑 Write:-
➢ This is an active low, output control signal used to write data to memory or an I/O
device.

➢ To write data to device microprocessor selects a device and transfers data on data lines
& then generates signal WR.

➢ The signal WR indicates that the contents of data bus are to be written in the selected
device.

➢ This line is tristated by 8085 for conditions same as A8 to A15.

Symbol Name and Function
➢ This is an active high, input control signal.
READY
➢ It is used by microprocessor by check whether a peripheral is ready or not for data transfer.

➢ If READY is high during a read or write cycle, it indicates that the memory or peripheral is
ready for data transfer.

➢ If READY is low, it indicates that it is not ready & microprocessor will wait until ready goes
high.

➢ When it goes high it will complete the data transfer.

➢ The signal READY is used to synchronize slower peripherals to the faster microprocessor.
➢ This is an active high level & edge triggered, non maskable, highest priority interrupt.
TRAP
➢ When TRAP line is active microprocessor inserts internal restart automatically at address
0024.

➢ The net effect of TRAP is it transfers program control at address 0024 i.e. CALL 0024

➢ TRAP is usually used for power failure and emergency shutoff.

 Symbol Name and Function
RST7.5,RST6.5 Restart Interrupts:-
➢ These are active high edge (RST 7.5) or level (RST 6.5 and RST 5.5) triggered maskable
& RST5.5 interrupt.

➢ The priorities of these are TRAP, RST 7.5, RST 6.5, RST 5.5.

➢ When RST 7.5, RST 6.5 RST 5.5 is active microprocessor inserts internal restart
automatically at address 003C, 0034, 002C respectively.
➢
➢ The net effect is it transfers program control at address specified i.e. CALL address
specified above.
 Symbol Name and Function
INTR and 𝐈𝐍𝐓𝐀 Interrupt Request:-

➢ INTR is an active high level triggered general purpose interrupt.

➢ When INTR is active, microprocessor generate a interrupt acknowledge

signal 𝐼𝑁𝑇𝐴 .

➢ Using INTA, a request or CALL instruction can be inserted to jump to

the interrupt service routine.

➢ The INTR is enabled or disabled by software.

 Symbol Name and Function
➢ HOLD is an active high, input signal used by other controller to request
HOLD and HLDA microprocessor about use of address, data & control signals.

➢ When the microprocessor receives HOLD request signal, it completes

current machine cycle and will relinquish use of the bus.

➢ To implement this the microprocessor will tristate its address, data &
ഥ & stop using them.
control signals (RD , WR & IO/M)

➢ The microprocessor in response to HOLD generates a signal to

acknowledge the requesting device by HLDA signal.

➢ When HLDA is active it indicates that microprocessor has received

HOLD request & will relinquish the buses in next clock cycle.

➢ The other controller will use buses & upon completions of work will
remove HOLD signal. Because of this microprocessor will also make
HLDA low. The microprocessor takes control of buses half clock cycle
after HLDA goes low.
Symbol Name and Function
𝐑𝐄𝐒𝐄𝐓 𝐈𝐍 ➢ This is an active low, input reset signal used to clear program
counter i.e. 0000 and makes address, data & control lines
tristated.

➢ After reset the status of internal register and flags are

unpredictable.

➢ The CPU is held in the reset condition as along as RESET IN is

applied.

➢ After reset the microprocessor start executing instructions from

0000 H onwards.
RESET OUT ➢ This is an active high, output signal used to indicate that the
microprocessor is reset.

➢ This signal is used as system reset to reset other devices

connected in system.
 Symbol Name and Function
SID Serial Input Data:-

➢ This is an active high, serial input port pin used to

accept serial 1 bit data under software control.

➢ When a RIM instruction is executed the SID pin data is

locked in bit D2 of accumulator.
SOD Serial Output Data:-

➢ This is an active high, serial output port pin, used to

transfer serial 1 bit data under software control.

➢ When a SIM instruction is executed the SOD pin is set

or Reset depending on D7 and D6 bits of accumulator.
 Symbol Name and Function
X1X2 ➢ These are clock input signals, connected to crystal, LC or
RC network.

➢ The X1 and X2 pins drive the internal clock generator

circuit.

➢ The frequency is divided by 2 & used as operating

frequency.
CLK OUT ➢ This is an output signal, used as a system clock.

➢ The internal operating frequency is available on CLK OUT

pin.
Vcc and Vss ➢ Power supply Vcc - +5V

➢ Vss – Ground reference