IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO.

2, MARCH 2002 157

Impedance Specifications for Stable DC

Distributed Power Systems
Xiaogang Feng, Senior Member, IEEE, Jinjun Liu, Member, IEEE, and Fred C. Lee, Fellow, IEEE

Abstract—In a dc distributed power system, the interaction

between individually designed power modules/subsystems may
cause the instability of the whole system. In a small-signal sense,
system level stability is determined by the impedance ratio .
Here is the output impedance of the source module/subsystem,
and is the input impedance of the load module/subsystem. As
a result, an effective way to prevent system instability is defining
impedance specifications for modules/subsystems. This paper
briefly summarizes existing works and introduces our contri-
bution in defining impedance specifications. A new forbidden
region for impedance ratio on the -plane is proposed as
the system stability margin requirement. Based on this proposed
forbidden region, the impedance specifications of individual loads
are established. Further, a very practical measurement approach
is developed to examine whether or not the system stability margin
requirement of the forbidden region is satisfied.
Index Terms—Distributed power system, impedance, small-
signal stability, system stability.
Fig. 1. Typical dc distributed power system.

I. INTRODUCTION According to the Nyquist criterion, small-signal system stability

A DISTRIBUTED power system (DPS) physically is made
up of smaller power modules/subsystems, as illustrated in
Fig. 1. Usually these smaller modules/subsystems are designed
individually, i.e., each module/subsystem is designed based only
on the stability requirement in its stand-alone operation. As a
result, after system integration, the interaction between subsys-
tems may cause system performance degradation, or even insta-
bility [1], [5], [8]. A typical example is the system instability
caused by the negative resistive load ( ). The negative resis-
tive property of a load is generated by the close-loop control
of the load. As long as a negative resistive load is powered by
an ideal voltage source (with very low output impedance), the
system is stable. However, in case that the close loop controlled
load is powered by a nonideal source whose output impedance
is larger than in amplitude, the whole system may become
unstable.
For checking small-signal system stability, the concept of
impedance criterion was established by Middlebrook in 1976
[5]. As shown in Fig. 1, and are the output and input
impedances in the source-load interface. The impedance ratio
can be treated as a system loop gain (minor loop gain [5]).
Manuscript received September 3, 1999; revised November 12, 2001. This
work was supported by the MURI Program, Office of Naval Research and ERC
Shared Facilities, National Science Foundation, under Award EEC-9731677.
Recommended by Associate Editor M. E. Elbuluk.
X. Feng is with Power Management Product-Line, Analog Devices, Inc., San
Jose, CA 95134 USA (e-mail: gangfeng@ieee.org).
J. Liu and F. C. Lee are with the Center for Power Electronics Systems, Vir-
ginia Polytechnic Institute and State University, Blacksburg, VA 24061 USA
(e-mail: jjliu@vpec.vt.edu; fclee@vt.edu).
Publisher Item Identifier S 0885-8993(02)02255-X.
0885–8993/02$17.00 © 2002 IEEE
can be determined by whether or not the curve of circles
( 1,0) point in the -plane, as illustrated in Fig. 2.
Compared with ordinary stability-analysis tools for large-
scale systems, the impedance criterion has a big advantage.
It analyzes the whole system based on the I/O character
(impedance) of each subsystem, instead of on the detailed inner
properties of subsystems. Consequently, the effort in ensuring
system stability can be divided into two levels: system level and
component level. At the system level, impedance specifications
for each subsystem can be defined based on the requirements
for system stability. At the component level, the I/O impedance
of a module/subsystem is required to meet the specifications
for the system stability.
Many efforts have been made to define proper impedance
specifications for system stability. In [1], the concept of the for-
bidden region was established as a requirement for the system
stability margin. As a result, impedance specifications for the
entire load subsystem can be defined based on the forbidden
region [1], [2], [8]. However, it is difficult to define impedance
specifications for each individual load module based on the
same forbidden region introduced in [1], [2]. Another challenge
imposed by the forbidden region is in the measurement of the
system stability margin. In order to check whether the system
loop gain satisfies the stability margin defined by the
forbidden region, both the phase and magnitude information of
and have to be measured. Calculation of the system loop
gain is also complicated [3].
To overcome these difficulties, an alternate forbidden region
is proposed in this paper. The individual impedance specifica-
tion of each load is defined based on the proposed forbidden

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 158 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 2, MARCH 2002

Fig. 2. Impedance criterion.

region. A much simpler online measurement approach is devel-

oped to check whether the system loop gain has the stability Fig. 3. Existing forbidden region.
margin defined by the alternate forbidden region.

II. EXISTING WORK ON IMPEDANCE SPECIFICATIONS

According to the impedance criterion, the source-load inter-
action in a dc distributed power system is determined by the loop
gain . Therefore, the target of defining the impedance
specification for source/load subsystems is to prevent this loop
gain from circling the ( 1,0) point on the -plane.

A. Middlebrook’s Design Guideline

Middlebrook’s design guideline for a switch-mode converter
and its input filter [5] can be regarded as the earliest effort in
defining impedance specification. To prevent the interaction be-
tween a converter and its input filter, it was proposed that the
output impedance of the filter should be much smaller than Fig. 4. Existing entire load impedance specification.
the input impedance of the converter within all frequency
ranges, i.e., . quency range in which is bigger than dB. However,
If the above design guideline is followed, not only the small- should stay inside its valid region in the frequency range in
signal system stability is ensured, but also the dynamic decou- which is smaller than dB.
pling between the converter and its input filter is obtained. As a result, as long as the input impedance of the load
subsystem meets this specification, the system loop gain
B. Forbidden Region Concept and Load Impedance has no way to enter the forbidden region in Fig. 3, so small signal
Specification system stability is ensured.
However, in many dc distributed power systems, it is imprac- Compared with Middlebrook’s design guideline, this load
tical to have in all frequency ranges, since this impedance specification is less conservative. It allows
would require the design to be quite conservative and costly [1], when the phase difference between and is less than
[4]. 120 [6], [7].
To define a less conservative impedance specification, the This load impedance specification is actually a specification
concept of forbidden region was proposed [1], [2] as the system for the combined input impedance of the entire load sub-
stability margin requirement. As shown in Fig. 3, this forbidden system, as shown in Fig. 1. For application purposes, it is de-
region can be described as sirable to independently define the individual load impedance
specifications for . However, it is difficult to
dB establish the desirable individual load impedance specification
(1) based on the forbidden region in Fig. 3.

By keeping out of this forbidden region, small-signal III. ALTERNATE FORBIDDEN REGION FOR INDIVIDUAL
system stability can be ensured with a GM (gain margin) of LOAD IMPEDANCE SPECIFICATION
6 dB and PM (phase margin) of 60 . Additionally, it can prevent
To overcome the difficulty in defining individual load
the degradation of dc bus performance, as well as keeping the
impedance specification, an alternate forbidden region for
system from being conditional stable [1].
system loop gain is proposed, as shown in Fig. 5. This
Further, given that the output impedance of the source sub-
proposed forbidden region is described as
system is known, the forbidden region in Fig. 3 can be trans-
formed into the load impedance specification for . As shown
(2)
in Fig. 4, there will be no limitation for within the fre-

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 FENG et al.: IMPEDANCE SPECIFICATIONS FOR STABLE DC DISTRIBUTED POWER SYSTEMS 159

Fig. 5. Alternate forbidden region for Z =Z .

Fig. 7. Individual load impedance specification for Z (k = 1; 2; . . . ; n) .

where

(6)

Conclusion 1: The proposed individual load specification is

a sufficient condition such that the system loop gain owns
the stability margin defined by the forbidden region in Fig. 5. In
other words, (4) is a sufficient condition for (2).
The proof of conclusion (1) is given as follows.
If each of the loads connected to the dc bus meets the indi-
vidual specification in Fig. 7, i.e., each of the individual system
Fig. 6. Individual forbidden regions for Z =Z (k = 1; 2; . . . ; n) .
loop gains does not enter its indi-
vidual forbidden region in Fig. 6, then (4) is valid.
Similar to the existing forbidden region in Fig. 3, it prevents As shown in Fig. 1, the relationship between the entire load
from circling the ( 1,0) point with dB and impedance and the individual load impedance of each paral-
. leled load is given by
Based on the proposed forbidden region in Fig. 5, the indi-
vidual load impedance specification is established in the fol-
lowing “flow down” approach. As shown in Fig. 1, the source
module works with loads. The power level of the source and (7)
each load are known as .
Normally, there is the following relationship: As a result of (7)
(3) (8)
The individual forbidden region for each individual system
loop gain is defined by shifting the According to both (4) and (8), there is the following
1/2 vertical line (see Fig. 5), according to the power level of relationship:
each load, down to that in Fig. 6. This newly defined individual
forbidden region for in Fig. 6 can be described as

(4)

Given that is known, the individual impedance specifica-

tion for each load can be defined by transforming Fig. 6 into (9)
Fig. 7. For each load , if dB
, there is no phase limitation for ;
otherwise the phase of should satisfy Considering both (3) and (9), it is apparent that (2) is valid.
According to Conclusion 1, if the input impedance of each
(5) load module satisfies the proposed individual load specification,

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 160 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 2, MARCH 2002

Fig. 8. Proposed approach to check the system stability margin.

the system loop gain will have the stability margin de-
fined in Fig. 5.
(a)

IV. STABILITY MARGIN MEASUREMENT

Once a forbidden region is defined as the requirement for
system stability margin, the system loop gain needs to
be measured to examine whether or not this requirement is sat-
isfied, both in system design and system operation.
For the existing forbidden region in Fig. 3, the measurement
of the system loop gain is a rather complicated process. The im-
pedances of both source and load modules and need to
be recorded. Then the stability margin can be checked by the
calculation of the system loop gain . For the proposed
forbidden region in Fig. 5, a relatively simpler measurement ap-
(b)
proach can be established, as follows.
As illustrated in Fig. 8, an external small-signal sinusoidal Fig. 9. Examining the system stability margin.
perturbation current is injected into the dc bus when the
system is in the steady state of an operating point, and only the
small-signal response current in load side is measured.
Conclusion 2: If the source-load system owns the desired
stability margin, i.e., its system loop gain keeps out of the
forbidden region defined in Fig. 5, then the following inequality
(10) is valid within the entire frequency range , and vice versa

(10)
Fig. 10. Testing the system loop gain margin of a 48 V distributed power
For the purpose of brevity, the proof of Conclusion 2 is pro- system.
vided in the Appendix. Fig. 9 gives a graphic illustration of Con-
clusion 2. If within the whole frequency range, is al-
ways smaller than , as represented by the dotted line in
Fig. 9(a), then the system loop gain will keep out of the
forbidden region, as represented by the dotted line in Fig. 9(b),
indicating desired stability margin. Otherwise, if is
over in some frequency range, as represented by the
solid line in Fig. 9(a), then , represented by the solid line
in Fig. 9(b), will correspondingly cut into the forbidden region,
indicating an insufficient stability margin.
To demonstrate this proposed stability margin measurement
approach, an experiment is carried out on a 48 V dc DPS. As
shown in Fig. 10, the tested system consists of a PFC (power
factor correction) rectifier (1.5 kw, “PFC Min” from Vicor
Cooperation) as the source module, and a dc/dc converter
(100 w, 48 V/5 V, “2nd Generation Micro family” from Vicor
Cooperation) as the load module.
The system loop gain of this source-load system is illustrated
in Fig. 11. is well separated from the defined forbidden
region, indicating that the 48 V dc bus has sufficient stability
margin. Fig. 11. Stability margin of tested 48 V DPS.

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 FENG et al.: IMPEDANCE SPECIFICATIONS FOR STABLE DC DISTRIBUTED POWER SYSTEMS 161

Definition of D (! ).
Fig. 12. Proposed measurement indicates a sufficient stability margin.
Fig. 13.

The proposed stability margin measurement is implemented

simply with an impedance analyzer (HP4194A). As shown
in Fig. 10, the frequency-swept perturbation signal from the
HP4194A is injected into the dc bus through an isolation
transformer. The test probe of the HP4194A measures the load
current, while the reference probe of the HP4194A measures the
perturbation current. With its “transfer function measurement”
function, the HP4194A automatically gives the measured result
of . As shown in Fig. 12, within the whole Fig. 14. Measurement of D (! ).
measured frequency range, there is dB,
indicating that . According to Conclusion
2, the system loop gain is well-separated from the pro- 1) The physical meaning of , as illustrated in Fig. 13,
posed forbidden region. This agrees with the stability margin is that is equal to the ratio of “the distance be-
shown in Fig. 11. tween point (0,0) and ” and “the distance between
This is a very practical measurement approach for checking point ( 1,0) and .” Basic planar geometry knowl-
the system stability margin on the dc bus. For a low-power edge shows that if system loop gain is out of the
dc distributed power system, the measurement can be carried shadowed forbidden region, there is within
out with an impedance analyzer or a network analyzer. After the entire frequency range, and vice versa, i.e.,
a small-signal perturbation current is injected, only the ampli-
tude of two current signals (perturbation current and load side
(A2)
response current) needs to be measured for the stability margin
examination [9]–[15].
2) Based on basic circuit knowledge, can be mea-
V. CONCLUSION sured as follows.
As shown in Fig. 14, and are small-signal sinu-
The previous efforts in defining impedance specifications for soidal currents that respond to the perturbation current
system-level stability are summarized. An alternate forbidden in source and load sides, respectively, while is the
region for the system loop gain is proposed. The indi- small-signal sinusoidal bus voltage.
vidual load impedance specification is established based on the According to definition, there are
proposed forbidden region. Further, a practical measurement ap-
proach is developed to check the system stability margin; i.e.,
to check whether or not the system loop gain is out of the pro- (A3)
posed forbidden region. Only the amplitude of two current sig-
and
nals (perturbation current and load side response current) needs
to be measured for the stability margin examination. (A4)

APPENDIX Substitution of (A3) and (A4) into (A1) gives

This appendix provides a proof of Conclusion 2 of the paper,
based on basic math and circuit knowledge.
For the purpose of brevity, the following variable is defined: (A5)

(A1)
Based on (A2) and (A5), Conclusion 2 follows.

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 162
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Xiaogang Feng (M’98–SM’01) was born in China
in 1969. He received the B.S. degree from Zhejiang
University, China, in 1992, and the Ph.D. degree from
Shanghai University, China, in 1997, both in elec-
trical engineering.
Currently, he is an Application Engineer of
the Power Management Product-Line, Analog
Devices, Inc., San Jose, CA, with responsibility
in developing power management solutions for
notebook computers. In 2000, he was an Application
Engineer with Power Integration, Inc., Sunnyvale,
CA. From 1997 to 2000, he was a Postdoctoral Research Scholar at the Center
of Power Electronics Systems (CPES), Virginia Polytechnic Institute and
State University, Blacksburg. His research interests are power management
for computers, offline flyback ac/dc converter, modeling and control of power
electronics systems, distributed power system, and motor drive system.
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 17, NO. 2, MARCH 2002
Jinjun Liu (M’97) was born in China in 1970. He
received the B.S. and Ph.D. degrees from Xi’an Jiao-
tong University, Xi’an, Shaanxi, China, in 1992 and
1997, respectively, all in electrical engineering.
After graduation he became a Lecturer at Xi’An
Jiaotong University. Since December 1999, he has
been with the Center of Power Electronics Systems
(CPES), Virginia Polytechnic Institute and State
University, Blacksburg, as a Postdoctoral Research
Scholar. His research interests are modeling and
control of power electronics systems, and harmonic
suppression and reactive power compensation.
Dr. Liu is a member of China Electrotechnical Society, China Automation
Association, and China Power Supply Society.
Fred C. Lee (S’72–M’74–SM’87–F’90) received
the B.S. degree in electrical engineering from the
National Cheng Kung University, Taiwan, R.O.C.,
in 1968 and the M.S. and Ph.D. degrees in electrical
engineering from Duke University, Durham, NC, in
1971 and 1974, respectively.
He is a University Distinguished Professor with
Virginia Polytechnic Institute and State University
(Virginia Tech), Blacksburg, and prior to that he was
the Lewis A. Hester Chair of Engineering at Virginia
Tech. He directs the Center for Power Electronics
Systems (CPES), a National Science Foundation engineering research center
whose participants include five universities and over 100 corporations. In
addition to Virginia Tech, participating CPES universities are the University
of Wisconsin-Madison, Rensselaer Polytechnic Institute, North Carolina A&T
State University, and the University of Puerto Rico-Mayaguez. He is also
the Founder and Director of the Virginia Power Electronics Center (VPEC),
one of the largest university-based power electronics research centers in
the country. VPEC’s Industry-University Partnership Program provides an
effective mechanism for technology transfer, and an opportunity for industries
to profit from VPEC’s research results. VPEC’s programs have been able to
attract world-renowned faculty and visiting professors to Virginia Tech who,
in turn, attract an excellent cadre of undergraduate and graduate students.
Total sponsored research funding secured by him over the last 20 years
exceeds $35 million. His research interests include high-frequency power
conversion, distributed power systems, space power systems, power factor
correction techniques, electronics packaging, high-frequency magnetics, device
characterization, and modeling and control of converters. He holds 19 U.S.
patents, and has published over 120 journal articles in refereed journals and
more than 300 technical papers in conference proceedings.
Dr. Lee received the Society of Automotive Engineering’s Ralph R. Teeter
Education Award (1985), Virginia Tech’s Alumni Award for Research Excel-
lence (1990), and its College of Engineering Dean’s Award for Excellence in
Research (1997), in 1989, the William E. Newell Power Electronics Award,
the highest award presented by the IEEE Power Electronics Society for out-
standing achievement in the power electronics discipline, the Power Conver-
sion and Intelligent Motion Award for Leadership in Power Electronics Ed-
ucation (1990), the Arthur E. Fury Award for Leadership and Innovation in
Advancing Power Electronic Systems Technology (1998), the IEEE Millennium
Medal, and honorary professorships from Shanghai University of Technology,
Shanghai Railroad and Technology Institute, Nanjing Aeronautical Institute,
Zhejiang University, and Tsinghua University. He is an active member in the
professional community of power electronics engineers. He chaired the 1995
International Conference on Power Electronics and Drives Systems, which took
place in Singapore, and co-chaired the 1994 International Power Electronics
and Motion Control Conference, held in Beijing. During 1993–1994, he served
as President of the IEEE Power Electronics Society and, before that, as Pro-
gram Chair and then Conference Chair of IEEE-sponsored power electronics
specialist conferences.