On-line Measurement on Stability Margin 04 DC Distributed Power System*

Xiaogang Feng”, Fred C. Lee

Center for Power Electronics Systems

Virginia Polytechnic Institute and State University
..
Blacksburg, VA 24061-01 11
Email: <gangfeng@ieee.org>

Abstract - In a DC distributed power system, the system level
small-signal stability is determined by the minor loop gain,
which is an impedance ratio ZJZ, between source and load
power modules. This paper proposes a practical approach to
measure the stability margin of the minor loop gain ZJZ, online.
By injecting small-signal external perturbation current into
the DC bus and measuring the magnitude of the load side
response current L ,the system stability margin can be figured
out. Due to its simplicity in principle and implementation, this
proposed measurement is useful for both stability analysis in
system design and stability monitor in system operation.
I. INTRODUCTION
A distributed power system is physically made up of a
number of source and load modules, as illustrated in Fig. 1.
Usually each module is designed based on its own stand-
alone operation. As a result, after system integration, the
interaction between modules may cause performance
degradation, even system instability [ 1-41.
In small-signal sense, the system stability is determined by
the minor loop gain [4], which is the impedance ratio ZdZi
between source and load modules, as shown in Fig. 1. System
will be unstable if this minor loop gain does not satisfy the
_...-
DC bus Load subsystem
Load 1
- demonstrate the effective of this proposed method.
Load 2
Nyquist stability criterion condition. Therefore, the
measurement of minor loop gain becomes a fimdamental
technique in system stability of distributed power system.
Currently, the measurement of minor loop gain adopts the
iP most straightforward approach measure the impedance of
source and load modules Z, and Zi, and then calculate the
stability margin of the minor loop gain ZdZi. Since this
approach requires the measurement of both the magnitude
and phase properties of Zo and Zi, and also complicated
process of the complex division of ZdZi, it is neither a
convenient nor an economical method.
A simple measurement approach is proposed in this paper
to examine the minor loop gain of distributed power system.
By injecting small-signal external perturbation current i, into
the DC bus and measuring the magnitude of the load side
response current ;L, the system stability margin can be
figured out. T h s proposed measurement approach has the
following good features:
Simplicity in principle
Suitable for on-line measurement
Nonintrusive into any source/load modules
The whole paper is organized as follows. The concepts of
minor loop gain and system stability margin of distributed
power system are reviewed briefly in section 11. Then the
principle of the proposed measurement is introduced in
section 111, followed by the discussion on its implementation.
Finally, simulation and experiment results are provided to
11. SYSTEM STABILITY MARGIN

Impedance criterion is a practical way to analyze the small

signal stability of a distributed power system. As shown in
Fig. 2, if both the source and load subsystems are stable in
their stand-alone operations respectively, the small signal
stability of the whole system is determined by the minor loop
gain [4], which is the impedance ratio ZdZi between source
Fig. 1 Typical DC distributed power system and load modules.
.This work was supported primarily by the MuRI Program of the ONR (Ofice of Naval Research)
This work also made use of ERC Shared Facilities supported by the National Science Foundation under Award Number EEC-9731677

0 2000 IEEE
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 relative stability requires every points on loop gain curve are
separated from points (-1,O) by a certain distance, as a results,
the concept of forbidden region was proposed as a design
guideline to meet system relative stability requirement [131.
As shown in Fig. 4b, a forbidden region around point (-1,O)
can be defined, and the loop gain is required to neither cut
Zi into nor encircle this shadowed region.
Fig. 2 Impedance criterion

Actually, this so called "minor loop" is a voltage-current

feedback loop between souce and load modules. In the bolck
diagram of Fig. 3, this "minor loop " is highlighted with
thick arrows. Since both of the source and load modules are
stable in their stand alone operation, the stability of the whole
system is now determined by this inter-module "minor loop".

Fig. 4 Stability margin

There are a number of forbidden regions have been

introduced with different advantages [3,5]. One of them is
illustrated as the shadowed area in Fig. 5. It is required that
the minor loop gain Tm=ZJZi not cut into it, i.e.
U
Re 2 2-112 (3)
Fig. 3 Minor loop gain &
&
, in block diagram ( E i )

In Fig.3, source and load modules are modeled as two-

port networks, with four I/O paramenters (transfer functions)
AV,Ai, Zi, Zo for each, as described by (1).

[;]=[AV Zf' zo].["i] io

-Ai

According to Mason Formula, The overall input-to-output

voltage transfer function of the cascaded source-load
subsystems is also affected by the minor 1oop.gainas:
Fig.5 Forbidden region for minor loop gain Tm

Th~sforbidden region owns quite a few good features. It is

f7
According to Nyquist criterion, the basic system stability
requirement on ZdZi is that it does not encircle (-1,O) point
on the S-plane. Moreover, proper stability margin is also
required for both system stability robustness and dynamic
performance. As shown in Fig. 4a, traditional gadphase
margin is defined by only two points on the curve of loop
gain: the intersection point of loop gain and Re-axis, and the
intersection point of loop gain and unit circle. Meanwhile, the
able to guarantee gadphase margin, avoid conditional
stability and facilitate the definition of impedance
specification for individual load modules [6]. Besides, this
forbidden region will lead to the proposed sinrple
measurement of system stability margin.
111. ON-LINE STABILITY MARGIN MEASUREMENT
Once the forbidden region in Fig. 5 is defined as a
guideline for system stability margin, the minor loop gain
ZdZi should be measured to examine whether this guideline
is followed or not both in system design and system

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 operation. Especially in system operation, the designed
system stability margin is subject to change. As a small-
signal property, the minor loop gain changes at different
operating points. Parameter variation and fault conditions
may also reduce the designed stability margin. Therefore, an
online measurement on ZJZi can serve as a stability monitor.

The most straightforward approach for system stability

margin monitoring is to measure the impedance of source and
load modules Z, and Zi, and then calculate the stability
9.0 1m.o a- 04i 1.Ok LOk 5Jk qk)
margin of the minor loop gain ZJZi. Due to its complexity in
measurement and calculation, this approach is inconvenient
for online usage. A relatively simpler measurement approach
is proposed as follows.
Im
Proposed approach

As illustrated in Fig. 6, an extemal small-signal sinusoidal

perturbation current 3, is injected into the DC bus when
system is in the stead state of an operating point, and the
small-signal response current in load side iL is measured.
fi

Source
b)

Fig. 7 Examine system stability margin

Fig. 6 Proposed minor loop gain measurement approach
Proof of conclusion I :
First, let's define:
Conclusion 1: If the source-load system owns designed
stability margin, i.e. its minor loop gain Tm=ZdZi keeps out
of the defined forbidden region as shown in Fig. 5, the (5)
following inequality (4) is valid vithin allfiequency range
and vice versa.
The physical meaning of D,(w), as illustrated in Fig. 8, is
that Dl(o) is equal to the ratio of "the distance between point
(4) (0,O)and ZJZi" and "the distance between point (-1,O) and
ZJZi".
Fig.7 gives a graphic illustration of conclusion 1. If within
the whole interested frequency range, I ? L ( j a ) I is always
smaller than 1 $jo) I as the dotted line in Fig. 7a. Then the
minor loop gain ZJZi will keep out of the forbidden region as
the dotted line in Fig. 7b, indicating desired stability margin.
Otherwise, if ~ f L ( j o ) l is over ~P,(jo>l
in some frequency
range as the solid line in Fig. 7a, then ZJZ, the solid line in
Fig. 7b, will cut into the forbidden region correspondingly
and indicate an insufficient stability margin.

Fig. 8 The definition of Dl(o)

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 Basic plane geometry howledge shows that if minor loop
gain ZJZi is out of the shadowed forbidden region, there
is Dl(o)<l within all frequency range, and vice versa, i.e.
Based on basic circuit knowledge, measurement of Dl(w)
can be figured out as (7). Proof in detail is in appendix A.
(7)
Based on i) and ii), it is easy to draw conclusion 1.
An Dual Approach
For the stability margin measurement introduced in Fig. 6
and conclusion 1, an dual approach is also discovered. As
shown in Fig. 9, instead of an current perturbation, voltage
source Gp can be used to inject perturbation into the DC bus.
Consequently, source side response voltage Gs is measured.
Conclusion 2 serves the counterpart of conclusion 1
A
Fig. 9 An dual approach for stability margin measurement
Conclusion 2: If the source-load system owns designed
stability margin, i.e. its minor loop gain ZdZi keeps out of the
defined forbidden region as shown in Fig. 5, the following
inequality (8) is valid within allfiequency range and vice
versa.
Application
In stead of measuring all the gaidphase property of Z d Z ,
the above proposed approaches examine the system stability
margin directly to see whether the minor loop gain keeps out
of the defined forbidden region or not. Therefore, simple
feature is obtained: only the magnitude of the response
currentlvoltage needs to be measure, and only one inequality
relationship in (4)/(8) need to be check. The simple feature
leads to practical implementation.
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Obviously, the measurement can be carried out directly
with a commercial impedance analyzer. The reference of
perturbation pp(jo)can be introduced from the frequency-
swept output signal of the impedance analyzer, while
i L ( j o ) can be read through the test probe.
Actually, only partial functions of the impedance analyzer
are used for the measurement. Therefore, special purpose box
(circuit) can be built as a relatively cheaper implementation.
The specially built box can either serve as an independent
instrument to check system stability margin of a distributed
power system, or be integrated into a distributed power
system as a BIST (built-in self test) stability monitor.
According to the proposed measurement method, an
system stability margin monitor can be as simple as the one
in Fig. 10. Two basic functions are implemented inside the
monitor.
One is a signal generator of ip, the small-signal sinusoidal
perturbation current injected to the DC bus. Parameters for ip
can be input from an operator, such as the magnitude of ip,
the frequency of 3, (starting frequency, ending frequency,
number of frequency points for sweep, number of cycles at
each frequency point.) These parameters usually vary from
system to system.
The other part of the monitor contains a notch filter and a
comparator. The notch filter is for eliminating the DC
component and noise of other frequency in iL(t), the center
frequency of the notch filter is able to track the sweep
frequency of ip automatically. The comparator is used to
detect whether i L ( t ) is over 17, I or not. If it is, a warning
signal of "insufficient stability margin" will be sent out to
human operator andor high-level controller.
Fig. 10 System stability margin monitor
 IV. SIMULATION The derturbation current ip
is injected into the DC bus
when system is in steady state. Fig. 13 shows the response
Simulations have been camed out on a test-bed of DC source c k e n t in both frequency domain and time domain.
distributed power system. As illustrated in Fig. 11. The test-
bed owns a 800V DC bus, a lOOkw 3-phase PFC rectifier [7] The response current ;L is much smaller than Tp in
as the source module, a 80kw 3-phase inverter [8] as load 1, magnitude, indicating sufficient system stability margin.
and a 20kw DCDC converter [9] as load 2. The magnitude of
ip is set as 1A (PP value is 2A), about 1% of the DC current
in the DC bus.
nn J l I
"." II I
rrter

Load

-30.0 J' I
I I I I I I
50.0 100.0 03k OJk I.0k Z.0k f W)

a) i L in frequency domain

I
Fig. 11 Test bed of distributed power system

System in normal condition IU.0 I

2.OA

As a well-designed system, the test-bed system owns

sufficient stability margin in its normal operating condition.
The minor loop gain ZdZi is well separated from the
forbidden region, as shown in Fig. 12. I I I I I
I

.MU)
p.-
0.1 0.12 0.14 0.16 o.,l T(s4

b) i L in time domain

*. -
Fig. 13 Measured 1L shows sufficient stability margin

I
System in fault condition
*. 1.L. .Y *I. I.* 1l
f(WI

a) Impedance of test bed system A fault condition in the PFC rectifier is set up intentionally
to test the function of the. proposed stability monitor. The
bulk capacitor in the EM1 filter of the inverter is burn out,
causing a sudden drop of the magnitude in Zi, as shown in
Fig. 12a. As a result, the system minor loop expands in S-
plane and cuts into the round forbidden region as the solid
line in Fig. 12b.
Under the same perturbation, response current i L is over
i p in the frequency range around 3 H z , as shown in Fig. 14a
, alarming insufficient stability margin. In time domain, the
response current iL (t) is over 2A correspondingly, as shown
inFig. 14b.
-3.0 -2.0 -1.0 0.0 1.0 2.0

b) Minor loop gains of test bed system

Fig. 12 stability margin of the test bed system

~~

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 10.0 The minor loop gain of this source-load system is
illustrated in Fig. 16. ZJZi is well separated from the
0.0 defined forbidden region, indicating the 48V DC bus
sufficient stability margin.
-10.0

-20.0

40.0 J' I
I I I I I I
50.0 100.0 03k 05k l.0k 2.Ok f(W

a) iL in frequency domain

126.0 - t
2.0A
Fig. 16 Stability margin of tested 48V DPS

The stability margin monitor here is implemented simply

1 with an impedance analyzer (HP4194A). As shown in Fig.
15, the frequency-swept perturbation signal from the
HP4194A is injected into the DC bus through an isolation
II I I I I transformer. The test probe of the HP4194A measures the
ai 0.12 0.14 0.16 0.18 T(sec) load current, while the reference probe of the HP4194A
measures the perturbation current. With its "transfer function
measurement" function, the HP4 194A automatically gives the
b) 1L in time domain
measured result of I iL (jo) 1 / I I
,(jo) 1. As shown in Fig. 17,
within the whole measured frequency range, there is
Fig. 14 Measured 1L shows insufficient stability margin
I9,(jo)I/IIP(jo)I<OdB, indicating that Ii,(jo)<Iip(jo)I.
According to Conclusion 1, the system minor loop gain ZJZi
V. EXPERIMENT is well-separated from the round forbidden region. This quite
agrees with the stability margin shown in Fig. 16

To make a demonstration of the above proposed stability

margin monitoring approach, experiment is carried out on a
48V DC DSP. As shown in Fig. 15, the tested system consists
a PFC Rectifier (1Skw, "PFC Min" from Vicor Cooperation)
as the source module, and a DCIDC converter (loow,
48V/5V, "2nd generation Micro family" from Vicor
Cooperation) as the load module.

PFC Rectifier Ref. Probe Test Probe ? DCYDC

10 100 1.12 1.10~ I .I$ i.1o6Hz

Fig. 17 Proposedmeasurement indicates a sufficient stability margin

Perturbation signal
from HP4194A @$-I I
Fig. 15 Tested 48V distributed power system

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 CONCLUSION
To measure the stability margin of DC distributed power
system, a practical on-line measurement approach is
proposed. By injecting small-signal extemal perturbation
current i, into the DC bus and measuring the magnitude of
the load side response current ;L, the system stability margin
can be figured out. The measurement can be implemented
with a commercial impedance analyzer, or with a specially
built circuit. Simulation and experimental results are provided
to demonstrate the effectiveness of the proposed method.
APPENDIX A
This appendix provides a proof of measurement approach
of D , ( o ) i n (7) of the paper, based on basic circuit
knowledge.
As shown in Fig. A-1, is and iLare small-signal
sinusoidal currents response to ip in source and load sides
respectively, while G b is the small-signal sinusoidal bus
voltage.
According to definition, there are:
+b( jo)
Zi (jo)= v
iL(jw)
Substitution (A-1) and (A-2) into (A-3) gives:
(A-4)
Fig. A-1 The measurement of D,(o)
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REFERENCES
[I] C.M. Wildrick, F.C. Lee “A Method of Defining the Load Impedance
Specification for a Stable Distributed Power System,” IEEE
Transaction on Power Electronics, Vol. 10, No. 3, May. 1995, pp. 280-
5
[2] A. Patil, C. Wildrick, F. C. Lee “Assessment of space station power
system performance and stability,” quarterly progress review for NASA
Lewis Research Center, by Virginia Power Electronics Center,
VPI&SU, Blacksburg, VA, Oct. 1992.
[3] Xiaogang Feng, Z. Ye, K. Xing, Fred C. Lee and Dusan Borojevic,
“Impedance Specification and Impedance Improvement for DC
Distributed Power System,” PESC’99 Charleston, US, June, 1999,
~~889-94
[4] R.D. Middlebrook, “Input filter consideration in design and application
of switching regulators”, hoc. IEEE Industrial Application Society
Annual Meeting, 1976.
[5] Mohamed Belkhayat “Stability Criteria for AC Power Systems with
Regulated Loads”, Dissertation, Purdue Univ. Dec. 1997.
[6] Xiaogang Feng, Zhihong Ye, Kun Xing, Fred C. Lee and Dusan
Borojevic, “Individual Load Impedance Specification for a Stable DC
Distributed Power System”, APEC’99, Dallas, US, Mar. 1999, pp923-9
[7] Jia Wu, Heping Dai, Kung Xing, Fred C. Lee and Dushan Boroyevich
“Implementation of ZCT Soft-Switching Technique in a lOOkW PEBB
based Three-phase PFC Rectifier ”, PESC’99 Charleston, US, June,
1999, ~ ~ 6 4 7 - 5 2
[SI Richard Zhang “High Performance Power Converters for Nonlinear
and Unbalanced LoadlSource” Dissertation, VPI&SU, Blacksburg, VA,
Nov. 1998
[9] Gujit Thandi “Modeling, control and stability of a PEBB based DC
distributed power system,” Thesis, VPI&SU, Blacksburg, VA, Jun.
1997
[IO] G.S. Popkiron, R.N. Schindler “Optimization of the perturbation
signal for electrochemical impedance spectroscopy in the time
domain”. Review of Scientific Instrument Vol 64,No 11, Nov, 1993
pp3 1 11-5.
[I I ] Matthew B. Hams, Auther W.Kelley, Jason P. Rhode, and Mesut E.
Baran, “Instrumentation for measurement of line impedance“,
proceedings of APEC’94, pp887-93.
[12] Auther W. Kelley, John M. Wilson, Jason P. Rhode, and Mesut Baran,
”On-line wideband measurement of induction motor impedance”,
proceedings of IAS’95, pp647-54.
[I31 George W. Hart, “Nonintrusive appliance load monitoring”,
proceedings of the IEEE, Vol. 80, No.12, Dec 1992, pp1872-91
[I41 Steve B. Leeb and James L. Kirtley, Jr, “A multiscale transient event
detector for nonintrusive monitoring”, proceedings of IECON’93, Voll .
pp354-9.