Set A

Reg. No. 02190132

ROYAL UNIVERSITY OF BHUTAN

COLLEGE OF SCIENCE AND TECHNOLOGY
PHUENTSHOLING : BHUTAN

SUMMER SEMESTER EXAMINATION: 2012

Class : BE Third Year Electrical Engg.

Module : Microprocessor and Interfacing

Module Code : E 65

Max. Marks : 50

Max. Time : 3 Hrs

General Instructions:
1. Answer all the questions.

Page 1 of 12
Question No.1 [ 1,1]
1.1 What are the advantages of an assembly language in comparison
with high-level languages?
The assembly language programs are compact, require less memory
small size OK ‘memory’ is necessary
OK
space, and are more efficient than high-level language ones.
effective OK One answer 0.3 mark
Two answers 0.6 mark
Three answers 1 mark
1.2 Identify the difference between the ASCII and the extended ASCII
codes.
The ASCII code is a 7-bit code with 128 combinations. On the
0.2 mark 0.2 mark
other hand, the extended ASCII code is an 8-bit code with
0.2 mark
256 combinations, which includes additional graphic symbols.
0.2 mark 0.2 mark

Question No.2 [ 2,3,1,1,3]

2.1 Data byte E6H is stored in the accumulator and data byte 8FH,
4BH, and A3H are stored in registers B, C, and D, respectively.
Show the contents of registers B, C, D, E, and the accumulator after
the execution of the following two instructions:
MOV C,A
MOV B,C
SUB A
each 0.4 mark
MOV E,A
MOV B,D 00H → 0H − 0.1 mark
A = 00H, B = A3H, C = E6H, D = A3H, and E = 00H.
2.2 Given the following set of Hex codes, identify the mnemonics:
06
D3
0E
48
78
81
D6
Page 2 of 12
 1C
32
00
81
76
MVI B,D3H 3 mark
MVI C,48H
each 0.4 mark + 0.2 mark
MOV A,B one mistake − 0.4 mark
ADD C
SUI 1CH no H (Hexadecimal symbol) − 0.1 mark
STA 8100H (full mark consideration)
HLT
2.3 Identify and explain the results of Question 2.2.
The data byte FFH is stored in the memory location 8100H.
FFH is stored OK 1 mark
2.4 In Question 2.2, what does the tenth code 00 represent: i) data,
ii) low-order address, iii) high-order address, or iv) an opcode?
low-order address 1 mark
2.5 In Question 2.2, explain possible outcomes and the results if the
second code D3 is omitted.
The processor assumes the next code (0EH) as the 8-bit data
(operand) of instruction MVI B. The next code (48H) is assumed
as the instruction MOV C,B, and the following code (78H) as the
instruction MOV A,B. The following codes are same as Question
2.2. Finally, the mnemonics are:
MVI B,0EH 2 mark
MOV C,B each 0.3 mark − 0.1 mark
MOV A,B one mistake − 0.3 mark
ADD C
SUI 1CH no H (Hexadecimal symbol) − 0.1 mark
STA 8100H
HLT
The data byte 00H is stored in the memory location 8100H. 1 mark
00H is stored OK 00H → 0H − 0.1 mark

Question No.3 [ 2,1]

3.1 Specify the control signal and the direction of the data flow on the
Page 3 of 12
 data bus in a memory-read operation. 1 mark
̅̅̅̅̅̅̅̅̅,
In memory read operation, the control signal required is MEMR
and the direction of the data flow is from memory to the MPU. 1 mark
̅̅̅̅̅̅̅̅̅ →RD
MEMR ̅̅̅̅ − 0.5 mark MEMR̅̅̅̅̅̅̅̅̅ →MEMR − 0.3 mark
3.2 While executing a program, when the 8085 MPU completes the
fetching of the machine code located at the memory address 8099H,
what is the content of the program counter?
The program counter always points to the next memory location;
therefore, the content of the program counter will be 809AH. 1 mark

Question No.4 [ 4,4,2,2,2,2]

4.1 In Fig. 1, specify the memory addresses of ROM1, ROM2, R/WM1,
and R/WM2. one mistake − 0.5 mark
The memory addresses of ROM1 range
from 0000H (= 000 00000000000002) 0.5 mark
to 1FFFH (= 000 11111111111112). 0.5 mark
The memory addresses of ROM2 range
from 8000H (= 100 00000000000002) 0.5 mark
to 9FFFH (= 100 11111111111112). 0.5 mark
The memory addresses of RW/M1 range
from C000H (= 110 000 00000000002) 0.5 mark
to C3FFH (= 110 000 11111111112). 0.5 mark
The memory addresses of RW/M2 range
from CC00H (= 110 011 00000000002) 0.5 mark
to CFFFH (= 110 011 11111111112). 0.5 mark
4.2 In Fig. 1, eliminate the second decoder and connect ̅̅̅̅̅
CS6 of the first
̅̅̅̅ ̅̅̅̅̅
decoder to CE of the R/WM1, and connect CS7 of the first decoder
̅̅̅̅ of the R/WM2. Identify the primary memory addresses and
to CE
the foldback memory addresses of R/WM1 and R/WM2.
The primary memory addresses of R/WM1 range one mistake − 0.5 mark
from C000H (= 110 000 00000000002) 0.5 mark
to C3FFH (= 110 000 11111111112). 0.5 mark
The foldback memory addresses of RW/M1 range
from C400H (= 110 001 00000000002) 0.5 mark
to DFFFH (= 110 111 11111111112). 0.5 mark
The primary memory addresses of R/WM2 range
from E000H (= 111 000 00000000002) 0.5 mark
Page 4 of 12
 to E3FFH (= 111 000 11111111112). 0.5 mark
The foldback memory addresses of RW/M2 range
from E400H (= 111 001 00000000002) 0.5 mark
to FFFFH (= 111 111 11111111112). 0.5 mark

Figure 1
4.3 The instruction MOV M,B copies the contents of register B into the
memory location specified by the contents of HL registers. It is a 1-
byte instruction with two machine cycles and seven T-states.
Identify the second machine cycle and its control signal. 1 mark
The second machine cycle is Memory Write; the processor writes
the contents of register B into a selected memory, and the control
signal is ̅̅̅̅̅ ̅̅̅̅̅̅̅̅̅̅ OK WR, MEMW − 0.3 mark
WR. MEMW 1 mark
4.4 In Fig. 2, identify the address range of the memory chip. 1 mark
The memory map ranges from 0000H (= 0 0000000000000002)
to 7FFFH (= 0 1111111111111112). one mistake − 1 mark 1 mark
4.5 In Fig. 2, connect A15 to the negative NAND gate with an inverter,
and identify the address range of the memory chip. 1 mark
The memory map ranges from 8000H (= 1 0000000000000002)
to FFFFH (= 1 1111111111111112). one mistake − 1 mark 1 mark
4.6 In Fig. 2, eliminate the negative NAND gate and connect IO/M ̅ to
̅̅̅̅
CE of the memory chip directly. Identify the primary address range
and the mirror (foldback) address range of the memory chip.
Page 5 of 12
 The primary memory map ranges one mistake − 0.5 mark
from 0000H (= 0 0000000000000002) 0.5 mark
to 7FFFH (= 0 1111111111111112). 0.5 mark
The mirror (foldback) memory map ranges
from 8000H (= 1 0000000000000002) 0.5 mark
to FFFFH (= 1 1111111111111112). 0.5 mark

Figure 2

Question No.5 [ 2,2,3,3]

5.1 In Fig. 3, identify the primary port address and the foldback
(mirror) port address for the input device. one mistake − 1 mark
The primary port address is 7CH (= 0 1111 1002). 1 mark
The foldback (mirror) port address is FCH (= 1 1111 1002). 1 mark
5.2 In Fig. 3, identify the primary port address and the foldback
(mirror) port address for the output device. one mistake − 1 mark
The primary port address is 79H (= 0 1111 0012). 1 mark
The foldback (mirror) port address is F9H (= 1 1111 0012). 1 mark
5.3 In Fig. 3, write assembly program to read the data from the input
port and write the data to the output port. Use only the primary port
address. each 1 mark
IN 7CH one mistake − 1 mark
OUT 79H
no H (Hexadecimal symbol) − 0.1 mark
Page 6 of 12
 HLT
5.4 In Question 5.3, which switches from S0 to S7 are turned on to
display the number “2” ? each 0.6 mark
S0, S1, S3, S4, and S6 are turned on. one mistake − 0.6 mark

Figure 3

Page 7 of 12
Question No.6 [ 2,2,2,3]
6.1 In Fig. 4, identify the primary port address and the foldback
(mirror) port address for the common-anode seven-segment LED
port (first digit). 00F1H, 00F9H ×
The primary port address is F1H (= 1111 0 0012). 1 mark
The foldback (mirror) port address is F9H (= 1111 1 0012). mark
1
6.2 In Fig. 4, identify the primary port address and the foldback
(mirror) port address for the common-anode seven-segment LED
port (second digit). 00F3H, 00FBH ×
The primary port address is F3H (= 1111 0 0112). 1 mark
The foldback (mirror) port address is FBH (= 1111 1 0112). 1 mark
6.3 In Fig. 4, identify the primary port address and the foldback
(mirror) port address for the common-anode seven-segment LED
port (third digit). 00F5H, 00FDH ×
The primary port address is F5H (= 1111 0 1012). 1 mark
The foldback (mirror) port address is FDH (= 1111 1 1012). mark
1
6.4 In Fig. 4, write assembly program to display the number “580” at
the common-anode seven-segment LED ports. Use the foldback
port address for all the common-anode seven-segment LED ports.
MVI A,92H ;Code for ‘5’ to Third Digit
OUT FDH ;Display at Third Digit OUT F9H OK
MVI A,80H ;Code for ‘8’ for Second Digit
OUT FBH ; ;Display at Second Digit
MVI A,C0H ;Code for ‘0’ for First Digit OUT FDH OK
OUT F9H ; ;Display at First Digit
HLT ;End of the program
3 mark
each 0.4 mark + 0.2 mark
one mistake − 0.4 mark
no H (Hexadecimal symbol) − 0.1 mark
(full mark consideration)

Page 8 of 12
 Figure 4

Page 9 of 12
 Appendix 8085 Instruction Summary

Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex

MOV A,A 7F MOV D,C 51 MOV L,E 6B LHLD adr 2A
MOV A,B 78 MOV D,D 52 MOV L,H 6C LDA adr 3A
MOV A,C 79 MOV D,E 53 MOV L,L 6D STAX B 02
MOV A,D 7A MOV D,H 54 MOV L,M 6E STAX D 12
MOV A,E 7B MOV D,L 55 MOV M,A 77 SHLD adr 22
MOV A,H 7C MOV D,M 56 MOV M,B 70 STA adr 32
MOV A,L 7D MOV E,A 5F MOV M,C 71 ADD A 87
MOV A,M 7E MOV E,B 58 MOV M,D 72 ADD B 80
MOV B,A 47 MOV E,C 59 MOV M,E 73 ADD C 81
MOV B,B 40 MOV E,D 5A MOV M,H 74 ADD D 82
MOV B,C 41 MOV E,E 5B MOV M,L 75 ADD E 83
MOV B,D 42 MOV E,H 5C XCHG EB ADD H 84
MOV B,E 43 MOV E,L 5D MVI A,byte 3E ADD L 85
MOV B,H 44 MOV E,M 5E MVI B,byte 06 ADD M 86
MOV B,L 45 MOV H,A 67 MVI C,byte 0E ADC A 8F
MOV B,M 46 MOV H,B 60 MVI D,byte 16 ADC B 88
MOV C,A 4F MOV H,C 61 MVI E,byte 1E ADC C 89
MOV C,B 48 MOV H,D 62 MVI H,byte 26 ADC D 8A
MOV C,C 49 MOV H,E 63 MVI L,byte 2E ADC E 8B
MOV C,D 4A MOV H,H 64 MVI M,byte 36 ADC H 8C
MOV C,E 4B MOV H,L 65 LXI B,dble 01 ADC L 8D
MOV C,H 4C MOV H,M 66 LXI D,dble 11 ADC M 8E
MOV C,L 4D MOV L,A 6F LXI H,dble 21 SUB A 97
MOV C,M 4E MOV L,B 68 LXI SP,dble 31 SUB B 90
MOV D,A 57 MOV L,C 69 LDAX B 0A SUB C 91
MOV D,B 50 MOV L,D 6A LDAX D 1A SUB D 92

Page 10 of 12
Mnemonic Hex Mnemonic Hex Mnemonic Hex Mnemonic Hex
SUB E 93 INX H 23 ANA E A3 CMP L BD
SUB H 94 INX SP 33 ANA H A4 CMP M BE
SUB L 95 DCR A 3D ANA L A5 ADI byte C6
SUB M 96 DCR B 05 ANA M A6 ACI byte CE
SBB A 9F DCR C 0D XRA A AF SUI byte D6
SBB B 98 DCR D 15 XRA B A8 SBI byte DE
SBB C 99 DCR E 1D XRA C A9 ANI byte E6
SBB D 9A DCR H 25 XRA D AA XRI byte EE
SBB E 9B DCR L 2D XRA E AB ORI byte F6
SBB H 9C DCR M 35 XRA H AC CPI byte FE
SBB L 9D DCX B 0B XRA L AD JMP adr C3
SBB M 9E DCX D 1B XRA M AE JNZ adr C2
DAD B 09 DCX H 2B ORA A B7 JZ adr CA
DAD D 19 DCX SP 3B ORA B B0 JNC adr D2
DAD H 29 DAA 27 ORA C B1 JC adr DA
DAD SP 39 CMA 2F ORA D B2 JPO adr E2
INR A 3C STC 37 ORA E B3 JPE adr EA
INR B 04 CMC 3F ORA H B4 JP adr F2
INR C 0C RLC 07 ORA L B5 JM adr FA
INR D 14 RRC 0F ORA M B6 PCHL E9
INR E 1C RAL 17 CMP A BF CALL adr CD
INR H 24 RAR 1F CMP B B8 CNZ adr C4
INR L 2C ANA A A7 CMP C B9 CZ adr CC
INR M 34 ANA B A0 CMP D BA CNC adr D4
INX B 03 ANA C A1 CMP E BB CC adr DC
INX D 13 ANA D A2 CMP H BC CPO adr E4

Page 11 of 12
Mnemonic Hex Mnemonic Hex
CPE adr EC POP H E1
CP adr F4 POP PSW F1
CM adr FC XTHL E3
RET C9 SPHL F9
RNZ C0 OUT byte D3
RZ C8 IN byte DB
RNC D0 DI F3
RC D8 EI FB
RPO E0 NOP 00
RPE E8 HLT 76
RP F0 RIM 20
RM F8 SIM 30
RST 0 C7
RST 1 CF
RST 2 D7
RST 3 DF
RST 4 E7
RST 5 EF
RST 6 F7
RST 7 FF
PUSH B C5
PUSH D D5
PUSH H E5
PUSH PSW F5
POP B C1
POP D D1

Page 12 of 12