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  • Hardware Atmega328p Shiftreg

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    Julio Kalender
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    This circuit diagram shows an Arduino Uno microcontroller board connected to a 74HC595 shift register chip. Pin connections are shown between the Arduino's digital pins and the shift register for latch, data, and clock signals. The shift register's output pins are labeled and will output the data sent from the Arduino on those connections.

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    Original Title

    hardware_Atmega328p_shiftReg

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    This circuit diagram shows an Arduino Uno microcontroller board connected to a 74HC595 shift register chip. Pin connections are shown between the Arduino's digital pins and the shift register for latch, data, and clock signals. The shift register's output pins are labeled and will output the data sent from the Arduino on those connections.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    4 views1 page

    Hardware Atmega328p Shiftreg

    Uploaded by

    Julio Kalender
    This circuit diagram shows an Arduino Uno microcontroller board connected to a 74HC595 shift register chip. Pin connections are shown between the Arduino's digital pins and the shift register for latch, data, and clock signals. The shift register's output pins are labeled and will output the data sent from the Arduino on those connections.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as pdf or txt
    of 1

    4 3 2 1

    D D

    +5V +5V

    U1
    20 7
    Atmega328p
    2 14 +5V

    VCC
    AVCC
    PD0/RXD/PI16 PB0/ICP1/CLKO/PI0
    3
    PD1/TXD/PI17 PB1/OC1A/PI1
    15 C6
    +5V 4 16
    PD2/INT0/PI18 PB2/SS/OC1B/PI2 U2
    C 5 17 C
    PD3/INT1/OC2B/PI19 PB3/MOSI/OC2A/PI3
    100nF 74HC595N
    6 18 16
    LAT PD4/T0/XCK/PI20 PB4/MISO/PI4
    11 19 15

    VDD
    DAT PD5/T1/OC0B/PI21 PB5/SCK/PI5 Q0 out0
    R1 12 9 11 1
    CLK PD6/AIN0/OC0A/PI22 PB6/TOSC1/XTAL1/PI6 LAT SR_CLK Q1 out1
    10k 13 10 14 2
    PD7/AIN1/PI23 PB7/TOSC2/XTAL2/PI7 DAT SR_DAT Q2 out2
    12 3
    CLK SR_LAT Q3 out3
    X1
    PC4/ADC4/SDA/PI12
    PC5/ADC5/SCL/PI13
    21 4
    RESET out4
    PC6/RESET/PI14

    AREF Q4

    PC3/ADC3/PI11

    PC2/ADC2/PI10
    16MHz +5V

    PC1/ADC1/PI9

    PC0/ADC0/PI8
    5
    Q5 out5
    6
    out6
    AGND

    Q6
    GND

    C5 10 7
    RST MR Q7 out7
    100nF 8 22 1 28 27 26 25 24 23 C1 C2 13 9
    OE Q7
    22pF 22pF

    VSS
    8
    RESET

    B B

    TITLE

    Atmega328p com Shift Register A


    A DESIGNED BY REVIEWED BY

    Dr. Eng. Wagner Rambo Dr. Eng. Wagner Rambo


    13/04/2022 15/04/2022

    SHEET 1/1

    APPROVED
    ELECTRONICS ENGINEERING
    REV 01
    wrkits.com.br DOC 01

    4 3 2 1

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