RSA

RSA is one of the first practical public-key cryptosystems and is widely used for secure data transmission. In such
a cryptosystem, the encryption key is public and differs from the decryption key which is kept secret. In RSA, this
asymmetry is based on the practical difficulty of factoring the product of two large prime numbers, the factoring problem.

A user of RSA creates and then publishes a public key based on two large prime numbers, along with an auxiliary value.
The prime numbers must be kept secret. Anyone can use the public key to encrypt a message, but with currently published
methods, if the public key is large enough, only someone with knowledge of the prime numbers can feasibly decode the
message

RSA is a relatively slow algorithm, and because of this it is less commonly used to directly encrypt user data. More often,
RSA passes encrypted shared keys for symmetric key cryptography which in turn can perform bulk encryption-decryption
operations at much higher speed.

Operation

The RSA algorithm involves four steps: key generation, key distribution, encryption and decryption.

RSA involves a public key and a private key. The public key can be known by everyone and is used for encrypting
messages. The intention is that messages encrypted with the public key can only be decrypted in a reasonable amount of
time using the private key.

The basic principle behind RSA is the observation that it is practical to find three very large positive
integers e,d and n such that with modular exponentiation for all m:

and that even knowing e and n or even m it can be extremely difficult to find d.

Additionally, for some operations it is convenient that the order of the two exponentiations can be changed and that this
relation also implies:

Key distribution

To enable Bob to send his encrypted messages, Alice transmits her public key (n, e) to Bob via a reliable, but not
necessarily secret route. The private key is never distributed.

Encryption
Suppose that Bob would like to send message M to Alice.

He first turns M into an integer m, such that 0 ≤ m < n and gcd(m, n) = 1 by using an agreed-upon reversible protocol
known as a padding scheme. He then computes the ciphertext c, using Alice's public key e, corresponding to

This can be done efficiently, even for 500-bit numbers, using modular exponentiation. Bob then transmits c to Alice.

Decryption

Alice can recover m from c by using her private key exponent d by computing

Given m, she can recover the original message M by reversing the padding scheme.

Key generation

The keys for the RSA algorithm are generated the following way:

1. Choose two distinct prime numbers p and q.

2. For security purposes, the integers p and q should be chosen at random, and should be similar in magnitude but

'differ in length by a few digits'[2] to make factoring harder. Prime integers can be efficiently found using

a primality test.
3. Compute n = pq.
4. n is used as the modulus for both the public and private keys. Its length, usually expressed in bits, is the key
length.
5. Compute φ(n) = φ(p)φ(q) = (p − 1)(q − 1) = n − (p + q − 1), where φ is Euler's totient
function. This value is kept private.
a. Choose an integer e such that 1 < e < φ(n) and gcd(e, φ(n)) = 1; i.e., e and φ(n) are coprime.
b. Determine d as d ≡ e−1 (mod φ(n)); i.e., d is the modular multiplicative
inverse of e (modulo φ(n))
c. This is more clearly stated as: solve for d given d.e ≡ 1 (mod φ(n))
d. e is released as the public key exponent.

e. d is kept as the private key exponent.

6. The public key consists of the modulus n and the public (or encryption) exponent e. The private key consists of

the modulus n and the private (or decryption) exponent d, which must be kept secret. p, q, and φ(n) must also be

kept secret because they can be used to calculate d.

QPSK modulation and Demodulation

QPSK Modulation:

In digital modulation techniques a set of basis functions are chosen for a particular modulation scheme.Generally the basis
functions are orthogonal to each other. Basis functions can be derived using ‘Gram Schmidt
orthogonalization’ procedure.Once the basis function are chosen, any vector in the signal space can be represented as a
linear combination of the basis functions.

In Quadrature Phase Shift Keying (QPSK) two sinusoids (sin and cos) are taken as basis functions for modulation.
Modulation is achieved by varying the phase of the basis functions depending on the message symbols. In QPSK,
modulation is symbol based, where one symbol contains 2 bits. The following equation outlines QPSK modulation
technique.

Si(t)= √2Eg/T cos (2πfct+(2n−1)π/4),n=1,2,3,4

When n=1, the phase shift is 45 degrees. This is called pi/4 QPSK. The constellation diagram of QPSK will show the
constellation points lying on both x and y axes. This means that the QPSK modulated signal will have an in-phase
component (I) and also a quadrature component (Q). This is because it has only two basis functions.

A QPSK modulator can be implemented as follows. A demultiplexer (or serial to parallel converter) is used to separate
odd and even bits from the generated information bits. Each of the odd bits (quadrature arm) and even bits (in-phase arm)
are converted to NRZ format in a parallel manner. The signal on the in-phase arm is multiplied by cosine component and
the signal on the quadrature arm is multiplied by sine component. QPSK modulated signal is obtained by adding the signal
from both in-phase and quadrature arm.

QP
SK Modulator
QPSK Demodulation:

For QPSK demodulator, a coherent demodulator is taken as an example. In coherent detection technique the knowledge of
the carrier frequency and phase must be known to the receiver. This can be achieved by using a PLL (phase lock loop) at
the receiver. A PLL essentially locks to the incoming carrier frequency and tracks the variations in frequency and phase.
For the following simulation, a PLL is not used but instead we simple use the output of the PLL. For demonstration
purposes we simply assume that the carrier phase recovery is done and simply use the generated reference frequencies at
the receiver (cos(ωt)) and (sin(ωt)).

In the demodulator the received signal is multiplied by a reference frequency generators (cos(ωt)) and (sin(ωt)) on separate
arms (in-phase and quadrature arms). The multiplied output on each arm is integrated over one bit period using an
integrator. A threshold detector makes a decision on each integrated bit based on a threshold. Finally the bits on the in-
phase arm (even bits) and on the quadrature arm (odd bits) are remapped to form detected information stream. Detector for
in-phase arm is shown below. For quadrature arm the below architecture remains same but sin(ωt) basis function must be
used instead.

QPSK Demodulator – In-phase arm

Cyclic redundancy check

A cyclic redundancy check (CRC) is an error-detecting code commonly used in digital networks and storage devices to
detect accidental changes to raw data. Blocks of data entering these systems get a short check value attached, based on the
remainder of a polynomial division of their contents. On retrieval, the calculation is repeated and, in the event the check
values do not match, corrective action can be taken against data corruption.

CRCs are so called because the check (data verification) value is a redundancy (it expands the message without
adding information) and the algorithm is based on cyclic codes. CRCs are popular because they are simple to implement in
binary hardware, easy to analyze mathematically, and particularly good at detecting common errors caused by noise in
transmission channels. Because the check value has a fixed length, the function that generates it is occasionally used as
a hash function.

Bitwise Algorithm
The bitwise algorithm (CRCB) is simply a software implementation of what would be done in hardware using a linear
feedback shift register (LFSR). Figure 1 illustrates a generic hardware implementation. The shift register is driven by a
clock. At every clock pulse, the input data is shifted into the register in addition to transmitting the data. When all input its

have been processed, the shift register contains the CRC bits, which are then shifted out on the data line.

Figure 1. CRC Generation Using a Linear Feedback Shift Register (LFSR)

In the software implementation, the following algorithm can be used: Assume now that the check bits are stored in a
register referred as the CRC register, a software implementation would be: 1) CRC Å 0 2) if the CRC left-most bit is equal
to 1, shift in the next message bit, and XOR the CRC register with the generator polynomial; otherwise, only shift in the
next message bit 3) Repeat step 2 until all bits of the augmented message have been shifted in Faster implementations can
be achieved by handling the data as larger units than bits, as long as the size does not exceed the degree of the generator
polynomial. However, the speed gain corresponds to a memory increase, since precomputed values (lookup tables) will be
used.