Lecture 3: MIPS Instruction Set

• Today’s topic:

 MIPS instructions
 Procedure call/return

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Recap

• Knowledge of hardware improves software quality:

compilers, OS, threaded programs, memory management

• Important trends: growing transistors, move to multi-core,

slowing rate of performance improvement, power/thermal
constraints, long memory/disk latencies

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Instruction Set

• Understanding the language of the hardware is key to understanding

the hardware/software interface

• A program (in say, C) is compiled into an executable that is composed

of machine instructions – this executable must also run on future
machines – for example, each Intel processor reads in the same x86
instructions, but each processor handles instructions differently

• Java programs are converted into portable bytecode that is converted

into machine instructions during execution (just-in-time compilation)

• What are important design principles when defining the instruction

set architecture (ISA)?

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Instruction Set

• Important design principles when defining the

instruction set architecture (ISA):

 keep the hardware simple – the chip must only

implement basic primitives and run fast
 keep the instructions regular – simplifies the
decoding/scheduling of instructions

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A Basic MIPS Instruction

C code: a=b+c;

Assembly code: (human-friendly machine instructions)

add a, b, c # a is the sum of b and c

Machine code: (hardware-friendly machine instructions)

00000010001100100100000000100000

Translate the following C code into assembly code:

a = b + c + d + e;
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Example

C code a = b + c + d + e;
translates into the following assembly code:

add a, b, c add a, b, c
add a, a, d or add f, d, e
add a, a, e add a, a, f

• Instructions are simple: fixed number of operands (unlike C)

• A single line of C code is converted into multiple lines of
assembly code
• Some sequences are better than others… the second
sequence needs one more (temporary) variable f

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 Subtract Example

C code f = (g + h) – (i + j);

Assembly code translation with only add and sub instructions:

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Subtract Example

C code f = (g + h) – (i + j);
translates into the following assembly code:

add t0, g, h add f, g, h

add t1, i, j or sub f, f, i
sub f, t0, t1 sub f, f, j

• Each version may produce a different result because

floating-point operations are not necessarily
associative and commutative… more on this later

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Operands

• In C, each “variable” is a location in memory

• In hardware, each memory access is expensive – if

variable a is accessed repeatedly, it helps to bring the
variable into an on-chip scratchpad and operate on the
scratchpad (registers)

• To simplify the instructions, we require that each

instruction (add, sub) only operate on registers

• Note: the number of operands (variables) in a C program is

very large; the number of operands in assembly is fixed…
there can be only so many scratchpad registers
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Registers

• The MIPS ISA has 32 registers (x86 has 8 registers) –

Why not more? Why not less?

• Each register is 32-bit wide (modern 64-bit architectures

have 64-bit wide registers)

• A 32-bit entity (4 bytes) is referred to as a word

• To make the code more readable, registers are

partitioned as $s0-$s7 (C/Java variables), $t0-$t9
(temporary variables)…

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Registers

• The 32 MIPS registers are partitioned as follows:

 Register 0 : $zero always stores the constant 0

 Regs 2-3 : $v0, $v1 return values of a procedure
 Regs 4-7 : $a0-$a3 input arguments to a procedure
 Regs 8-15 : $t0-$t7 temporaries
 Regs 16-23: $s0-$s7 variables
 Regs 24-25: $t8-$t9 more temporaries
 Reg 28 : $gp global pointer
 Reg 29 : $sp stack pointer
 Reg 30 : $fp frame pointer
 Reg 31 : $ra return address

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Memory Operands

• Values must be fetched from memory before (add and sub)

instructions can operate on them

Load word Register Memory

lw $t0, memory-address

Store word Memory

Register
sw $t0, memory-address

How is memory-address determined?

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Memory Address

• The compiler organizes data in memory… it knows the

location of every variable (saved in a table)… it can fill
in the appropriate mem-address for load-store instructions

int a, b, c, d[10]
…
Memory

Base address

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Immediate Operands

• An instruction may require a constant as input

• An immediate instruction uses a constant number as one

of the inputs (instead of a register operand)

addi $s0, $zero, 1000 # the program has base address

# 1000 and this is saved in $s0
# $zero is a register that always
# equals zero
addi $s1, $s0, 0 # this is the address of variable a
addi $s2, $s0, 4 # this is the address of variable b
addi $s3, $s0, 8 # this is the address of variable c
addi $s4, $s0, 12 # this is the address of variable d[0]
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Memory Instruction Format

• The format of a load instruction:

destination register (rt)

source address (rs)

lw $t0, 8($t3)

any register
a constant that is added to the register in brackets

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Example

Convert to assembly:

C code: d[3] = d[2] + a;

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Example

Convert to assembly:

C code: d[3] = d[2] + a;

Assembly: # addi instructions as before

lw $t0, 8($s4) # d[2] is brought into $t0
lw $t1, 0($s1) # a is brought into $t1
add $t0, $t0, $t1 # the sum is in $t0
sw $t0, 12($s4) # $t0 is stored into d[3]

Assembly version of the code continues to expand!

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Recap – Numeric Representations

• Decimal 3510 = 3 x 101 + 5 x 100

• Binary 001000112 = 1 x 25 + 1 x 21 + 1 x 20

• Hexadecimal (compact representation)

0x 23 or 23hex = 2 x 161 + 3 x 160

0-15 (decimal)  0-9, a-f (hex)

Dec Binary Hex Dec Binary Hex Dec Binary Hex Dec Binary Hex
0 0000 00 4 0100 04 8 1000 08 12 1100 0c
1 0001 01 5 0101 05 9 1001 09 13 1101 0d
2 0010 02 6 0110 06 10 1010 0a 14 1110 0e
3 0011 03 7 0111 07 11 1011 0b 15 1111 0f
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Instruction Formats

Instructions are represented as 32-bit numbers (one word),

broken into 6 fields

R-type instruction add $t0, $s1, $s2

000000 10001 10010 01000 00000 100000
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
op rs rt rd shamt funct
opcode source source dest shift amt function

I-type instruction lw $t0, 32($s3)

6 bits 5 bits 5 bits 16 bits
opcode rs rt constant
100011 10011 01000 000000000100000
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Logical Operations

Logical ops C operators Java operators MIPS instr

Shift Left << << sll

Shift Right >> >>> srl
Bit-by-bit AND & & and, andi
Bit-by-bit OR | | or, ori
Bit-by-bit NOT ~ ~ use XOR, NOR

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Control Instructions

• Conditional branch: Jump to instruction L1 if register1

equals register2: beq register1, register2, L1
Similarly, bne and slt (set-on-less-than)

• Unconditional branch:
j L1
jr $s0

Convert to assembly:
if (i == j)
f = g+h;
else
f = g-h;
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Control Instructions

• Conditional branch: Jump to instruction L1 if register1

equals register2: beq register1, register2, L1
Similarly, bne and slt (set-on-less-than)

• Unconditional branch:
j L1
jr $s0
Convert to assembly:
if (i == j) bne $s3, $s4, Else
f = g+h; add $s0, $s1, $s2
else j Exit
f = g-h; Else: sub $s0, $s1, $s2
Exit:
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Example

Convert to assembly:

while (save[i] == k)
i += 1;

i and k are in $s3 and $s5 and

base of array save[] is in $s6

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Example

Convert to assembly:
Loop: sll $t1, $s3, 2
while (save[i] == k) add $t1, $t1, $s6
i += 1; lw $t0, 0($t1)
bne $t0, $s5, Exit
addi $s3, $s3, 1
i and k are in $s3 and $s5 and j Loop
base of array save[] is in $s6 Exit:

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Procedures

• Each procedure (function, subroutine) maintains a scratchpad of

register values – when another procedure is called (the callee), the
new procedure takes over the scratchpad – values may have to be
saved so we can safely return to the caller

 parameters (arguments) are placed where the callee can see them
 control is transferred to the callee
 acquire storage resources for callee
 execute the procedure
 place result value where caller can access it
 return control to caller

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Registers

• The 32 MIPS registers are partitioned as follows:

 Register 0 : $zero always stores the constant 0

 Regs 2-3 : $v0, $v1 return values of a procedure
 Regs 4-7 : $a0-$a3 input arguments to a procedure
 Regs 8-15 : $t0-$t7 temporaries
 Regs 16-23: $s0-$s7 variables
 Regs 24-25: $t8-$t9 more temporaries
 Reg 28 : $gp global pointer
 Reg 29 : $sp stack pointer
 Reg 30 : $fp frame pointer
 Reg 31 : $ra return address

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Jump-and-Link

• A special register (storage not part of the register file) maintains the
address of the instruction currently being executed – this is the
program counter (PC)

• The procedure call is executed by invoking the jump-and-link (jal)

instruction – the current PC (actually, PC+4) is saved in the register
$ra and we jump to the procedure’s address (the PC is accordingly
set to this address)
jal NewProcedureAddress

• Since jal may over-write a relevant value in $ra, it must be saved

somewhere (in memory?) before invoking the jal instruction

• How do we return control back to the caller after completing the

callee procedure?
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 The Stack

The register scratchpad for a procedure seems volatile –

it seems to disappear every time we switch procedures –
a procedure’s values are therefore backed up in memory
on a stack
High address
Proc A’s values Proc A

call Proc B
Proc B’s values …
call Proc C
Proc C’s values …
… return
Stack grows return
this way return
Low address
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Storage Management on a Call/Return

• A new procedure must create space for all its variables on the stack

• Before executing the jal, the caller must save relevant values in
$s0-$s7, $a0-$a3, $ra, temps into its own stack space

• Arguments are copied into $a0-$a3; the jal is executed

• After the callee creates stack space, it updates the value of $sp

• Once the callee finishes, it copies the return value into $v0, frees
up stack space, and $sp is incremented

• On return, the caller may bring in its stack values, ra, temps into registers

• The responsibility for copies between stack and registers may fall
upon either the caller or the callee
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Example 1

int leaf_example (int g, int h, int i, int j)

{
int f ;
f = (g + h) – (i + j);
return f;
}

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Example 1

int leaf_example (int g, int h, int i, int j) leaf_example:

{ addi $sp, $sp, -12
int f ; sw $t1, 8($sp)
f = (g + h) – (i + j); sw $t0, 4($sp)
return f; sw $s0, 0($sp)
} add $t0, $a0, $a1
add $t1, $a2, $a3
sub $s0, $t0, $t1
Notes: add $v0, $s0, $zero
In this example, the procedure’s lw $s0, 0($sp)
stack space was used for the caller’s lw $t0, 4($sp)
variables, not the callee’s! lw $t1, 8($sp)
The caller took care of saving its $ra and addi $sp, $sp, 12
$a0-$a3. jr $ra

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Example 2

int fact (int n)

{
if (n < 1) return (1);
else return (n * fact(n-1));
}

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Example 2
int fact (int n) fact:
{ addi $sp, $sp, -8
if (n < 1) return (1); sw $ra, 4($sp)
else return (n * fact(n-1)); sw $a0, 0($sp)
} slti $t0, $a0, 1
beq $t0, $zero, L1
addi $v0, $zero, 1
addi $sp, $sp, 8
jr $ra
Notes:
L1:
The caller saves $a0 and $ra
addi $a0, $a0, -1
in its stack space.
jal fact
Temps are never saved.
lw $a0, 0($sp)
lw $ra, 4($sp)
addi $sp, $sp, 8
mul $v0, $a0, $v0
jr $ra
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Memory Organization

• The space allocated on stack by a procedure is termed the activation

record (includes saved values and data local to the procedure) – frame
pointer points to the start of the record and stack pointer points to the
end – variable addresses are specified relative to $fp as $sp may
change during the execution of the procedure
• $gp points to area in memory that saves global variables
• Dynamically allocated storage (with malloc()) is placed on the heap
$sp -> 7FFF FFFC
Stack

1000 FFfF Dynamic data (heap)

$gp -> 1000 8000
1000 0000 Static data (globals)
Text (instructions)
Pc-> 0040 0000
0000 0000 Reserved
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Design Principles

1. Simplicity favors regularity

• Keep Instructions simple with fixed # of operands
2. Smaller is faster
• Smaller Number of registers
3. Make the common case fast
• Immediate variables
4. Good design demands good compromises
• Different Instruction formats with same length

• More instructions: lb, sb, lui

• Examples:
lui $t0, 61 # $t0 = 003D 0000
Ori $t0, $t0, 15 # $t0 = 003D 000F

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MIPS Instructions

More instructions
lb lbu lui
lh lhu sb/sh
slt/slti sltu/sltiu

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Hand assemble the following code

while (save[i] == k)
i += 1;
Loop: starts at 80000

Loop: sll $t1, $s3, 2

add $t1, $t1, $s6
lw $t0, 0($t1)
bne $t0, $s5, Exit
addi $s3, $s3, 1
j Loop
Exit:

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Hand assemble the following code

while (save[i] == k)
i += 1;
Loop: starts at 80000

Loop: sll $t1, $s3, 2

add $t1, $t1, $s6
lw $t0, 0($t1)
bne $t0, $s5, Exit
addi $s3, $s3, 1
j Loop
Exit:

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