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Ram OC Using Smokeless On Laptops
Ram OC Using Smokeless On Laptops
Me - Mentelgen#5318
Not me - DragonMaster95#8695
Mandatory warnings:
1. This will void warranty, so do at your risk.
2. This will brick your laptop, so have a way to disassemble the laptop to unbrick it.
3. This will lead to system instability, so save unfinished work before the tuning and testing
are complete.
Plug the drive in the laptop, go to BIOS, set drive load priority to the USB. Then quit the
bios, it should load the UMAF GUI.
Main options to use should be:
PowerDown to Disable
GDM to Disable
BGS to Alt if you have a dgpu, set bgs to auto or apu otherwise
Cmd2T to 1T
Set the fclk equal to mclk
These should give a fair ammount of performance for less power efficiency and should be
good starting point of RAM OC,
if some don't work, set them to default.
Part 2: Blackscreen
But changing any of the settings could lead to black screen, a black screen means the settings
you set are preventing it from booting revert to the last known good
when you are setting new settings set them one at a time so you know which one causes the
issue preventing boot
Open the back of your laptop, locate the CMOS battery if you do not have a cmos battery do
all the following steps using the internal laptop battery as if it was the cmos.
But in some cases, if you have a cmos battery u may still need to unplug the internal battery
too. After that, wait for at least 15sec and then replug them back.
You should load back to the UMAF and set the setting, which led to the black screen to the
default or working setting.
Also you could undo any change in the UMAF by resetting your BIOS, the button for it
should be written in the BIOS.
Go to UMAF, allow memory overclocking and set your RAM to half of the stock value so if
your ram is 2400mhz set 1200Mhz, if your stock is 3200mhz set 1600mhz
first to check if your pc can set the ram speed and able to boot.
For AMD, run Prime95 Large FFTs and Testmem5 VRAM with max utilization
simultaneously to stress the FCLK and ensure FCLK stability.
This should be run after any frequency/FCLK change. Then a round of Testmem5 or other if
the previous didn't crash for at least 30min.
It should insure that this base for timings won't give any further errors in the timings testing.
Doing this checks that ur ram is stable at 1t cmd rate without geardown mode, this alone
should already show somewhat of a postitive difference in aida's memory benchmark
now go back and raise the memory speed to the next step up above the one you tested
previously. So if you were at 1200mhz set 1333mhz or 1400mhz and repeat stability testing if
you were at 1600mhz set 1800mhz
do this until you get the highest ram speed you can without errors, keeping all the timings at
auto for now is fine as when you raise the speed they get auto adjusted upwards.
Make sure at every step that your settings set in UMAF have been applied properly in zen
timings
if you cannot run your stock ram speed with CMD2T to 1t and gdm disabled re enable GDM
and continue, however timings are only allowed to be even so every + or - 1 will be a + or - 2
note every timing in the UMAF tool shows up in hex so you will need to convert prior to
changing them to get what you want
example if you want to change your tCL from 22 (in hex its 16) to 15 (in hex its F) you
would need to edit the value in UMAF to F if you want 15, if you want 21 you would put 15
in.
Convert as needed between zen timings in windows and UMAF
Trying to find initial timings at first, if you were able to set frequency higher,
you could use the timings from lower frequencies, especially main timings. Don't forget to
convert timings from decimal to hex.
if your ram speed is not going as high as you would like it, you can try losening (raising)
these timings to try at a higher memory speed
tCL, tRCDRD, tRP. Id recommend try rasing them all by 4 to test if you can get a higher
overall ram speed.
If you cant revert to last stable ram speed and revert these timings back as well
example would be if you are at 22 stock tCL lower it to 20, if thats still stable lower it to 18
if that is still stable lower it to 16, if thats not stable try 17 if 17 is stable keep it at 17 if not
keep it at a stable 18
}
then move on and do the same tCL method process with the following timings one at a time
note tRCDWR is expected to go way lower than the others potentially all the way to its min
value of 8
the others typically all end up + or - one or 2 from tCL
tRAS
tRAS = 21 or 22 if gdm enabled
Stress test.
If unstable, raise it by 2 repeat until stable
tRC
lower tRC using the tCL method
Stress test.
Repeat until unstable then revert to last stable tRC
Stress test.
tRFC
If lower than recommended value, set tRFC = 8(tRC) + 8.
Stress test.
Repeat until opposite state of stability is reached:
Unstable: tRFC + 32; Stable: tRFC - 32.
Stress test.
Stable: tRFC - 16; Unstable: tRFC + 16.
Stress test.
Unstable: tRFC + 8; Stable: tRFC - 8.
Stress test.
Stable: tRFC - 4; Unstable: tRFC + 2.
Stress test.
Unstable: tRFC + 2; Stable: tRFC - 2.
Stress test.
Stable: tRFC - 1; Unstable: tRFC + 1.
Stress test.
set tRFC2 and 4 based of these tRFC2 = tRFC * (260/350) tRFC4 = tRFC * (160/350) On
8gb IC's for 4gb it is: tRFC2 = tRFC * (160/260) tRFC4 = tRFC * (110/260)
tCKE
repeat tCL method
Stress test.
expected to hit 1
tCWL
set tCWL = tCL
Stress test
then lower tCWL by 1
stress test
then lower by 1 once again
stress test
if tCWL= tCL-2 then your done
tRRDS, tRRDL
Repeat until reducing either one causes instability:
tRRDS - 1
Stress test.
tRRDL - 1
Stress test.
lowest for these is 4 for both however tRRDL is expected to be higher than tRRDS if they are
not both 4
tRDRDSCL, tWRWRSCL
Repeat until reducing either one causes instability:
tRDRDSCL - 1
Stress test.
tWRWRSCL - 1
Stress test.
lowest expected for these 2 timings is 2
tWTRS, tWTRL
Repeat until reducing either one causes instability:
tWTRS - 1
Stress test.
tWTRL - 1
Stress test.
tWR
Repeat until unstable or tWR = 10
tWR - 1
Stress test.
tRTP
Repeat until unstable or tRTP = twr/2:
tRTP - 1
Stress test.
tRDWR tWRRD
Repeat until reducing either one causes instability:
tRDWR repeat tCL method
tWRRD repeat tCL method
Stress test.
Epilogue
Be sure to test properly at major points, and at the end too with extra tests and time to ensure
stability.