03 Inverter

3
Inverter
3.1 Classification 3.7 Pulse Width Modulation
3.2 Performance Parameters for Inverters 3.8 Advanced Modulation Techniques
3.3 Voltage Source Inverters 3.9 Voltage Control of 3- Phase inverters
3.4 Current Source Inverters 3.10 Harmonic Reductions
3.5 CSI versus VSI
3.6 Voltage Control of Single Phase Inverters
Inverter is a device which canverts dc power into ac power at a desired output voltage
and frequency. When thyristors (or SCRs) are used as semi-conductor device in inverter then
forced commutation techniques are required for their turn-off. This makes the inverter costlier
and bulky. Therefore, thyristor based inverters are used only in high-power applications.
For low and medium power applications, devices such as power BJT, MOSFET, IGBT, GTO
are used.
Various applications of inverters are:
Adjustable speed ac drive
Uninterruptible power supplies (UPS)
Induction heating
HVDC transmission lines
Inverter 95
3.1 CLASSIFICATION
Inverters can be classified as:
(A) Line Commutated Inverters: Inverters which require an existing ac supply at output
terminal for their commutation. Their ouput ac voltage level and frequency can not be
changed.
(B) Force Commutated Inverter: Inverters whose ouput ac voltage level and frequency
can be changed as per requirement. These requires forced commutation for their turn-off,
e.g. series inverter, auxillary commutated inverter, parallel inverter, complementary
commutated inverter.
(C) Voltage Source Inverters (VSI): Inverters in which dc source has small inpedance.
(D) Current Source Inverter (CSI): Inverts in which dc source has high inpedance.
(E) Square Wave Inverters : Such inverter produces a square-wave ac voltage of a constant
magnitude. The output voltage of this type of inverter can only be varied by controlling the
input dc voltage.
(F) Pulse-width Modulated (PWM) Inverters: In PWM inverter, output has one or more
pulses in each half-cycle. By varying the width of these pulses, the output voltage may be
controlled.
3.2 PERFORMANCE PARAMETERS OF INVERTERS

Ideally, an inverter should give a sinusoidal voltage at its output. But, the output of practical
inverters are non-sinusoidal and contains harmonics. The quality of an inverter is evaluated in
terms of the following performance parameters:
(A) Harmonic Factor of nth harmonic (HFn): A harmonic factor is a measure of the
individual harmonic contribution in the output voltage of an inverter. It is defined as:
Vn
HFn = …(3.1)
V1
where Vn – rms value of the nth harmonic component.

V1 – rms value of the fundamental component of the output voltage.
(B) Total Harmonic Distortion (THD): A total harmonic distortion is a measure of closeness
in shape between a waveform and its fundamental component. It is defined as the ratio of
the rms value of the total harmonic component of the output voltage and the rms value of
the fundamental component, i.e.
∑V
n =2,3...
2
n
2
Vrms − V12
THD = = …(3.2)
V1 V1
where Vrms is the rms value of output voltage.

96 Advanced Power Electronics
(C) Distortion Factor (DF): A distortion factor indicates the amount of harmonics (or
harmonic distortions) that remains in the output voltage waveform. It is a measure of
effectiveness in reducing unwanted harmonics. It is defined as:
∞ 2
 Vn 
∑ 
n = 2,3... 
n 

THD = …(3.3)
V1
The DF of an individual (or nth) harmonic component is defined as:

Vn
DFn = …(3.4)
V1n 2
(D) Lowest Order Harmonic (LOH): The LOH is that harmonic component whose
frequency is closest to the fundamental one, and its amplitude is greater than or equal to
three percent of the fundamental component.
3.3 VOLTAGE SOURCE INVERTERS

If thyristors are used in voltage source inverter (VSI), then forced commutation is required.
But, if GTOs, power MOSFETs, power IGBTs are used then self commutation with base or
gate drive signals is used for their turn-on and turn-off.
3.3.1 Single-Phase Voltage Source Inverters
Single phse bridge inverters are of two types:
(a) Single-phase half bridge inverter.
(b) Single-phase full bridge inverter.
(a) Single-phase half bridge Inverters: Power circuit diagram and various waveforms
of single-phase half bridge configuration are shown in Fig. 3.1(a) and (b).
(a) Power Circuit Diagram

For period 0 < t < T/2, thyristor T1 conducts and the load is connected to the upper voltage
source VS/2. Therefore, output voltage becomes VS/2. At t = T/2, thyristor T1 is turned-off by
force commutation and at same instant thyristor T2 is triggered. During the period T/2 < t < T,
Inverter 97
(b) Various waveforms

FIG. 3.1: Single-phase half bridge Inverter
thyristor T2 conducts and output voltage becomes –VS/2 due to lower voltage source VS/2.
Therefore, from Fig. 3.1 (b) it can be seen that output voltage is an alternating voltage waveform
of amplitude VS/2 and frequency 1/T Hz. Frequency of inverter output ac voltage can be
changed by varying the periodic time T.
Demerit of Half bridge Configuration:
1. It requires 3- wire dc supply.
2. Output voltage magnitude is VS/2 only.
(b) Single-phase full bridge Inverter: Power circuit diagram of full bridge configuration
with various waveforms are shown in Fig. 3.2. When thyristors T1, T2 conducts, load voltage
becomes +VS and when thyristors T3, T4 conducts, load voltage becomes –VS as shown in
equivalent circuit diagrams, Fig. 3.2 (c) & (d). Frequency of the inverter output ac voltage can
be changed by varying the periodic time T.
(a) Power Circuit Diagram

(b) Various waveforms
(c) Equivalent Circuit when T1 T2 conducts
(d) Equivalent Circuit when T3 T4 conducts

FIG. 3.2: Single-phase full bridge inverter
Inverter 99
Therefore,
v0 = +VS and i0 = +I0 for 0 < t < T/2
v0 = -VS and i0 = -I0 for T/2 < t < T
It should be noted that in VSIs load voltage waveform do not depend on the nature of load,
but the load current depends on the nature of load. For the different load, the load current
waveforms for full bridge inverter are shown in Fig. 3.3 (a) to (d).
FIG. 3.3: (a) Load voltage & current waveforms for resistive load,
for single-phase full bridge inverter
With R load: For resistive load R, load current i0 is identical with load voltage waveform
v0 and diodes D1-D4 connected in anti parallel with thyristors (called feedback diodes) are not
required, see Fig. 3.3 (a).
With RL and RLC overdamped loads : For inductive loads, current i0 will not be in
phase with voltage v0 and therefore, feedback diodes D1-D4 are required to allow the current
to flow when the main thyristors are turned-off.
The load current waveforms for RL and RLC overdamped loads are shown in Fig. 3.3 (b)
& (c) respectively. Before T = 0, thyristors T3, T4 are conducting and therefore load current i0
was –I0, as shown in Fig. 3.3 (b) and (c). Though thyristors T3, T4 are turned-off by forced
commutation at t = 0, but due to inductive nature of load, current i0 can not change its direction
immediately. As a result, diodes D1, D2 starts conducting after t = 0 and allow i0 to flow against
the supply voltage VS and therefore, v0 = +VS and i0 = negative, as shown. Though T1, T2 are
gated at t = 0, these SCRs get turned-on when load current i0 through D1, D2 falls to zero.
Therefore, now v0 = +VS, i0 = positive as shown.
At t = T/2; thyristors T1, T2 are turned-off by forced commutation and as load current can
not reverse immediatly, so diodes D3, D4 conducts. Therefore v0 = -VS and i0 = positive, as
shown.
Though thyristors T3, T4 are gated at t = T/2, will not turn-on as these are reversed biased
by the voltage drop in diodes D3, D4. So, T3, T4 are turned-on when current in diodes D3, D4
becomes zero, as shown. In this way cycle repeats.
Fig. 3.3: (b) Load voltage & current waveforms for RL load,
for single-phase full bridge inverter
FIG. 3.3: (c) Load voltage & current waveforms for

RLC over damped load, for single-phase
full bridge inverter
With RLC Underdamped load:
The load curren i0 for RLC underdamped load is shown in Fig. 3.3(d). After t = 0, T1, T2
are conducting the load current. As i0 through T1, T2 reduces to zero at t1, so these SCRs are
turned-off before T3, T4 are triggered. As T1, T2 stop conducting, current through the load
reverses and is now carried by diodes D1, D2 as T3, T4 are not yet gated. The diodes D1, D2 are
connected in antiparallel to T1, T2 so voltage drop across these diodes appears as reverse biase
across T1, T2.
If duration of this reverse biase is more than the SCR turn-off time tq, i.e. if (T/2 – t1) > tq;
T1, T2 will get turn-off naturally and therefore no extra commutation circuit is required. Such
method of commutation is known as load commutation.
Inverter 101
FIG. 3.3: (d) Load voltage & current waveforms for

RLC under damped load, for single-phase
full bridge inverter
Fourier Analysis of single-phase inverter output voltage:

The output or load voltage waveforms of voltage source inverter do not depend on the
nature of load. Voltage waveforms of Fig. 3.1 (b) and 3.2 (b) can be resolved in fourier series
as:
∞
2VS
v0 = ∑
n =1,3,5...
nπ
sin nωt ... for 1-φ half bridge inverter …(3.5)
∞
4VS
v0 = ∑
n =1,3,5...
nπ
sin nωt ... for 1-φ full bridge inverter …(3.6)
where,
n – order of harmonics
ω – frequency of output voltage in rad/s
The load current i0 for full bridge inverter can be expressed as:
∞
4VS
i0 = ∑
n =1,3,5...
nπ.Z n
sin (nωt − φ n ) …(3.7)
where,
zn = load impedence at frequency nf
1
 1  
2 2
= R 2 +  nωL −   …(3.8)
  nωC  
 1 
 nωL − 
 nωC 
φn = phase angle = tan −1 …(3.9)
R
The fundamental load power P01 = I201 R = V01 I01 cos φ1 …(3.10)
At time of commutation:
If load current I0 > 0, forced commutation is required.
If load current I0 < 0, no forced commutation is required.
3.3.2 Three-Phase VSI Bridge Inverter
Three-phase bridge inverters are more common than single-phase inverters for providing
adjustable frequency power to industrial loads. Power circuit diagram for three phase VSI
consists of six thyristors as shown in Fig. 3.4 (a). Three-phase load may be delta-connected or
star-connected as shown in Fig. 3.4 (b) & (c) respectively.
FIG. 3.4: Three-phase VSI bridge Inverter

Inverter 103
FIG. 3.5: Firing table and voltage waveforms for 180º degree mode three–phase VSI
On the basis of period of conduction of each thyristor, three-phase bridge inverters can be
classified as 180º conduction mode or 120º conduction mode inverter.
Three-Phase 180 Degree Mode VSI: In this, each thyristor conducts for a period of
180º of a cycle, so called as 180 degree conduction mode inverter. The following points must be
ensured while making firing table (shown in Fig. 3.5):
(i) Each thyristor conducts for 180º of a cycle.
(ii) In each group i.e. upper or lower group, thyristors are fired after every 120º, i.e. if
T1 is fired at 0º, then T3 will be fired at 120º and T5 at 240º.
(iii) In each leg, thyristors are fired after every 180º, i.e. if T1 is fired at 0º, then T4 will be
fired at 180º.
Therefore, it can be seen that :
(i) At a time, three thyristors conduct i.e. two from upper group and one from lower
group or one from upper group and two from lower group.
(ii) Thyristors are triggered in sequence of their numbers after every 60º.
One control cycle (360º) is divided into six steps, each of 60º interval. So it is also
called as six step bridge inverters.
During Step–I (0º < ωt < 60º): Thyristors T1, T6 and T5 conduct as shown in equivalent
circuit, Fig. 3.6 (a).
VS 2 VS
Therefore, current, i1 = =
Z 3 Z
Z+
2
FIG. 3.6(a): Step–I (0–60º); T1, T6, T5 conducts

Inverter 105
The line to neutral voltages are:

Z VS
v an = v cn = i1 =
2 3
2VS
v nb = i1Z =
3
2VS
∴ v bn = − v nb = −
3
VS  2VS 
The line voltage v ab = − v an − v bn = −  = VS
3  3 
2VS V 
v bc = v bn − v cn = − −  S  = −VS
3  3 
VS  VS 
v ca = v cn − v an = −  = 0
3  3 
The above line to neutral voltages (phase voltages) van, vbn, vcn and line voltages vab, vbc,
vca are drawn in Fig. 3.5 for step-I.
During Step-II (60º ≤ ωt ≤ 120º ) : During this step, thyristors T1, T6 and T2 conducts
as shown in equivalent circuit, Fig. 3.6 (b).
Fig. 3.6 (b): Step II (60º–120º); T1, T6, T2 conducts

2 VS
Therefore, Current, i 2 =
3 Z
2VS
So, phase voltages v an = i 2 Z =
3
Z VS
v nb = v nc = i 2 =
2 3
VS
or v bn = v cn = −
3
2VS  VS 
The line voltages, vab = van – vbn = − −  = + VS
3  3 
VS  VS 
v bc = v bn − v cn = − − − =0
3  3 
VS  2VS 
v ca = v cn − v an = − −  = −VS
3  3 
The above phase voltages and line voltages are drawn in Fig. 3.5 for step-II. Similarly,
analysis for step-III, IV, V and VI can be done and corresponding line & phase voltages can
be drawn as shown in Fig. 3.5.
The function of antiparallel connected diodes (or feedback diodes) D1 to D6 is to allow the
flow of currents through them when load is inductive in nature. The output line voltages can be
expressed by the following fourier series as:
∞
4VS nπ  π
v ab = ∑
n =1,3,5.... nπ
cos
6
sin n  ωt + 
 6
…(3.11)
∞
4VS nπ  π
v bc = ∑
n =1,3,5.... nπ
cos
6
sin n  ωt − 
 2 …(3.12)
∞
4VS nπ  5π 
v ca = ∑
n =1,3,5.... nπ
cos
6
sin n  ωt +
 6 
 …(3.13)
3π
For n = 3 cos = 0, therefore, all triplen harmonics are absent from the line voltages.
6
* For 3-phase star connected load, VL = 3Vp and IL = I p
* For delta concetion, VL = Vp and IL = 3 Ip

Inverter 107
The rms value of nth component of line voltage:
1 4VS nπ
VLn = cos …(3.14)
2 nπ 6
The rms value of fundamental (n=1) line voltage:
1 4VS π
VL1 = cos = 0.78 VS …(3.15)
2 π 6
From waveforms of line voltage vab in Fig. 3.5, it is seen that line voltage is VS from 0º to
120º. So, rms value of line voltage VL is:
1
 2π
3 2
1 × 2 2
VL =  VS2d(ωt ) =
∫ VS = 0.81 VS …(3.16)
 2π  3
 0 
The rms value of phase voltage Vp:
VL 2
Vp = = VS = 0.47 VS …(3.17)
3 3
The rms value of fundamental phase voltage:

2VS VL1
Vp1 = = 0.45 VS = …(3.18)
2π 3
The output power of the inverter:
2
3Vp2 3 2  2VS2
PL = =  VS  = …(3.19)
R R  3 
 3R
The rms value of the thyristor current:
IP Vp R VS
I Thyristor (rms) = = = …(3.20)
2 2 3R
Three-Phase 120 Degree Mode VSI:

Power circuit diagram for 180 degree mode and 120 degree mode VSI are same, as
shown in Fig. 3.4 (a). In this mode, each thyristor conducts for 120 degree, so called as 120º
degree conduction mode bridge inverter. The following points must be ensured while making
firing table (as shown in Fig. 3.7) :
(i) Each thyristor conducts for 120º of a cycle.
(ii) In each group (i.e. upper or lower group), thyristors are fired after every 120º, i.e. if
T1 is fired at ωt = 0º, then T3 will be fired at ωt = 120º, and T5 at ωt = 240º.
FIG. 3.7: Firing Table and voltage waveforms for 120º degree mode three-phase VSI
Inverter 109
(iii) In each leg, thyristors are fired after every 180º, i.e. if T1 is fired at ωt = 0º, then T4
at ωt = 180º.
Therefore, it can be seen that (Fig. 3.7) :
(i) At a time, two thyristors conducts i.e. one from upper group and one from lower
group.
(ii) Thyristors are triggered in sequence of their numbers after every 60º.
It is also a six-step bridge inverter.
Step–I (0 < ωt < 60º) : As can be seen from the firing table that during this mode,
thyristors T1 and T6 conducts. Equivalent circuit during this step is drawn in Fig. 3.8(a).
Therefore, the line to neutral voltages or phase voltages, from Fig. 3.8 (a) are:
VS V
v an = , v bn = − S , v cn = 0
2 2
and the line voltages during this step are:
VS  VS 
v ab = v an − v bn = − −  = + VS
2  2 
FIG. 3.8(a): Equivalent Circuit during Step-I (0º - 60º); T1, T6 conducts
VS V
v bc = v bn − v cn = − − (0 ) = − S
2 2
V  V
v ca = v cn − v an = 0 −  S  = − S
 2  2
The above phase voltages and line voltages are drawn as shown in Fig. 3.7 during step-I.
Step–II (60º<ωt < 120º): During this step, thyristors T1 and T2 conducts (see firing
table, Fig. 3.7). Threfore, equivalent circuit can be drawn as shown in Fig. 3.8(b).
FIG. 3.8(b): Equivalent circuit during Step–II (60º - 120º); T1 & T2 conducts
From Fig. 3.8(b), it can be noted that the phase voltages are:
VS V
v an = , v bn = 0, v cn = − S
2 2
and the line voltages are:
VS V
v ab = v an − v bn = − (0) = S
2 2
 V  V
v bc = v bn − v cn = 0 −  − S  = S
 2  2
VS  VS 
v ca = v cn − v an = − −  = − VS
2  2 
The above phase voltages and line voltages can be drawn as shown in Fig. 3.7 for step-II.
Similarly, the analysis can be made for steps-III, IV, V & VI and corresponding phase and line
voltages can be drawn as shown in Fig. 3.7.
The output voltages can be expressed in fourier series as:
∞
2VS nπ  π
v an = ∑
n=1,3,5...
nπ
cos
6
sin n  ωt + 
 6 
…(3.21)
∞
2VS nπ  π
v bn = ∑
n =1,3,5...
nπ
cos
6
sin n  ωt − 
 2
…(3.22)
Inverter 111
∞
2VS nπ  5π 
v cn = ∑
n =1,3,5...
nπ
cos
6
sin n  ωt +
 6 
 …(3.23)
The rms value of fundamental phase voltage:
2VS π 3VS
Vp1 = cos = = 0.39VS …(3.24)
2π 6 2π
The rms value of fundamental line voltage:
3VS
VL1 = 3Vp = = 0.675 VS …(3.25)
2π
(∴ as load is assumed star connected)
The rms value of phase voltage:
1
 2π 2
2
 1 3  VS   2 VS VS
Vp =  ∫
  . dωt  =
π 0  2   3 2
=
6
= 0.408VS …(3.26)
 
The rms value of line voltage: VL = 3Vp = 0.707 VS …(3.27)
The output power of the inverter:
Vp2 VS2
PL = 3 = …(3.28)
R 2R
The rms value of the thyristor current:
Ip Vp R VS
I Thyristor (rms ) = = = …(3.29)
2 2 2 3R
Merit and Demerit of 180º and 120º Mode VSI:
The merits and demerits of both the modes are as:
(1) In 180º mode inverter, there is no delay between switching-on and switching-off of the
thyristors in same leg or arm. So, it may result into short-circuiting of the dc source due to
conduction of thyristors of same leg together. This problem is overcome in 120º mode by
providing a time lag of 60º between turn-on and turn-off of two thyristors of same leg.
This results in reliable and safe operation of the inverter.
(2) In 120º mode inverter, potentials of only two output terminals connected to dc source are
defined at any time of cycle. The potental of third terminal is not well defined. So the
analysis of the performance of this inverter becomes complicated. But in 180º mode
inverter, potentials of all the three output terminals are well defined. So analysis becomes
easy.
(3) In 120º mode inverter, there is poor utilization of thyristor devices for same load condition
as compared to 180º mode inverter.
Therefore, 180º mode is preferred and it is generally used in three-phase inverters.
3.4 CURRENT SOURCE INVERTERS

In the current-source inverters (CSIs), the input current is constant but adjustable. The
amplitude of output current from CSI is independent of the load, but the megnitude of output
voltage and its waveform is dependent upon the nature of load. A CSI converts the input dc
current to an ac current and the frequency of ac current depends upon the rate of triggering the
SCRs. The amplitude of ac output current can be adjusted by controlling the magnitude of dc
input current.
As power semi-conductors in a CSI have to withstand reverse voltage, so devices like
GTOs, power transistors, power MOSFETS, Power BJTs can not be used in CSI.
3.4.1 Single-phase CSI
A basic thyristor based single-phase CSI is shown in Fig. 3.9. Capacitors are used here as
a commutating device. Working of this inverter can be explained using following points:
FIG. 3.9: Single-phase CSI

(1) Initially, let T1 and T2 are conducting and the capacitors are charged with the polarities, as
shown. The positive load current is following through T1, D1, load, D2, and T2.
(2) To turn-off the conducting thyristors T1 and T2, the other two thyristors T3 and T4 are
triggered.
Inverter 113
(3) When these thyristors (T3 and T4) start conducting, the capacitor voltage vC1 and vC2
appears as reverse voltage across the thyristors T1 and T2, respectively. So, thyristors T1
and T2 get turn-off.
(4) Now, the load current flows through T3, C1, D1, load, D2, C2 and T4. So the polarity of the
capacitors reverses due to charging current in reverse direction, i.e. right plate of capacitor
C1 and C2 becomes positive and left plate becomes negative. When the capacitor voltage
become equal to the load voltage, the load current becomes zero and so the diodes D1 and
D2 gets turn-off.
(5) The load current now flows in reverse direction through T3, D3, load, D4 and T4.
(6) Similarly, when the thyristors T1 and T2 are triggered, the capacitor voltage vC1, vC2
turn-off T2 and T4 in similar fashion. In this way, cycle repeats and output ac voltage of
desired frequency is obtained.
3.4.2 Three-phase CSI
A basic three-phase CSI, feeding a star connected resistive load, is shown in Fig. 3.10(a).
Diodes are used in series with each switch to handle reverse voltage, which should be avoided
to appear across the power semiconductor based switches. The switches are turned-on in the
sequence of their numbers, with an interval of 60º and each switch conducts for 120º duration.
(a) Power circuit diagram

At a time two switches conduct i.e. one from the upper group (T1, T3, T5) and other from
the lower group (T4, T6, T2). The load current of a particular phase is +Is when upper switch of
the corresponding arm conducts and it is – Is when the lower switch conducts.
(b) Firing Table and output currents

FIG. 3.10: Three-phase CSI
Advantages of CSI :
(i) It has inherent short-circuit fault protection because the input is a controlled current source,
so the current does not rise to a dangerously high level during the fault.
(ii) So, it is more reliable.
(iii) It require a simple commutation circuit i.e. only capacitors.
(iv) It does not require any feedback diode.
(v) It may use a converter grader SCR, which is cheaper than inverter grade SCR.
(vi) It has inherent four-quadrant operation capability due to converter-inverter combination.
Disadvantages of CSI:
(i) It suffers from stability problems at light loads.
(ii) It suffers from operating problems at high frequency.
(iii) Its response is sluggish.
Applications of CSI: Various applications of CSI are:
(i) Speed control of ac motors
(ii) Lagging VAr compensation
Inverter 115
(iii) Solar photo-voltaic utility systems

(iv) Synchronous motor starting
3.5 CSI VERSUS VSI

(i) Input of CSI is a constant dc current source whereas in case of VSI, it is a constant dc
voltage source.
(ii) CSIs do not require feedback diodes whereas VSIs require feedback diodes if load is
inductive or capacitive in nature.
(iii) In CSI, semiconductor device can be thyristor only, whereas in VSIs power transitor,
power IGBTs, power MOSFETs or GTOs can also be used.
(iv) In case of CSI, output current is independent of nature of load but output voltage depends
on load. Whereas in case of VSI, output voltage is independent of nature of load but load
current depends on load.
3.6 VOLTAGE CONTROL OF SINGLE-PHASE INVERTERS

An inverter may require voltage control to:
(i) cope with the variations in the input dc voltage.
(ii) compensate the voltage regulation of the inverter switches and transformer
(iii) provide variable or adjustable voltage to the load.
Certain loads, such as variable frequency induction motor drive, require simultaneous
control of frequency and voltage. Controlling the conduction intervals of the inverter switches
can control frequency of the inverter output. Voltage control may be achieved by any of the
following techniques:
(i) Control of input dc voltage
(ii) External control of inverter ac output voltage
(iii) Internal control of inverter.
3.6.1 Control of Input dc Voltage
The output voltage of an inverter may be controlled by controlling the input dc voltage
supplied to the inverter. Fig. 3.11 shows the various schemes used to control the input dc
voltage. If the basic source is dc, variable dc voltage may be obtained using a chopper or a dc-
to-dc converter, as shown in Fig. 3.11(a). If the basic source is ac, variable dc voltage may be
obtained using any of the schemes shown in Fig. 3.11(b) to (d).
In the scheme of Fig. 3.11(b), the input ac voltage is first converted into a variable ac
voltage using an ac voltage controller and then it is converted into dc with the help of an
uncontrolled rectifier. In this system, variable voltage, variable frequency ac is obtained after
three conversion stages. Obviously, efficiency of the system is poor. Moreover, the input power
factor becomes poor at low voltages.
Figure 3.11(c) shows an improved scheme. In this scheme, variable dc voltage is obtained
using a controlled rectifier. As only two conversion stages are required, the efficiency of the
system is better than that for the previous scheme. At low output voltages, the input power
factor is poor. Another drawback of the scheme is that the output of the controlled rectifier
contains appreciable amount of low-frequency harmonics. Therefore, large size filter components
are required. This makes the system response sluggish.
FIG. 3.11: Inverter voltage control by control of dc input voltage

Drawbacks of the system of Fig. 3.11(c) are removed in the system shown in Fig. 3.11(d).
This system converts the input voltage into dc using an uncontrolled rectifier. The constant dc
voltage is then converted into a variable dc using a high-frequency dc-to-dc converter. As the
chopper operates at a high frequency, its output contains harmonics at very high frequencies.
Thus the size of filter components is reduced. Moreover, the fundamental input power factor
remains unity under all conditions of operation. However, losses in the system increase due to
use of an additional converter.
3.6.2 External Control of AC Output Voltage

The constant ac output voltage (rms) from an inverter may be controlled using an ac
voltage regulator (ac phase control). This method introduces a large harmonic content in the
output voltage. Moreover, the method can be used only for small power applications.
For high-power applications, two square-wave inverters may be connected in series to
obtain variable ac voltage, as shown in Fig. 3.12. The output voltages of the inverter-I and
inverter-II are given to the primaries of the two transformers, whose secondary windings are
connected in series. The output voltages of the two transformers, v01, and v02, have same
magnitude. The phase angle between v01 and v02, can be controlled by controlling the phase
angle between the control signals of the two inverters. The resultant output voltage (v0) has a
constant magnitude 2V (double the peak of v01 and v02) and a variable pulse width.
Inverter 117
Fig. 3.12: Series-connected inverters

3.6.3 Internal Control of Inverters
In this technique, the voltage control is obtained within the inverter. The output of the
inverter is in the form of a pulse width modulated wave. Controlling the width of output pulses,
controls the output voltage. This method not only provides variable output voltage but also
eliminates certain low frequency harmonics, which are responsible for poor performance. This
method is therefore, the most popular method of voltage control of inverter. Depending on the
required range of voltage control and required performance, a suitable PWM technique may be
used. The different PWM techniques are discussed in next section.
3.7 PULSE WIDTH MODULATION (PWM)

Pulse width modulation (PWM) is widely used in industrial inverters to control the output
voltage and to reduce or eliminate lower order harmonics. It is the most efficient and economical
method as it do not require any extra hardware to achieve these objectives. The commonly
used PWM techniques are:
(i) Single pulse-width modulation,
(ii) Multiple pulse-width modulation
(iii) Sinusoidalpulse-width modulation
3.7.1 Single pulse-width modulation
In this PWM technique, there is only one pulse per half-cycle and the width of the pulse is
varied to control the inverter output voltage. The gating signals are generated by comparing a
rectangular reference signal of amplitude Ar with a triangular carrier wave of amplitude
Ac. The frequency of the reference signal determines the fundamental frequency of output
voltage. Generation of gating signals and output voltage of single-phase full bridge inverter are
shown in Fig. 3.13.
(a) Control circuit for generation of gating signals

(b) Gating signals and voltage waveforms

FIG. 3.13: Single pulse-width modulation
The ratio of Ar to Ac is the control variable and called as amplitude modulation index (M).
Ar
i.e. M= …(3.30)
Ac
The rms output voltage can be derived from voltage v0 waveform in Fig. 3.11(b).
1
 ( π+ δ )
2 2
1× 2
V0 =  ∫ Vs dωt 
2
2π
 (π −δ )
2

σ
or V0 = Vs …(3.31)
π
Therefore, by varying Ar from 0 to AC, the pulse width δ can be varied from 0º to 180º and
so the rms output voltage V0, from 0 to VS. The output voltage can be expressed in fourier
series as:
∞
4Vs nδ
v0 = ∑
n =1,3,5
nπ
sin
2
sin nωt
…(3.32)
Due to symmetry of output voltage, the even harmorics (for n = 2, 4, 6…) are absent.
Inverter 119
3.7.2 Multiple Pulse-width modulation

In this PWM technique, there are two or more than two pulses per half cycle and the
width of pulse is varied to control the inverter output voltage. By using several pulses in each
half cycle of output voltage, harmonic content is reduced. Here, pulses are of equal width and
are at equidistance. The generation of gating signals for turning-on and off the thyristors or
transistors are obtained by comparing a reference signal with a triangular carrier wave, as
shown in Fig. 3.14. The frequency of reference signal sets the output frequency f0, and the
carrier frequency fc determines the number of pulses per half cycle (p).
FIG. 3.14: Multiple pulse width modulation

The modulation index controls the output voltage and this type of modulation is called
as uniform pulse widith modulation (UPWM). The number of pulses per half cycle can be
obtained by :
fc M
P= = f …(3.33)
2f0 2
fc
where Mf = , called as frequency modulation ratio.
f0
The rms output voltage can be derived as:

1
 ( π p2+ δ ) 2
V0 =  Vs2 dωt 
2p
∫
2π ( π p − δ )
 2

pδ
or V0 = VS …(3.34)
π
3.7.3 Sinusoidal Pulse width modulation
In this method of modulation, several pulses per half cycle are used like in case of multiple
pulse width modulation. But, in this the pulse width are not equal, rather it is a sinusoidal
function of the angle positions of the pulse in a cycle as shown in Fig 3.15. The distortion factor
and lower order harmonics are greately reduced in this technique.
FIG. 3.15: Sinusoidal pulse width modulation

The gating signals are shown in Fig. 3.15 are generated by comparing a sinusoidal reference
signal with a triangular carrier wave of frequency fc. The frequency of reference signal fr
determines the inverter output frequency f0 and its peak amplitude Ar controls the modulation
index M and so the rms output voltage V0.
Inverter 121
The rms output voltage for mth pulse:

1
 2p δ  2
V0 = VS 
∑ m 
π 
…(3.35)
 m=1 
3.8 ADVANCED MODULATION TECHNIQUES

The SPWM, which is most commonly used, suffers from drawbacks (e.g., low fundamental
output voltage). The other techniques that offer improved performances are:
Trapezoidal modulation
Staircase modulation
Stepped modulation
Harmonic injection modulation
Delta modulation
3.8.1 Trapezoidal modulation
The gating signals are generated by comparing a triangular carrier wave with a modulating
trapezoidal wave as shown in Fig. 3.16.
FIG. 3.16: Trapezoidal modulation

The trapezoidal wave can be obtained from a triangular wave by limiting its magnitude to
±Ar, which is related to the peak value Ar(max) by
Ar = σAr(max)
where σ is called the triangular factor, because the waveform becomes a triangular wave
when a = 1. The modulation index M is
A r σA r (max)
M= = for 0 ≤ M ≤ 1 …(3.36)
Ac Ac
The angle of the flat portion of the trapezoidal wave is given by

2φ = (1 – σ)π
For fixed values of Ar(max) and Ar, M that varies with the output voltage can be varied by
changing the triangular factor a. This type of modulation increases the peak fundamental output
voltage up to 1.05Vs, but the output contains lower order harmonics.
3.8.2 Staircase modulation
The modulating signal is a staircase wave, as shown in Fig. 3.17. The staircase is not a
sampled approximation to the sine wave. The levels of the stairs are calculated to eliminate
specific harmonics, The modulation frequencyratio mf and the number of steps are chosen to
obtain the desired quality of output voltage. This is an optimized PWM and is not recommended
for fewer than 15 pulses in one cycle. It has been shown that for high fundamental output
voltage and low DF, the optimum number of pulses in one cycle is 15 for two levels, 21 for three
levels, and 27 for four levels. This type of control provides a high-quality output voltage with a
fundamental value of up to 0.94Vs.
FIG. 3.17: Staircase modulation
3.8.3 Stepped modulation

The modulating signal is a stepped wave as shown in Fig. 3.18. The stepped wave is not
a sampled approximation to the sine wave. It is divided into specified intervals, say 200, with
each interval controlled individually to control the magnitude of the fundamental component
and to eliminate specific harmonics. This type of control gives low distortion, but a higher
fundamental amplitude compared with that of normal PWM control.
Inverter 123
FIG. 3.18: Stepped modulation

3.8.4 Harmonic injected modulation
The modulating signal is generated by injecting selected harmonics to the sine wave. This
results in flat-topped waveform and reduces the amount of overmodulation. It provides a higher
fundamental amplitude and low distortion of the output voltage. The modulating signal is generally
composed of
FIG. 3.19: Selected harmonic injection modulation

vr = 1.15 sin ωt + 0.27 sin 3ωt – 0.029 sin 9ωt …(3.37)

The modulating signal with third and ninth harmonic injections is shown in Fig. 3.19. It
should be noted that the injection of 3nth harmonics does not affect the quality of the output
voltage, because the output of a three-phase inverter does not contain triplen harmonics. If only
the third harmonic is injected, vr is given by
Vr 1.15 sin ωt + 0.19 sin 3ωt …(3.38)
The modulating signal can be generated from 2I3 segments of a sine wave as shown in
Figure 3.20. This is the same as injecting 3nth harmonics to a sine wave. The line-to- line
voltage is sinusoidal PWM and the amplitude of the fundamental component is approximately
15% more than that of a normal sinusoidal PWM. Because each arm is switched off for one-
third of the period, the heating of the switching devices is reduced.
FIG 3.20 Harmonic injection modulation.
3.8.5 Delta modulation

In delta modulation a triangular wave is allowed to oscillate within a defined window ∆V
above and below the reference sine wave vr. The inverter switching function, which is identical
to the output voltage vo is generated from the vertices of the triangular wave vc as shown in
Fig. 3.21. It is also known as hysteresis modulation. If the frequency of the modulating wave is
changed keeping the slope of the triangular wave constant, the number of pulses and pulses
widths of the modulated wave would change.
Inverter 125
FIG. 3.21: Delta modulation

The fundamental output voltage can be up to 1V, and is dependent on the peak amplitude
Ar and frequency fr of the reference voltage. The delta modulation can control the ratio of
voltage to frequency, which is a desirable feature, especially in ac motor control.
3. 9 VOLTAGE CONTROL OF THREE-PHASE INVERTERS

A three-phase inverter may be considered as three single-phase inverters and the output
of each single-phase inverter is shifted by 120º. The voltage control techniques discussed in
discussed in applicable to three-phase inverters. However, the following techniques are most
commonly used for three-phase inverters.
Sinusoidal PWM
Third-harmonic PWM
60° PWM
Space vector modulation
3.9.1 Sinusoidal PWM

The generations of gating signals with sinusoidal PWM are shown in Fig. 3.22(a). There
are three sinusoidal reference waves (vra, vrb and vr) each shifted by 120°. A carrier wave is
compared with the reference signal corresponding to a phase to generate the gating signals for
that phase. Comparing the carrier signal vcr with the reference phases vra, vrb, and vrc produces
g1, g3, and g5, respectively, as shown in Fig. 3.22(b). The instantaneous line-to-line output
voltage is vab = Vs (g1 – g3). The output voltage as shown in Fig. 3.22(c), is generated by
eliminating the condition that two switching devices in the same arm cannot conduct at the
same time.
The normalized carrier frequency ‘hf should he odd multiple of three. Thus, all phase-
voltage (vaN, vbN, and vcN) are identical, but 120º out of phase without even harmonics; moreover,
harmonics at frequencies multiple of three are identical in
FIG. 3.22: Sinusoidal pulse-width modulation for three-phase inverter

amplitude and phase in all phases. For instance, if the ninth harmonic voltage in phase a is
v aN 9 ( t ) = v̂ 9 sin(9ωt ) …(3.39)
1 = 3Vs 2
the corresponding ninth harmonic in phase b willv̂ abbe,
v bN9( t ) = v̂ 9 sin[9(ωt − 120º )] = v̂ 9 sin[9(ωt − 1080º )] = v̂ 9 sin(9ωt ) …(3.40)
Thus, the ac output line voltage vab = vaN – vbN does not contain the ninth harmonic.
Therefore, for odd multiples of three times the normalized carrier frequency mf, the harmonics
in the ac output voltage appear at normalized frequencies fh centered around mf and its multiples,
specifically, at
n = jmf ± k …(3.41)
where j = 1, 3, 5, ... for k = 2, 4, 6 and j 2,4, ... for k = 1, 5,7,..., such that n is not a multiple
of three. Therefore, the harmonics are at mf ± 2, mj ± 4.... 2mf ± l, 2mf ± 5..., 3mf ± 2,
3mf ± 4,...., 4mf ± l, 4mf ± 5 For nearly sinusoidal ac load current, the harmonics in the dc link
current are at frequencies given by
n = jmf ± k ± 1 …(3.42)
where j = 0, 2, 4, ... for k = 1, 5, 7, ...; and j = 1, 3, 5, ... for k = 2, 4, 6 such that n jmf ± k
is positive and not a multiple of three.
Because the maximum amplitude of the fundamental phase voltage in the linear region
(M ≤ 1) is Vs/2, the maximum amplitude of the fundamental ac output line voltage is
. Therefore, one can write the peak amplitude as
Inverter 127
Vs
v̂ ab1 = M 3 for 0 < M ≤ 1 …(3.43)
2
Overmodulation– To further increase the amplitude of the load voltage, the amplitude of
the modulating signal v̂ r . can be made higher than the amplitude of the carrier signal v̂ cr ,
which leads to overmodulation. The relationship between the amplitude of the fundamental ac
output line voltage and the dc link voltage becomes nonlinear. Thus, in the overmodulation
region, the line voltages range in,
Vs 4 V
3 < v̂ ab1 = v̂ bc1 = v̂ ca1 < 3 s …(3.44)
2 π 2
Large values of M in the SPWM technique lead to full overmodulation. This case is
known as square-wave operation as illustrated in Fig. 3.23, where the power devices are on for
180º. In this mode, the inverter cannot vary the load voltage except by
FIG. 3.23: Square-wave operation

varying the dc supply voltage V5. The fundamental ac line voltage is given by
4 V
v̂ ab1 < 3 s …(3.45)
π 2
The ac line output voltage contains the harmonics f,, where n = 6k ± 1 (k = 1, 2, 3,...) and
their amplitudes are inversely proportional to their harmonic order n. That is.
14 V
v̂ abn = 3 s …(3.46)
nπ 2
3.9.2 60-Degree PWM

The 60º PWM is similar to the modified PWM. The idea behind 60° PWM is to “flat top”
the waveform from 60° to 120° and 240° to 300°, The power devices are held on for one-third
of the cycle (when at full voltage) and have reduced switching losses. All triple harmonics
(3rd, 9th, 15th, 21st, 27th. etc.) are absent in the three-phase voltages, The 60° PWM creates
a larger fundamental (2/3) and utilizes more of the available dc voltage (phased voltage
V = 0.57735 V, and line voltage VL = Vs) than does sinusoidal PWM. The output waveform can
be approximated by the fundamental and the first few terms as shown in Fig. 3.24.
FIG. 3.24: Output waveform for 60º PWM

Inverter 129
3.9.3 Third-Harmonic PWM

The third-harmonic PWM is similar to the selected harmonic injection method shown in
Fig. 3.19 and it is implemented in the same manner as sinusoidal PWM. The difference is that
the reference ac waveform is not sinusoidal but consists of both a fundamental component and
a third-harmonic component as shown in Fig. 3.25. As a result, the peak-to-peak amplitude of
the resulting reference function does not exceed the DC supply voltage V, but the fundamental
component is higher than the available supply Vs.
FIG. 3.25 Output waveform for third-harmonic PWM.

The presence of exactly the same third-harmonic component in each phase results in an
effective cancellation of the third harmonic component in the neutral terminal, and the line-to-
neutral phase voltages (v aN , vbN , and v cN) are all sinusoidal with peak amplitude of
VP = Vs 3 = 0.57735Vs . The fundamental component is the same peak amplitude
VP1 = 0.57735Vs and the peak line voltage is VL = 3 VP = 3 × 0.57735 Vs = Vs. This is
approximately 15.5% higher in amplitude than that achieved by the sinusoidal PWM. Therefore,
the third-harmonic PWM provides better utilization of the dc supply voltiage than the sinusoidal
PWM does.
3.9.4 Space Vector Modulation
Space vector modulation (SVM) is quite different from the PWM methods. With PWMs,
the inverter can be thought of as three separate push-pull driver stages, which create each
phase waveform independently. SVM, however, treats the inverter as a single unit; specifically,
the inverter can be driven to eight unique states. Modulation is accomplished by switching the
state of the inveter. The control strategies are implemented in digital systems. SVM is a digital
modulating technique where the objective is to generate PWM load line voltages that are in
average equal to a given (or reference) load line voltages. This is done in each sampling period
by properly selecting the switch states of the inverter and the calculation of the appropriate
time period for each state. The selection of the states and their time periods are accomplished
by the space vector (SV) transformation.
Space transformation– Any three functions of time that satisfy
ua(t) + ub(t) ± u(t) = 0 …(3.47)
can be represented in a two-dimensional space. The coordinates are similar to those of three-
phase voltages such that the vector [ua 0 0]T is placed along the x-axis, the vector [0 ub 0]T is
phase shifted by 120°, and the vector [0 0 uc]T is phase shifted by 240°. This is shown in Fig.
3.26.The SV in complex notation is then given by
u (t ) =
2
3
[
u a + u b e j( 2 3) π + u c e − j( 2 3) π ] …(3.48)
where 2/3 is a scaling factor. Equation (3.48) can be written in real and imaginary
components in the x-y domain as
u(t) = ux + juy …(3.49)
Using Eqs. (3.48) and (3.49), we can obtain the coordinate transformation from the
a–b–c-axis to the x – y axis as given by
 1 − 1 − 1  u 
  a
 u x  =  2 2  u 
2
 u y  3  3 3  b  …(3.50)
0  u
 2 2  c 
Inverter 131
which can also be written as
ux =
2
[v a − 0.5(v b + v c )] …(3.51a)
3
3
uy = (v b + v c ) …(3.51b)
3
FIG. 3.26: Three-phase coordinate vectors and space vector u(t).

The transformation from the x–y axis to the α−β axis, which is rotating with an angular
velocity of ω, can be obtained by rotating the x–y-axis with wt as given by
 π 
 cos  + ωt  
 u α   cos(ωt )
 = 2    u α  =  cos(ωt ) − sin(ωt )   u x 
 u β   sin(ωt ) π    u   sin(ωt ) cos(ωt )   u y  …(3.52)
   sin  + ωt    β  
 2 
Using Eq. (3.48), we can find the inverse transform as
Ua = Re(u) …(3.53a)
–f(2/3)π
Ub = Re(ue ) …(3.53b)
–f(2/3)π
u, = Re(ue ) …(3.53c)
For example, if ua, ub, and uc are the three-phase voltages of a balanced supply’ with a
peak value of Vm, we can write
ua = Vm sin(ωt) …(3.54a)
ub = Vm sin(ωt – 2π/3) …(3.54b)
uc = Vm sin (ωt + 2π/3) …(3.54c)
Then, using Eq. (3.48), we get the space vector representation as
u(t) = Vmej0 = Vmejωt …(3.55)
which is a vector of magnitude Vm rotating at a constant speed w in rads per second.
FIG. 3.27: The space vector representation
FIG. 3.28: Pattern of SVM

Inverter 133
3.10 HARMONIC REDUCTIONS

We have noticed that the output voltage control of inverters requires varying both the
number of pulses per half-cycle and the pulse widths that are generated by modulating techniques.
The output voltage contains even harmonics over a frequency spectrum. Some applications
require either a fixed or a variable output voltage, but certain harmonics are undesirable in
reducing certain effects such as harmonic torque and heating in motors, interferences, and
oscillations.Various methods used for harminc reductions are explained as under:
Phase displacement: By this method, the nth harmonic can be eliminiated by a proper
choice of displacement angle α if
cos nα = 0
90º
or α= …(3.56)
n
and the third harmonic is eliminated if α = 90/3 = 30º.
Bipolar output voltage notches: A pair of unwanted harmonics at the output of
single-phase inverters can be eliminated by introducing a pair of symmetrically placed bipolar
voltage notches as shown in Fig. 3.29.
FIG. 3.29 Output voltage with two bipolar notches per half-wave
The fourier series of output voltage can be expressed as

∞
v0 = ∑B
n −1,3,5…
n sin nωt …(3.57)
4Vs  α1 α2 π2
where Ba =
π  ∫ 0
sin nωt d(ωt) − ∫
0
sin nωt d(ωt) + ∫
0
sin nωt d(ωt
4Vs 1 − 2 cos nα1 + 2 cos nα2

= …(3.58)
π n
Equation (3.58) can be extended to m notches per quarter-wave:
4V
Bn = (1 − 2 cos nα1 + 2 cos nα 2 − 2 cos nα 3 + 2 cos nα 4 − …) …(3.59)
nπ
4 Vs  m

Bn =
nπ


1 + 2
k =1
∑( −1) k cos( nα k ) 

for n = 1, 3, 5, … …(3.60)
π
where α1 < α2 < … < αk < .
2
The third and fifth harmonics would be eliminated if B3 = B5 = 0 and Eq. (3.58) gives the
necessary equations to be solved.
1 – 2 cos 3α1 + 2 cos 3α2 = 0
or
1 – 2 cos 5α1 + 2 cos 5α2 = 0
or α1 = 15 cos −1 (cos 5α1 + 0.5)
These equations can be solved iteratively by initially assuming that α1 = 0 and repearing
the calculations for α1 and α2. The result is α1 = 23.62º and α2 = 33.3º.
FIG. 3.30: Unipolar output voltage with two notches per half-cycle
α1 = 13 cos −1 (cos 3α1 − 0.5)
Unipolar output voltage notches: With unipolar voltage notches as shown in Figure
3.30, the coefficient Bn is given by
4Vs 
sin nωt d(ωt)
α1 α2
Ba =
π  ∫
0
sin nωt d(ωt) + ∫
0 
4Vs 1 − 2 cos nα1 + 2 cos nα2

= …(3.61)
π n
Equation (3.61) can be extended to m notches per quarter-wave as
4Vs  m

Bn =
nπ  k =1
k
∑
1 + (−1) cos(nα k ) for n = 1, 3, 5, … …(3.62)

π
where α1 < α2 < … < αk < .
2
The third and fifth harmonics would be eliminated if
1 – 2 cos 3α1 + 2 cos 3α2 = 0
1 – 2 cos 3α1 + 2 cos 5α2 = 0
Inverter 135
Solving these equations by iterations using a mathcad program, we get α1 = 17.83º and
α2 = 37.97º .
60-Degree modulation: The coefficient Bn is given by
4Vs  α2 α4 α6
Bn =
π  ∫ α1
sin (nωt) d(ωt) + ∫ α3
sin (nωt) d(ωt) + ∫
α5
sin (nωt)
α π
+ ∫ sin (nωt) d(ωt) 
π3 
4Vs 1 m

Bn =
nπ
 + ∑ (−1) k
cos(nα k ) for n = 1, 3, 5, … …(3.63)
2 k =1 
FIG. 3.31: Output voltage for modified sinusoidal pulse-width modulation

Transformer connections: The output voltages of two or more inverters may be
connected in series through a transformer to reduce or eliminate certain unwanted harmonics.
The arrangement for combining two inverter output voltages is shown in Fgiure 3.32(a). The
waveforms for the output of each inverter and the resultant output voltage are shown in Figure
3.32(b). The second inverter is phase shifted by a/3.
FIG. 3.32: Elimination of harmonics by transformer connection

 π  π  π
v o 2 = A1 sin  ωt −  + A 3 sin 3 ωt −  + A 5 sin 5 ωt −  + …
 3  3  3
The reesultant voltage vo is obtained by vector addition.
  π  π
v o = v o1 + v o 2 = 3  A1 sin  ωt −  + A 3 sin 3 ωt −  + A 5 sin 5
  3  6
Therefore, a phase shifting of π/3 and combining voltages by transformer connection

would eliminate third (and all triplen) harmonics. It should be noted that the resultant fundamental
component is not twice the individual voltage, but is 3 2 (= 0.866 ) of that for individual output
voltages and the effective output has been reduced by (1–0.866=)13.4%.
The harmonic elimination techniques, which are suitable only for fixed output voltage,
increase the order of harmonics and reduce the sizes of output filter. However, this advantage
should be weighed againt the increased switching losses of power devices and increased iron
(or magnetic losses) in the transformer due to higher harmonic frequencies.
SOLVED PROBLEMS
Example 3.1: A single-phase, half-bridge inverter feeds a resistive load (R =10Ω).
If the source voltage is 240 V, determine
(a) the rms value of fundamental component of output voltage,
(b) the output power,
(c) the peak off-state voltage across each semiconductor switch,
(d) the lowest order harmonic and the corresponding harmonic factor, and
(e) the rms and average values of currents through semiconductor switches.
Solution: The magnitude of square-wave output voltage for the half-bridge inverter,
240
VL = = 120V
2
The output voltage may be expressed in Fourier series, using equation (3.5) as
∞
2VS
v0(t) = ∑
n=1,3,5 nπ
sin(nωt)
2 × 240 sin(nωt)
= ∑
π n=1,3,5 n
 sin(3ωt ) sin(5ωt ) 
= 152 .87 sin(ωt ) + + + ...
 3 5 
Inverter 137
Now, we get the following:

(a) The rms value of fundamental component of the output voltage, V 1 = 152.79/
V1 = 152 .79 2 = 108.04 V .
(b) The output power is given by P0 = V02 R.

where V0 is the rms value of the output voltage. For the square-wave output,V0 = VL =
120 V. Therefore, P0 = 1202/10 = 1440 W.
(c) The peak voltage that appears across each semiconductor switch is
2VL = 2 x 120 = 240 V.
(d) The lowest order harmonic is the third harmonic, which has rms value equal to V3 =
( )
152.79/ 3 2 = 36.01 V. The corresponding harmonic factor is
V3 36.01
HF3 = = = 0.333
V1 108.04
(e) The output current has a square-wave shape with magnitude 120/10 = 12A. In the positive
half-cycle, the load current flows through the switch S1 and in the negative half-cycle, the
switch S2 carries the load current.
The average switch current may be obtained as
T2
1 12( T 2)
Is( avg) =
T ∫ 12dt =
0
T
= 6A
The rms switch current is given by

1
1
 T2 2
1 1 T  2 12
I s( rms) =
T ∫ (12)2 dt  =  × (12)2 ×  =
  T 2 2
= 8.48A
 0 
Example 3.2: A single-phase, half-bridge inverter with source voltage (total) V =

500 V, feeds an RL load with R = 20 Q, and L = 0.1 H. If the frequency of the output
voltage is 50 Hz, determine
(a) the output current at the end of first cycle,
(b) the expression of steady-state output current for both the half cycles and
(c) the THD of load current.
Solution: For the half-bridge inverter the magnitude of the square=wave voltage waveform
VL = V/2 = 250 volt. The time constant of the RL load τ = L/R = 0.1/20 = 0.005 s. Time period
of the output voltage T = 1/50 = 0.02 s.
(a) At t = 0, the RL load is subjected to a step function with magnitude VL. The voltage
equation is given by
di(t )
VL = Rio (t ) + L
dt
VL   t   t
i o (t ) = 1 − exp −  + Io exp − 
R   τ   τ
where I0 is the current at t = 0, which is zero in the present case. Putting the values, we
get
250   t  − 200t )
i o (t ) = 1 − exp −  = 12.5(1 − e
20   0 .005 
At half time period, i.e. t = T/2 = 0.01 s,
io = 12.5 (1 – e–2) = 10.81 A
For the next half-cycle, the load voltage reverses and the load current is given by
io(t’) = –12.5 [1 – exp(-200t + 10.81 exp (-200t’)
where t’ = t – (T/2). At the end of the first cycle,
0.02
t′ = 0.02 − = 0.01 s
2
Then io = –12.5 [1-exp(–2)] + 10.81 exp (–2) = –9.345 A
(b) The steady state load current for the positive half-cycle can be obtained, as
VL  2 −t /τ 
io = 1 − 1 + e − T /(2τ) e 
R  
250  2 
= 1− e − 200t 
20  1 + e − 2 
= 12.5 (1 – 1.76 e–200t)
For the negative half-cycle, the load current is given by
io = 12.5 (1 – 1.76 e–200(t – 0.01))
(c) The rms value of the nth harmonic component is given by
4 VL 225 .08
In = = , n = 1, 3, 5, ..
nπ 2 R + (nωL 2
()
2
n 400 + 986.96n 2
Putting different values of n, we get

I1 = 6.044, I3 = 0.7785, I5 = 0.2845, I7 = 0.1455, I9 = 0.088, I11 = 0.0585,...
The THD for the load current may be obtained as
I 32 + I 52 + I 72 + I 92 + I11
2
+ ...
THD i = = 0.1403 or 14.03 %
I1
Inverter 139
Note : THDi is 14.03%, which is far less than THDv, which is 48.34%. This is because of
the higher impedance offered by the inductance to the high-frequency harmonics, which are
filtered out.
Example 3.3: The full-bridge inverter of Fig. 3.2(a) has a source voltage, V = 220
V. The inverter supplies an RLC load with R = 5 Ω, L = 10 mH and C = 26 µF. The
frequency of operation of inverter is 400 Hz. Calculate:
(a) the rms load current at fundamental frequency,
(b) the rms value of load current,
(c) the THD in the load current,
(d) the power output, and
(e) the average supply current.
Solution: Given VL = 220 V, R = 5 Ω, L = 10 mH, C = 26 pF, f = 400 Hz, The inductive
reactance for the fundamental voltage,
XL = 2πfL = 2 x π x 400 x 10 x 10–3 = 25.13 Ω
The capacitive reactance for the fundamental voltage,
1 1
XC = = = 15.3 Ω
2π ƒ C 2π × 400 × 26 × 10 −6
Impedance offered to nth harmonic component,
2
 X 
Z n = R 2 +  nX L − C 
 n 
Putting different values of n, impedance offered to different harmonic components are
Z1 = 52 + (25.13 − 15.3)2 = 11.03 Ω
2
 15.3 
Z 3 = 25 +  3 × 25.13 −  = 70.47 Ω
 3 
Similarly,
Z5= 122.690, Ω Z7 = 173.79 Ω, Z9=224.52 Ω
From, the rms value of the nth harmonic component of the output voltage is given by
0.9VL 0.9 × 220 198
Vn = = =
n n n
The rms value of the nth harmonic component of the current is given by
Vn 198
In = = ...(3.36)
Z n nZ n
(a) The rms value of the fundamental component of the load current
198
I1 = = 17.95 A (b)
1 × 11.03
Putting the values of n and Zn in equation (3.36), rms values of the different harmonic
components may be obtained as I3 = 0.94 A, I5 = 0.32A, I7 = 0.16 A, 4 = 0.1A,…
The rms value of the load current
I = I12 + I23 + I52 + I72 + I29 + ...
= 17.952 + 0.94 2 + 0.322 + 0.16 2 + 0.12 + ...

= 17.98 A
(c) THD in the load current
I2 − I12 17.982 − 17.952

THDi = = = 0.0578 = 5.78%
I1 17.95
(d) The power output

P0 = I2R = (17.98)2 x 5 = 1.616 kW
(e) The average supply current
P0 1616
Iav = = = 7.35 A
V 220
Example 3.4: A single PWM inverter feeds an RL load with R = 10 Ω and L = 20
mH. If the .source voltage is 120 V, find out the total harmonic distortion in the load
current. The width of each pulse is 120° and the output frequency is 50 Hz.
Solution: The rms value of the nth harmonic component of the output voltage is given by
4V nW
Vn = sin
2nπ 2
Here V = 120 and W = 2π/3. Therefore,

4 × 120 nπ 108.04 nπ
Vn = sin = sin
2nπ 3 n 3
The impedance offered to the nth harmonic current is given by
Z n = R 2 + (nωL )2 = 102 + n 2(2π × 50 × 20 × 10 −3 )2 = 100 +
The rms value of the nth harmonic current

Vn 108 .04 nπ
In = = sin
Z n n 100 + 39.478n 2 3
Inverter 141
Putting different values of n, we get I1 = 7.922 A, I3 = 0, I5 = 0.5675 A, I7 = 0.2963 A,

I9 = 0, I11 = 0.1218 A, I13 = 0.0814 A. Then
I23 + I52 + I72 + I29 + I11

2 2
+ I13 0.4323
THDi = = = 0.0545 = 5.45
I1 7.922
Example 3.5: The output voltage of a uniform PWM inverter is shown in Fig. given
below. Find out:
(a) rms s value of the output voltage,
(b) rms value of the fundamental component of the output voltage, and
(c) the total harmonic distortion.
Solution: (a) The rms value of output voltage

1
1002 ( π 6)  2 1
V0 =   = 100 = 57.735 V
 ( π 2)  3
(b) The waveform possesses odd- and half-wave symmetry. Hence, only odd b-
components will be present in the Fourier series, which are given by
π2
4 
60º
4
bn =
π ∫
0
v 0 (t ) sin(nωt ) d( ωt) = 
π
30º
∫
100 sin (nωt) d( ωt)


400 400
and b1 = [− cos ωt ]60º
30º = ( − cos 60º+ cos 30º ) = 46.604
π π
The rms value of fundamental component
46.604
V1 = = 32.953 V
2
v 20 − v12
(c) THD = = 1.4385 = 143.85%
V1
Example 3.6: A single-phase full-bridge inverter controls the power in a resistive

load. The nominal value of input dc voltage is V, = 220 V and a uniform pulse-width
modulation with five pulses per half- cycle is used. For the required control, the width of
each pulse is 30°. (a) Determine the rms voltage of the load. (b) If the dc supply increases
by 10%, determine the pulse width to maintain the same load power. If the maximum
possible pulse width is 35°, determine the minimum allowable limit of the dc input source.
Solution: (a) Vs = 220V, p = 5 and = 30º.
V0 = 220 5 × 30 180 = 200.8V
(b) Vs = 1.1 x 220 = 242 V. 242 5δ 180 = 200.8 and this gives the required
value of pulse width. δ = 24.75°.
To maintain the output voltage of 200.8 V at the maximum possible pulse width of δ = 35°.
the input voltage can be found from 200.8 = Vs 5 × 35 180 , and this yields the minimum allowable
input voltage, Vs = 203.64V.
Example 3.7: A three-phase bridge inverter is fed from a 600 V dc source. The
inverter is operated in 180° conduction mode and it is supplying a purely resistive, star-
connected load with R = 15 Ω/phase. Determine
(a) the rms value of load current,
(b) the rms value of switch current,
(c) the power delivered to the load, and
(d) the average source current.
Solution: (a) The rms value of the per-phase load voltage is given by
2 2
Vph = V= × 600 = 282.84 V
3 3
Therefore, the rms value of load current per phase
Vph 282 .84
I ph = = = 18 .85 A
R 15
(b) The rms value of current through switch
V 600
Iswitch (rms) = = = 13.33 A
3R 3 × 15
(c) Power delivered to the load
2
Vph 282.84 2
PL = 3 = 3× = 15999 W or 16 kW
R 15
(d) Power delivered by the source = VLIav=PL, where, Iav is the average source current.
Therefore,
PL 15999
I av = = = 26.66 A
VL 600
Inverter 143
Example 3.8: A single-phase bridge inverter delivers power to a series connected

RLC load with R = 4Ω and ωL = 10Ω. The periodic time T = 0.1msec. What value of C
should the load have in order to obtain load commutation for the SCRs. The thyristor
turn-off time is 10 µsec. Take circuit turn-off time as 2tq. Assume that load current contains
only fundamental component.
FIG. 3.33
Solution: The value of C should be such that RLC load is underdamped. Moreover when
load voltage passes through zero, the load current must pass through zero before the voltage
wave, i.e. the load current must lead the load voltage by an angle q as shown in Fig. 3.33. From
this phasor diagram of series RLC circuit:
XC − XL
tan θ =
R
Here XC > XL as the current is leading the voltage. Now (θ/ω) must be at least equal to
circuit turn-off time, i.e. 2 × 10 = 20 µsec.
θ
∴ = 20 × 10−6 sec
ω
103
Now f = = 10 4 Hz
0 .1
θ = 2π ×104 × 20 × 10–6 = 1.256 rad = 72º
X C − 10
∴ tan 72º =
4
1
or X C = 22.3107 =
2π × 104 × C
or C = 0.72 µF.
Example 3.9: A Single-phase half-bridge inverter has load R = 4Ω. and dc source
voltage
Vs
= 110V
π
(a) Sketch the waveforms for v0, i0, load current i01, currents through thyristor 1
and diode 1 and voltage across thyristor T1. Harmonics other than fundamental
component are neglected. Indicate the devices that conduct during different
intervals of one cycle.
(b) Find the power delivered to load due to fundamental current.
(c) Check whether forced commutation is required.
Solution :
(a) The fundamental component (n = 1) of output voltage, from eq. (3.5), is
2Vs
v 01 = sin ωt
π
The rms value of this voltage,
2 × 220
V01 = = 99.08 A
π. 2
and the rms load current,
V01 99.08
I01 = = = 22.78 A
R 4
The fundamental frequency component of load current is
i01 = 22.78 2 sin ωt
The waveforms for the various voltages and currents are shown in Fig. 3.34. For resistive
load feedback diodes do not come into conduction, therefore iD1 is zero. When T1 conducts,
vT1 = 0. When T2 conducts, vT1 = Vs as shown.
(b) Power delivered to load = I201 R = (22.78)2 × 4 = 2075.72 watts

Vs
When T1 is conducting, power to load is delivered by upper source and when T2 is on,
2
lower source delivers power to load.
Vs
Power delivered by each source = .Is
2
Here Is = average value of fundamental component of source current over one cycle.
1 π
=
2π ∫0
2 I01 sin ωt.d(ωt )
Inverter 145
2 I01 2 × 22.78
= = = 10.26 A
π π
Power delivered by each source
= 110 × 10.26 = 1128.58 W
Power delivered by both the sources
= 2 × 1128.58
≅ 2258 W
Power delivered by both the sources is equal to that consumed by the load.
(c) As load is resistive, so the diodes do not conduct, and therefore forced commutation
is essential.
FIG. 3.34
Example 3.10: For a single-phase full bridge inverter, VS = 220 V dc, T=1ms. The
load consists of RLC in series with R = 1 Ω, ωL = 6 Ω and 1/ωC=7.
(a) Sketch the waveform for load voltage v0, fundamental component of load voltage
v01 and i01, source current is and voltage across thyristor. Indicate the devices
under conduction during different intervals of one cycle.
(b) Find the power delivered to load to fundamental component.
(c) Check whether forced commutation is required or not. Take thyristor turn-off
time as 100 µs and 150 µs.
Solution: (a) The load voltage waveform v0 and its fundamental component v01 are shown
in Fig.3.35.
FIG. 3.35
Rms value of load voltage, is
4 Vs 4 × 220
V01 = = = 198.17 V
π 2 π 2
Inverter 147
V01
Rms value of current, I01 =
Z1
V01
= 12
 2  1  
2
R +  ωL −  
  ωC  
198.17 198.17
= = = 140.13 A
[1
2
+ (− 1) ]
212 2
XL − XC
φ1 tan −1 = tan −1( −1)
R
= – 45º
The fundamental component of current i01 as a function of time is
i01 = 2 I01 sin(ωt − φ1 )
198 .7
= 2 sin( ωt + 45º )
2
= 198.7 sin (ωt +45º)
Load current i01 and source current is are plotted in Fig.3.35 and the conducting
components are also indicated.
2
 198.7 
(b) Power delivered to load = I201R =   × 1 = 19.7 kW
 2 
This must be equal to the power PS delivered by the source.
∴ PS = V S I S W
where IS = average value of fundamental component of source current
1 π
=
π ∫
0
2 I01 sin ( wt + 45º ) d ( ωt)
198.7
= [− cos (ωt + 45º )]0π = 198.7 [2 cos 45º] = 89.5 A
π π
Ps = 220 × 89.5 = 19.6 kW
(c) Fig. 3.35 reveals that vT1 is negative for some time before T3, T4 are triggered.
Thus circuit turn-off time can be obtained from
XL − XC π
or ωtc = θ = tan−1 = 45º =
R 4
1 T
or tc = . = 0.125 ms = 125 µs
4 2
As voltage dropt in diodes, D1, D2 reverse biases T1, T2 for 125 µs, which is more than
the thyristor turn-off time of 100 µs, no forced commutation is required. But if thyristor turn-
off time is 150 µs then force commutation will be required.
Example 3.11: A single-phase full-bridge inverter has RLC load of R = 4 Ω, L = 35
mH and C = 155 mF. The dc input voltage is 230 V and the output frequency is 50 Hz.
(a) Find an expression for load current up to fifth harmonic.
(b) Calculator rms value of fundamental load current.
(c) Calculate the power absorbed by load and the fundamental power,
(d) Calculate conduction time of thyristors and diodes if only fundamental
component were considered.
(e) For what values of thyristor turn-off time, load commutation will occur ?
Solution: (a) From Eq. (3.6), an expression for output voltage is
4 Vs 4Vs 4Vs
v0 = sin ωt + sin 3 wt + sin 5 ωt
π 3π 5π
4 × 230  1 1 
=  sin ωt + sin 3ωt + sin 5 ωt 
π  3 5 
= 292.85 sin 314t + 97.62 sin (3 × 214t) + 58.57 sin (5× 314t)
Load impedance at frequency n.ƒ. is
 10 6 
Z n = 4 + j 2π × 50 × 35 × 10 −3 × n − 
 2π × 50 × 155 × n 
 20.54 
= 4 + j11n − Ω
 n 
∴ Z1 = 4 2 + (11 − 20.54) 2 = 10.345 Ω
 11 − 20.54 
and φ1 = tan −1   = −67.25º
 4 
2
2 20.54 
Z3 = 4 11 × 3 −  = 26.46 Ω
 3 
Inverter 149
 33 − 20.54 / 3 
and φ3 = tan −1   = 81.3º
 4
Similarly, Z5 = 51.05 Ω and φ5 = 85.5º
Load current, from Eq. (3.7), is given by
292.85 97.62 58.57

i0 = sin (ωt + 67.25º ) + sin ( 2ωt − 81.3º ) + si
10.345 26.46 5105
= 28.31 sin (314t + 67.25º) + 3.689 sin (3 × 314t - 81.3º)
+ 1.1473 sin (5 × 314t – 85.5º)
(b) Rms value of fundamental load current,
I m1 28.31
I 01 = = = 20.02 A
2 2
(c) Peak load current
I m = 28.312 + 3.689 2 + 1.14732 = 28.572 A
Rms load current = 28.572 = 20.207 A

2
Load power = (20.207)2 × 4 = 1633.3 W
(d) Fundamental component of current is
i01 = 28.31 sin (314t + 67.25º)
This current leads the fundamental voltage component by 67.25º. This means that diode
conducts for 67.25º and thyristor for 180 – 67.25 = 112.75º
∴ Conduction time for thyristors
112.75 × π
= = 6.267 ms
180 × 314
67.25 × π
Conduction time for diodes = = 3.738 ms,
180 × 314
(e) Therefore, in case thyristor turn-off time is less than 3.738 ms, load commutation will
occur and no forced commutation will be required under the assumption of no harmonics.
Example 3.12: A three-phase bridge inverter delivers power to a resistive load from
a 440 V dc source. For a star-connected load of 10 W per phase, determine for both
(a) 180º mode and (b) 120º mode,
(i) rms value of load current
(ii) rms value of thyristor current
(iii) load power.
Solution: For a resistive load, the waveform of load current is the same as that of the
applied voltage. Therefore waveforms of phase-load current and thyristor current are as shown
in Fig. 3.36(a) for 180º mode operation and in Fig.3.36(b) for 120º mode operation.
FIG. 3.36
(a) 180º mode : Upper waveform of Fig.3.36 (a) shows that rms value of per-phase load
current Irms is given by
12
 1  V 2 π  2V 2 π  V 2 π 
Irms =  s +  s  × +  s  
 π  3R 3  3R  3  3R  3 
12
 440 2 2  2 × 440 2 1 
=   × +  × 
 3 × 10  3  3 × 10  3 
= (143.41 + 286.82)1/2
= 20.75 A
Rms value of thyristor current is
12
 1  440  2 2π  2 × 440 2 π 
I T1 =    × +  × 
 2π  3 × 10  3  3 ×10  3 

= (71.70 + 143.40)1/2
= 14.67 A
Power delivered to load
= 3 I2rmsR = 3 (20.75)2 × 10 = 12.9 kW
(b) 120º mode : Upper waveform in Fig. 3.36 (b) gives rms value of per-phase load current
Irms as under :
Inverter 151
12
 1  440  2 2π 
I rms =   ×  = 17.96 A
 π  2 × 10  3 
Load power = 3 I2rmsR

= 3 × (17.96)2 × 10 = 9677 W
rms value of thyristor current,
12
 1  440  2 2π 
I T1 =    ×  = 12.70 A
 2π  2 × 10  3 
Example 3.13: Single-phase full bridge inverter, fed from 230 V dc, is connected to
load R = 10 W and L = 0.03 H. Dertermine the power delivered to load in case the
inverter is operating at 50 Hz with (a) square wave output (b) single pulse modulated
wave output with an on-period of 0.5 of a cycle and (c) two symmetrically spaced pulses
per half cycle with an on-period of 0.5 of a cycle.
Solution: In order to calculate the power delivered to load accurately, harmonics up to
seventh considered.
(a) Square-wave output : rms value of fundamental voltage is
4Vs 4 × 230
V01 = = = 207.10 V
π. 2 π. 2
Load impedance at fundamental frequency is
Z1 = [102 + (2π × 50 × 0.03)2]1/2 = 13.7414 Ω
207.10
I 01 = = 15.0712 A
13.7414
4 × 230
V03 = = 69.035 V
3× π× r 2
and Z3 = 10 2 + (2π × 50 × 3 × 0.03) 2 = 29.9906 Ω
69.035
I 03 = = 2.302 A
29.9906
920 1
Similarly, I 05 = × = 0.8598 A
5× π× 2 10 + (2π × 50 × 5 × 0.03) 2
2
920 1
I 07 = × = 0.4434 A
7× π× 2 10 + (2π × 50 × 7 × 0.03) 2
2
Rms value of resultant load current,
920 1
I07 = × = 0.4434 A
7× π× 2 102 + (2π × 50 × 7 × 0.03)2
[
Power delivered to load = I0 = I201 + I203 + I205 + I207 ]
1/ 2
Power delivered to load = I20 R

= [15.07122 + 2.3022 + 0.85982 + 0.44342] × 10
= 2333.76 W
(b) Single pulse modulates wave output : For single-pulse modulated wave or quasi-
square wave where pulse width, 2d = 0.5 × 180º = 90º or d = 45º. rms value of fundamental
voltage is
4 Vs 4 × 230
V01 = sin d = sin 45º = 146 .423 V
π. 2 π. 2
146.423
I01 = = 10.6556 A
13.7414
4 × 230
V03 = sin 3 × 45º = 48.8075 V
3× π× 2
48.8075
I03 = = 1.6274 A
29.9906
4 × 230 1
Similarly, I05 = sin(5 × 45º ) × = −0.6079 A
5× π× 2 48.17324
4 × 230 1
I07 = sin(7 × 45º ) × = −0.3135 A
7× π× 2 66 .727
Power delivered to load = [10.65562 + 1.62742 + 0.60792 + 0.31352] × 10
= 1166.58 W
(c) For two symmetrically spaced pulses per half cycle, For this 2d = 0.5 × 180 = 90º
180 − 90 45
or d = 45º and γ = + = 52.5º. rms value of fundamental voltage is
3 2
8Vs d 8 × 230 45
V01 = sin γ sin = sin 52.5º sin = 125 .
π. 2 2 π. 2 2
125.755
I01 = = 9.1515 A
13.7414
Inverter 153
8 × 230  45 
V03 = sin(52.5 × 3). sin × 3  = 48.815 V
3× π× 2  2 
48.815
I03 = = 1.6277 A
29.9906
8 × 230 1
I05 = sin(52.5 × 5) sin(22.5 × 5) × =1
5× π× 2 48.17324
8 × 230 1
I07 = sin(52.5 × 7) sin(22.5 × 7) × = 0.0
7× π× 2 66 .727
Power delivered to load = [9.15152 + 1.62772 + 1.5752 + 0.04432] × 10
= 888.82 W
UNSOLVED PROBLEMS
3.1 (a) What is an inverter? List a few industrial applications of inverters.
(b) What are line-commutated inverters? How do they operate? Explain the difference
between line-commutated and force-commutated inverters.
(c) What are the two main types of inverters ? Distinguish between them.
3.2 (a) Describe the working of a single-phase half-bridge inverter. What is its main
drawback? Explain how this drawback is overcome.
(b) What is the purpose of connecting diodes in antiparallel with thyristors in inverter
circuits ? Explain how these diodes come into play.
3.3 A single-phase full-bridge inverter may be connected to a load consisting of (a) R (b) R or
RLC overdamped (c) RLC underdamped. For all these loads, draw the load voltage and
load current waveforms under steady operating condition. Discuss the nature of these
waveforms. Also indicate the conduction of the various elements of the inverter circuit.
Is it possible for this inverter to have load commutation? Explain.
3.4 For a single-phase full bridge inverter, VS = 220V dc, T = 1 ms. The load consists of RLC
in series with R = 2Ω, ωL = 8Ω, 1/wC = 7Ω.
(a) Sketch the waveforms for load voltage v0, fundamental comppnent of output current
i01, source current iS and voltage across thyristor 1. Indicate the devices that conduct
during different intervals of one cycle. Find also the rms value of fundamental
component of load current.
(b) Find the power delivered to load due to fundamental component.
(c) Check whether forced commutation is required or not.
3.5 (a) Write Fourier series expression for the output voltages and currents obtained from
single-phase half-bridge and full-bridge inverters.
(b) A single-phase bridge inverter is fed from 20 V dc. In the output voltage wave, only
fundamental component of voltage is considered. Determine the rms current ratings
of an SCR and a diode of the bridge for the following types of loads: (i) R = 1.5Ω
(ii) ωL = 3Ω
3.6 (a) A single-phase full bridge inverter is connected to a dc source of VS. Resolve the
output voltage waveshape into Fourier series.
(b) A single-phase full-bridge inverter delivers power to RLC load with
R = 2Ω and XL = 10Ω. The bridge operates with a periodicity of 0.3 ms. Calculate
the value of C so that load commutation is achived by the thyristors. Turn-off time
for thyristors is 12 µs. Factor of safety is 1.5. Assume the load current to contain
only the fundamental component.
3.7 A single-phase full-bridge inverter feeds power at 50Hz to RLC load with
R = 5Ω, L = 0.3 H and C = 50 µF. The dc input voltage is 220 V dc.
(a) Find an expression for load current up to fifth harmonic. Also, calculate:
(b) Power absorbed by the load and the fundamental power,
(c) The rms and peak currents of each thyristor,
(d) Conduction time of thyristors and diodes if only fundamental component were
considered.
3.8 Discuss the principle of working of a three-phase bridge inverter with an appropriate
circuit diagram. Draw phase and line voltage waveforms on the assumption that each
thyristor conducts for 180º and the resistive load is star-connected. The sequence of firing
of various SCRs should also be iin the diagram.
3.9 Repeat Problem 3.7in case each thyristor conducts for 120°.
3.10 Repeat Problem 3.7 in case load is delta-connected.
3.11 A star-connected load of 28Ω per phase is fed from 440V dc source through a 3-phase
bridge inverter. For both (a) 180º mode and (b) 120º mode, determine:
(i) rms value of load current
(ii) rms value of thyristor current
(iii) load power
3.12 What is the need for controlling the voltage at the output terminals of an inverter? Describe
briefly and compare the various methods employed for the control of output voltage of
single and three phase inverters.
3.13 What is pulse width modulation? List the various PWM techniques. How do these differ
from each other?
3.14 Explain various methods of harmonic reductions in detail?

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3

3.2 PERFORMANCE PARAMETERS OF INVERTERS

where Vn – rms value of the nth harmonic component.

where Vrms is the rms value of output voltage.

The DF of an individual (or nth) harmonic component is defined as:

3.3 VOLTAGE SOURCE INVERTERS

(a) Power Circuit Diagram

(b) Various waveforms

(a) Power Circuit Diagram

(b) Various waveforms

(c) Equivalent Circuit when T1 T2 conducts

(d) Equivalent Circuit when T3 T4 conducts

FIG. 3.3: (c) Load voltage & current waveforms for

FIG. 3.3: (d) Load voltage & current waveforms for

Fourier Analysis of single-phase inverter output voltage:

FIG. 3.4: Three-phase VSI bridge Inverter

FIG. 3.6(a): Step–I (0–60º); T1, T6, T5 conducts

The line to neutral voltages are:

Fig. 3.6 (b): Step II (60º–120º); T1, T6, T2 conducts

* For 3-phase star connected load, VL = 3Vp and IL = I p

* For delta concetion, VL = Vp and IL = 3 Ip

The rms value of nth component of line voltage:

The rms value of phase voltage Vp:

The rms value of fundamental phase voltage:

The rms value of the thyristor current:

Three-Phase 120 Degree Mode VSI:

The rms value of fundamental phase voltage:

The rms value of line voltage: VL = 3Vp = 0.707 VS …(3.27)

The output power of the inverter:

3.4 CURRENT SOURCE INVERTERS

FIG. 3.9: Single-phase CSI

(a) Power circuit diagram

(b) Firing Table and output currents

(iii) Solar photo-voltaic utility systems

3.5 CSI VERSUS VSI

3.6 VOLTAGE CONTROL OF SINGLE-PHASE INVERTERS

FIG. 3.11: Inverter voltage control by control of dc input voltage

3.6.2 External Control of AC Output Voltage

Fig. 3.12: Series-connected inverters

3.7 PULSE WIDTH MODULATION (PWM)

(a) Control circuit for generation of gating signals

(b) Gating signals and voltage waveforms

3.7.2 Multiple Pulse-width modulation

FIG. 3.14: Multiple pulse width modulation

The rms output voltage can be derived as:

FIG. 3.15: Sinusoidal pulse width modulation

The rms output voltage for mth pulse:

3.8 ADVANCED MODULATION TECHNIQUES

FIG. 3.16: Trapezoidal modulation

The angle of the flat portion of the trapezoidal wave is given by

FIG. 3.17: Staircase modulation

3.8.3 Stepped modulation

FIG. 3.18: Stepped modulation

FIG. 3.19: Selected harmonic injection modulation

vr = 1.15 sin ωt + 0.27 sin 3ωt – 0.029 sin 9ωt …(3.37)

FIG 3.20 Harmonic injection modulation.

3.8.5 Delta modulation

FIG. 3.21: Delta modulation

3. 9 VOLTAGE CONTROL OF THREE-PHASE INVERTERS

3.9.1 Sinusoidal PWM

FIG. 3.22: Sinusoidal pulse-width modulation for three-phase inverter

FIG. 3.23: Square-wave operation