BCSE205L

Computer Architecture and Organization

Module 2 – Data Representation and Computer Arithmetic

Dr. P.Keerthika
Associate Professor
School of Computer Science and Engineering
Vellore Institute of Technology, Vellore
 Number System & Types
• In digital electronics, the number
system is used for representing the
information.
• Number system - different bases
• The base or radix of the number
system is the total number of the
digit used in the number system.
 Binary Number Systems
• Characteristics
• It holds only two values, i.e., either 0 or 1.
• It is also known as the base 2 number system.
• The position of a digit represents the 0 power of
the base(2). Example: 20
• The position of the last digit represents the x
power of the base(2). Example: 2x, where x
represents the last position.
• Examples: (10100)2, (11011)2, (11001)2, (000101)2,
 Binary Number Systems
• Terminologies - Binary systems
• Each digit – 1 Bit – 0/1 - Single Binary Digit
• Collection of 4 bits - Nibble
• Collection of 8 bits - Byte
• Collection of 16/32/64 bits - Word

Depends on Memory
Organization of a
Computer
 Decimal Number Systems
• Contains ten digits from 0 to 9
• base 10 number system
• The successive place value or position, left
to the decimal point holds units, tens,
hundreds, thousands, and so on.
 Octal Number Systems
• Contains Eight digits from 0 to 7
• base 8 number system
• Octal number – represented in only 3 bits.
• The position of a digit represents the 0
power of the base(8). Example: 80
• The position of the last digit represents the
x power of the base(8). Example: 8x, where
x represents the last position.
• Examples:
(273)8, (5644)8, (0.5365)8, (1123)8, (1223)8.
 Hexadecimal Number Systems
• Contains ten digits from 0 to 9 and 6 letters from A to
F.
• The letters from A to F defines numbers from 10 to 15.
• base 16 number system.
• The position of a digit represents the 0 power of the
base(16). Example: 160
• The position of the last digit represents the x power of
the base(16). Example: 16x, where x represents the
last position.
• Examples: (FAC2)16, (564)16, (0ABD5)16, (1123)16, (11F3)16.
 Number Systems
• Numbers
• Unsigned Numbers (+)
• has only magnitude - no sign.
• Signed Numbers(+/-)
• has both magnitude and sign
• Sign bit – 0 – positive number
• Sign bit – 1 – Negative number
• Representing Binary Numbers
• n bits – can be used to represent--- 2n distinct numbers (0 to 2n-1)
 For example: If n=3 bits, 23 = 8 distinct numbers (0 to 7)can be represented
 (0-000, 1-001, 2-010, 3-011, 4-100, 5-101, 6-110, 7-111)
 Unsigned Number Representation of 4 Bits
• If no. of bits  4, Unsigned  0 to 2n-1
• then for unsigned numbers, these four bits can store the decimal values from
0 to 24-1  (decimal values 0 to 15).
No. of Unsigned numbers that can be stored in
bits (n) n bit representation
3 Decimal Numbers 0 to 7 0 to 23-1
4 D. Numbers 0 to 15 0 to 24-1
5 D. Numbers 0 to 32 0 to 25-1
6 D. Numbers 0 to 63 0 to 26-1
7 D. Numbers 0 to 127 0 to 27-1
8 D. Numbers 0 to 255 0 to 28-1
……. …… ……

Hence, in unsigned representation - if u need to perform operations on the Decimal number 5,

we need 3 bits to represent it ---- number 14  4 bits , number 30  5 bits , ……….
 Signed Binary Numbers
• When a signed binary number is positive
• The MSB is ‘0’ which is the sign bit and rest bits represents the
magnitude
• When a signed binary number is negative
• The MSB is ‘1’ which is the sign bit and rest of the bits may be
represented by three different ways
• Signed magnitude representation
• Signed 1’s complement representation
• Signed 2’s complement representation
 Signed Binary Number Representation
• Representation
• Sign magnitude representation
• One’s complement representation
• Two’s complement representation

Unsigned  0 to 2n-1
Signed (Sign Magnitude Representation)-2n-1+1 to 2n-1-1
Signed (One’s Complement Representation)-2n-1+1 to 2n-1-1
Signed (Two’s Complement Representation)-2n-1 to 2n-1-1
 Sign Magnitude Representation of 4 Bits

• For an n bit representation:

• The most significant bit (MSB) indicates the sign (0-Positive and 1-
Negative)
• Remaining n-1 bits will represent the magnitude.
• Includes values for +0 and -0. (Two representation for 0)
• Hence the possible range of numbers –(2 n-1 -1) to +(2n-1-1)
• For 3 bits, the range is (-3,-2,-1,-0,+0,+1,+2,+3)
 (Sign Magnitude) Signed  -2n-1+1 to 2n-1-1

Sign Magnitude Representation of Signed Number

• If no. of bits  4, 1 bit - stores sign bit, remaining 3 bits – stores value
• then for signed numbers, these four bits can store the decimal values from
-(23+1) to +23-1  (decimal values -7 to +7).
No. of bits Unsigned numbers that can be stored in n bit Signed numbers that can be stored in n bit
(n) representation representation + 1 bit for sign
3 Decimal Numbers 0 to 7 0 to 23-1 -3 to-0 & +0 to +3 -22+1 to +22-1
4 D. Numbers 0 to 15 0 to 24-1 -7 to-0 & +0 to +7 -23+1 to +23-1
5 D. Numbers 0 to 32 0 to 25-1 -15 to-0 & +0 to +15 -24+1 to +24-1
6 D. Numbers 0 to 63 0 to 26-1 -31 to-0 & +0 to +31 -25+1 to +25-1
7 D. Numbers 0 to 127 0 to 27-1 -63 to-0 & +0 to +63 -26+1 to +26-1
8 D. Numbers 0 to 255 0 to 28-1 -127 to-0 & +0 to +127 -27+1 to +27-1
……. …… …… …… ……

Hence, in Signed representation - if u need to perform operations on the Decimal number 5 or -

5, we need 4 bits to represent it ---- number 14 or -14  5 bits , number 30  5 bits , ……….
 Signed and Unsigned Number Representation of 4 Bits
(Sign Magnitude Representation)

All 4 bits - data

1st bit – sign bit

Remaining 3 bits - data

Two representation for 0

 One’s Complement Representation of Signed Numbers
• One’s Complement – One way of representing a negative number.
• One’s complement of a Positive value representation
– no change in both sign bit and magnitude.

• Negative value representation – Take Complement

of every bit of the positive value of
that number (1 to 0 and 0 to 1).
1’s representation of -ve number -A =
(complement of every bit of +A)

1’s(+ve number +A) = +A

 (One’s Complement) Signed  -2n-1+1 to 2n-1-1

One’s Complement Representation of Signed Number

• If no. of bits  4, 1 bit - stores sign bit, remaining 3 bits – stores value
• then for signed numbers, these four bits can store the decimal values from
-(23+1) to +23-1  (decimal values -7 to +7).
No. of bits Unsigned numbers that can be stored in n bit Signed numbers that can be stored in n bit
(n) representation representation + 1 bit for sign
3 Decimal Numbers 0 to 7 0 to 23-1 -3 to-0 & +0 to +3 -22+1 to +22-1
4 D. Numbers 0 to 15 0 to 24-1 -7 to-0 & +0 to +7 -23+1 to +23-1
5 D. Numbers 0 to 32 0 to 25-1 -15 to-0 & +0 to +15 -24+1 to +24-1
6 D. Numbers 0 to 63 0 to 26-1 -31 to-0 & +0 to +31 -25+1 to +25-1
7 D. Numbers 0 to 127 0 to 27-1 -63 to-0 & +0 to +63 -26+1 to +26-1
8 D. Numbers 0 to 255 0 to 28-1 -127 to-0 & +0 to +127 -27+1 to +27-1
……. …… …… …… ……

Hence, in Signed representation - if u need to perform operations on the Decimal number 5 or -

5, we need 4 bits to represent it ---- number 14 or -14  5 bits , number 30  5 bits , ……….
 One’s Complement Representation of Signed Numbers
• To represent + 34 in 1’s complement
• No. of bits required to represent signed 34 is 6 bits + 1 sign bit
6 6
(-63 to-0 & +0 to +63 )  (-2 +1 to +2 -1)
• For a positive value – One’s complement representation remains same as its
original value.
(34)10= (100010)2
After Adding sign bit, (34)10= (0100010)2
Hence,
One’s Complement Representation of Signed Numbers
• To represent - 34 in 1’s complement
• No. of bits required to represent signed 34 is 6 bits + 1 sign bit
6 6
(-63 to-0 & +0 to +63 )  (-2 +1 to +2 -1)
• For a Negative value – One’s complement representation – calculated by taking
Complement of every bit of the positive value of that number (1 to 0 and 0 to 1).
• Hence,
(34)10= (100010)2
After Adding sign bit, (34)10= (0100010)2
Hence,
One’s Complement Representation of Signed Numbers
• To represent +6 and -6 in 1’s complement
• No. of bits required to represent signed +6 is 3 bits + 1 sign bit
3 3
(-7 to -0 & +0 to +7 )  (-2 +1 to +2 -1)
• In common, 8 bits can also be used for generalization (if needed)
(6)10= (110)2
• Representing +6 using One’s complement:
With sign bit, (6)10= (0110)2
Hence, One’s complement representation of +6 = 0110
• Representing -6 using One’s complement:
With sign bit, (6)10= (0110)2
Hence, One’s complement representation of -6 = 1001
One’s Complement Representation of Signed 4 Bits

Sign-Magnitude Representation

Two representation for 0

One’s Complement Representation of Signed Numbers
• To represent +6 and -6 in 1’s complement
• No. of bits required to represent signed +6 is 3 bits + 1 sign bit
3 3
(-7 to -0 & +0 to +7 )  (-2 +1 to +2 -1)
• In common, 8 bits can also be used for generalization (if needed)
(6)10= (110)2
• Representing +6 using One’s complement:
With sign bit, (6)10= (0110)2
Hence, One’s complement representation of +6 = 0110
• Representing -6 using One’s complement:
With sign bit, (6)10= (0110)2
Hence, One’s complement representation of -6 = 1001
 One’s Complement Representation of Signed Numbers
• To represent +6 and -6 in 1’s complement
• No. of bits required to represent signed +6 is 3 bits + 1 sign bit
3 3
(-7 to -0 & +0 to +7 )  (-2 +1 to +2 -1)
• In common, 8 bits can also be used for generalization (if needed)
(6)10= (0000 0110)2 Extra bits – that results in 0000 and 1111

• Representing +6 using One’s complement: Both are considered as ‘0’

With sign bit, (6)10= (0000 0110)2

Hence, One’s complement representation of +6 = 0000 0110
• Representing -6 using One’s complement: two representations for zero: all 0s and all 1s. This can lea
some complications in arithmetic operations and compar
With sign bit, (6)10= (0000 0110)2 which is why other signed number representations like 2'
complement are more commonly used.
Hence, One’s complement representation of -6 = 1111 1001
Disadvantage of One’s Complement Representation
• Hence, One’s complement representation of +6 = 0000 0110
• Hence, One’s complement representation of -6 = 1111 1001

• It's important to note that in 1's complement representation, there are

two representations for zero (+0 = 0000 & -0 = 1111).
• This lead to some complications in arithmetic operations, comparisons and
conversions…
One’s Complement – Not preferred for any calculation
Reason that other signed number representations like 2's complement
are more commonly used.
 Two’s Complement Representation of Signed Numbers
• One representation for 0 (Both +0 and -0 are treated as same)
• For a positive value – Two’s complement representation remains same
as its original value.
• For a Negative value – Two’s complement representation – calculated by
taking One’s Complement of the positive value of that number + 1.
(Complement every bit of the number and then add one to the resulting number)
 Two’s Complement Representation of Signed Numbers
• Example: How to represent -4 using 2’s complement representation??
• No. of bits required to represent signed - 4 is 3 bits + 1 sign bit
• Signed representation of +4=0100
• 1’s complement representation of -4 is –(0100) is 1011.
• 2’s complement representation  1011
+ 1
=1100
• Here again the most significant bit will indicate the sign 0 for positive,
1 for negative.
 (Two’s Complement) Signed  -2n-1 to 2n-1-1

Two’s Complement Representation of Signed Number

• If no. of bits  4, 1 bit - stores sign bit, remaining 3 bits – stores value
• then for signed numbers, these four bits can store the decimal values from
-(23) to +23-1  (decimal values -8 to +7).
No. of bits Unsigned numbers that can be stored in n bit Signed numbers that can be stored in n bit
(n) representation representation + 1 bit for sign
3 Decimal Numbers 0 to 7 0 to 23-1 -4 to +3 -22 to +22-1
4 D. Numbers 0 to 15 0 to 24-1 -8 to +7 -23 to +23-1
5 D. Numbers 0 to 32 0 to 25-1 -16 to +15 -24 to +24-1
6 D. Numbers 0 to 63 0 to 26-1 -32 to +31 -25 to +25-1
7 D. Numbers 0 to 127 0 to 27-1 -64 to +63 -26 to +26-1
8 D. Numbers 0 to 255 0 to 28-1 -128 to +127 -27 to +27-1
……. …… …… …… ……

Hence, in Signed representation - if u need to perform operations on the Decimal number 5 or -

5, we need 4 bits to represent it ---- number 14 or -14  5 bits , number 30  5 bits , ……….
 Two’s Complement Representation of Signed Numbers
• Method 1 2’s complement representation of (-34) = 1’s complement representation of (-34)+1
• To represent two complement representation of -34.
 Two’s Complement Representation of Signed Numbers
• Method 2
Two’s Complement Representation of Signed Numbers
• To represent +6 and -6 in 2’s complement
• No. of bits required to represent
3
signed +6 is 3 bits + 1 sign bit
3
(-8 to +7 )  (-2 to +2 -1)
(6)10= (110)2
• Representing +6 using Two’s complement:
With sign bit, (6)10= (0110)2
Hence, Two’s complement representation of +6 = 0110
• Representing -6 using One’s complement:
With sign bit, (6)10= (0110)2
Hence, Two’s complement representation of -6 = 1001
+1
= 1010
 Two’s Complement Representation of Signed Numbers

Advantages
• Unique representation of 0.
• Subtraction can be done using addition.
• Leads to substantial saving in circuitry.
Expansion of Bit Length: Add additional bit positions to the left
and fill in with the value of the original sign bit.
Overflow Rule: If two numbers with the same sign (both positive or
both negative) are added, then overflow occurs if and only if the
result has the opposite sign.
Features of Two’s complement
Features of Two’s complement
To conclude: Pros and cons of integer representation
• Signed magnitude representation:
• 2 representations for 0
• Simple
• 255 different numbers can be represented.
• Need to consider both sign and magnitude in arithmetic
• Different logic for addition and subtraction
• 1’s complement representation:
• 2 representations for 0
• Complexity in performing addition and subtraction
• 255 different numbers can be represented.
• 2’s complement representation:
• Only one representation for 0
• 256 different numbers can be represented.
• Arithmetic works easily
To Conclude: Signed Binary Numbers

-9 +9
Signed magnitude representation 1 1001 0 1001
Signed 1’s complement representation 1 0110 0 1001
Signed 2’s complement representation 1 0111 0 1001
-0 +0
Signed magnitude representation 1 0000 0 0000
Signed 1’s complement representation 1 1111 0 0000
Signed 2’s complement representation -None- 0 0000
 To Conclude: Range of Binary Numbers

For a Binary Number of n bits,

 Decimal to Binary Conversion(unsigned)

• Converting a decimal number to binary is done by dividing the digit

by 2 and writing out the remainder aside.
Decimal to Binary Conversion (Negative number)

8-bit Representation 5-bit Representation

Decimal to Binary Conversion (Negative number)
 Binary to Decimal Conversion

• Binary number b n-1 …b 2 b 1 b 0

• Equivalent unsigned decimal value  bn-12n-1+…+b222+b121+b020
• Example:
• Binary number  (0101)2
• Equivalent unsigned decimal value  0*23+1*22+0*21+1*20

0+4+1= 5
• 5 is the unsigned decimal value of the binary number 0101
 Binary to Decimal Conversion (Unsigned)

• Binary number b n-1 …b 2 b 1 b 0

• Equivalent unsigned decimal value  bn-12n-1+…+b222+b121+b020
• Example:
 Binary to Decimal Conversion (Negative number)
8-bit Representation
5-bit Representation

Sign bit
– Hence multiply by –(27)
 Signed Binary Number Arithmetic
• Add or Subtract two signed binary number including its sign bit

• signed 1’s complement method

or
• signed 2’s complement method

• The 1’s complement and 2’s complement rules of general binary number – applicable

• It is important to decide how many bits to be used to represent the number

Example: Representing +5 and -5 on 8 bits:

+5: 00000101
-5: 10000101

So, very first step - to decide on the number of bits to represent number
 Real/Fractional Number Notation
• Real Numbers - numbers with fractional component
• Two major approaches to store real numbers
• Fixed Point Notation
• Floating Point Notation.
• Fixed point notation - there are a fixed number of digits after the decimal
point (Integer . Fraction)
• In this representation the position of the radix point is fixed. Hence this
representation is called fixed point representation
• Example: (123.431), (4.5)10 = (100.1)2
• Floating point number - allows for a varying number of digits after the
decimal point. (Integer . Fraction)
• In this representation the position of the radix point is allowed to move.
• Example: (-123.334444455555567),
Real Number Notation
 Fixed Point Representation
• The number of integer and fraction bits must be agreed upon by
those generating and those reading the number
• Example: Fixed-point representation of 6.75 using 4 integer bits
and 4 fraction bits in binary
• 6 =110 - 0110
• .75 = 110  1100
• Binary Representation:
01101100
(6.75)10 = (0110.1100)2
• Convert back to Decimal (Check)
0*23 + 1*22 + 1*21 + 0*20 + 1*2-1 + 1*2-2 + 0*2-3 + 0*2-4
= 6.75
Fixed Point Representation
Fixed Point Representation (unsigned)
Fixed Point Representation (Signed)
 Fixed Point Binary Numbers - Arithmetic
Operations
• Addition
• Subtraction
• Multiplication
• Division
 Fixed Point Binary Numbers - Addition
• Follow same rules as in decimal addition, with the difference that when
sum is 2 indicates a carry (not a 10)
• Carry rules Carry 1 1 1 1 1 0
• 0+0 = sum 0 carry 0 Augend 0 0 1 0 0 1
• 0+1 = 1+0 = sum 1carry 0 Addend 0 1 1 1 1 1
• 1+1 = sum 0 carry1 Result 1 0 1 0 0 0
• 1+1+1 = sum 1 carry1

111 Carry Values

0101
+1011
10000
 Fixed Point Binary Numbers - Subtraction
• Borrow rules
• 0-0 = 1-1 = 0 borrow 0
• 1-0 = 1 borrow 0
• 0-1 = 1 borrow 1
• The rules of the decimal base applies to binary as well.
• To be able to calculate 0-1, we have to “borrow one” from the next left
digit. 12
0202
1010
-0111
0011
Fixed Point Binary Numbers - Addition &
Subtraction
Fixed Point Binary Numbers - Addition &
Subtraction
 Overflow and Underflow
• Overflow Overflow
• Overflow occurs - When the addition of • Assume 4-bit restriction and 2’s complement
two binary numbers represented in ‘n’ • Maximum possible value: 24-1 – 1 = 7
bits - yields a result that is greater than 610 + 310 = should be 910
the maximum possible value that can
be represented with ‘n’ bits. But, signed 9 can’t be represented with 4 bits…
Hence it produces a wrong result.
• Possible with both integers and floating
point numbers. 01102 610
• Example: adding 1 to the maximum +00112 +310
value of a uint 8 (255) would cause an 10012 -710  not good!
overflow, resulting in a value of 0.
 Overflow and Underflow
• Underflow
• Underflow occurs - When an
arithmetic operation of two binary
numbers represented in ‘n’ bits -
yields a result that is lesser than
the minimum possible value that
can be represented with ‘n’ bits.
• Underflow is a bit trickier to
understand because it has to do
with precision in floating points.
Underflow
• Assume 4-bit restriction and 2’s complement
• Minimum possible value: -(24-1) = -8
-510 + -510 = should be -1010
But, signed -10 can’t be represented with 4 bits…
Hence it produces a wrong result.
10112 -510
+10112 +-510
01102 610  not good!
 Overflow of Signed Numbers

carry and
carry generated, overflow
but no overflow The answer must be -9 (which needs
5 bits and cannot be represented with
4 bits). Hence the answer calculated
shows +7 (Because of overflow)

no carry and
no carry and overflow
no overflow
 Overflow
• Overflow and Underflow – Errors
• To check for Overflow error - need a simple error-detection method that doesn't
require any additional arithmetic.
• the most elegant solution is to check for the sign of the sum and compare it against the signs
of the numbers added.
• Obviously, two positive numbers added together should give a positive result, and two negative numbers
added together should give a negative result.
• Notice that whenever we had a condition of overflow in the example problems, the sign of the result was
always opposite of the two added numbers: +1710 plus +1910 giving -2810, or -1710 plus -1910 giving +2810.
• By checking the signs alone we are able to tell that something is wrong.
• But what about cases where a positive number is added to a negative number? What sign should the
sum be in order to be correct. Or, more precisely, what sign of sum would necessarily indicate an
overflow error?
• There will never be an overflow error when two numbers of opposite signs are added together!
• The reason for this is apparent when the nature of overflow is considered. Overflow occurs when the magnitude
of a number exceeds the range allowed by the size of the bit field. The sum of two identically-signed numbers
may very well exceed the range of the bit field of those two numbers, and so in this case overflow is a possibility.
However, if a positive number is added to a negative number, the sum will always be closer to zero than either of
the two added numbers: its magnitude must be less than the magnitude of either original number, and so
overflow is impossible.
Fixed Point Arithmetic Operations-
Multiplication
 Fixed Point Binary Numbers -
Multiplication
• Multiplication
• Generation of Partial Products.
• Each successive partial product is shifted one position to the left relative to
the preceding partial product
• Final product = sum of the Partial Products.

• Multiplication of two unsigned binary numbers of n bit size results into 2n bit
result.
N * N bits input = 2N bits result
 Fixed Point Binary Numbers -
Multiplication
Unsigned Integer representation
• n bit - How many distinct numbers can be represented?
• 2n – Distinct numbers.
 For example:
 If n=3 bits,
23 = 8 (0-000, 1-001, 2-010, 3-011, 4-100, 5-101, 6-110, 7-111)
 0 is minimum and 7 (2n-1) is maximum
 If n=4 bits,
24 = 16 (0 to 15)
 0 is minimum and 15 is maximum
 If n=5 bits,
25 = 32 (0 to 31)
 0 is minimum and 31 is maximum
 If n=6 bits,
26 = 64 (0 to 63)
 0 is minimum and 63 is maximum
 Multiplication of unsigned numbers
1. Multiply the given numbers 13 x 11
• number of bits required to represent the number 13 is 4 bits
• number of bits required to represent the number 11 is 4 bits
• Convert decimal to binary
• 13 1101
• 111011
 Multiplication of unsigned numbers
1. Multiply the given numbers 13 x 11

27 26 25 24 23 22 21 20

=(1*27)+ (0*26)+(0*25)+(0*24)+(1*23)+(1*22)+(1*21)+(1*20) =128+8+4+2+1 = 143

Product of 2 n-bit numbers is at most a 2n-bit number.

Unsigned multiplication can be viewed as addition of shifted versions of the multiplicand.
 Multiplication of unsigned numbers

• We added the partial products at end.

• Alternative would be to add the partial products at each stage.

• Rules to implement multiplication:

• If the ith bit of the multiplier is 1, shift the multiplicand and add the shifted
multiplicand to the current value of the partial product.
• Hand over the partial product to the next stage
• Value of the partial product at the start stage is 0.
 Multiplication of unsigned numbers

Typical Multiplication Cell

 Multiplication of unsigned numbers

Combinatorial array multiplier

Multiplicand is shifted by
displacing it through an
array of adders.
 Multiplication of Signed numbers
Signed number representation
• For an n bit representation: MSB- sign bit(0 or 1), n-1(magnitude)

• The possible range of numbers–(2 n-1 ) (Min) to +(2n-1-1)(Max)

 If n=4 bits, - 23 to + 23 -1= -8 to +7
 -8 is minimum and 7 is maximum
 If n=5 bits, - 24 to + 24 -1= -16 to +15
 -16 is minimum and 15 is maximum
 If n=6 bits, - 25 to + 25 -1= -32 to +31
 -32 is minimum and 31 is maximum
 Multiplication of Signed numbers
• Case 1:Multiply the given numbers (+13) x (+11) (Positive
Multiplier)
• number of bits required to represent the number +13 is 5 bits
• number of bits required to represent the number +11 is 5 bits
• Convert decimal to binary
• 13 1101 111011
• +13 01101(5 bits=0(sign), 1101(magnitude))
• +1101011(5 bits=0(sign), 1011(magnitude))
 Multiplication of Signed numbers
Multiplication of 5 bits and 5 bits – 0 1 1 0 1  + 13 
produces 10 bit result … Hence 0 1 0 1 1 ( + 11 )
extra bit added.. (optional)
0 0 0 0 0 0 1 1 0 1

0 0 0 0 0 1 1 0 1
Sign extension is
shown in red
0 0 0 0 0 0 0 0

0 0 0 1 1 0 1

0 0 0 0 0 0

0 0 1 0 0 0 1 1 1 1  - 143 

- 29 28 27 26 25 24 23 22 21 20
= (0*-29)+ (0*28)+ (1*27)+(0*26)+(0*25)+(0*24)+(1*23)+(1*22)+(1*21)+(1*20)
=128+8+4+2+1 =143 answer
 Multiplication of Signed numbers
• Case 2: Multiply the given numbers (-13) x (+11) (Positive Multiplier)

• number of bits required to represent the number -13 is 5 bits

• number of bits required to represent the number +11 is 5 bits
• Convert decimal to binary
• 13 1101 111011
• Take 2’s complement of 130010+1=0011
• -13 10011(5 bits=1(sign), 0011(magnitude))
• +1101011(5 bits=0(sign), 1011(magnitude))
Multiplication of Signed numbers
1 0 0 1 1  - 13 
0 1 0 1 1 ( + 11 )

1 1 1 1 1 1 0 0 1 1

1 1 1 1 1 0 0 1 1
Sign extension is
0 0 0 0 0 0 0 0 shown in red

1 1 1 0 0 1 1

0 0 0 0 0 0

1 1 0 1 1 1 0 0 0 1  - 143 
- 29 28 27 26 25 24 23 22 21 20
= (1*-29)+ (1*28)+ (0*27)+(1*26)+(1*25)+(1*24)+(0*23)+(0*22)+(0*21)+(1*20)
=-512+256+64+32+16+1
=-143 answer
 Multiplication of Signed numbers
• Case 3: Multiply the given numbers (+13) x (-11) (Negative Multiplier)
• number of bits required to represent the number +13 is 5 bits
• number of bits required to represent the number -11 is 5 bits
• Convert decimal to binary
• 13 1101 111011
• Take 2’s complement of 110100+1=0101
• +13 01101(5 bits=0(sign), 1101(magnitude))
• -1110101(5 bits=1(sign), 0101(magnitude))
• Since the multiplier is negative(-), take 2’s complement of both M(+13) and Q(-11)
and proceed as -13 and 11
• Take 2’s complement of (+13)10010+1=10011(-13)
• Take 2’s complement of (-11)01010+1=01011(11)
• -13 10011(5 bits=1(sign), 0011(magnitude))
• +1101011(5 bits=0(sign), 1011(magnitude))
 Multiplication of Signed numbers
Since the multiplier is negative(-), take 2’s complement of
both M(+13) and Q(-11) and proceed as -13 and 11
1 0 0 1 1  - 13 
0 1 0 1 1 ( + 11 )

1 1 1 1 1 1 0 0 1 1

1 1 1 1 1 0 0 1 1
Sign extension is
0 0 0 0 0 0 0 0 shown in red

1 1 1 0 0 1 1

0 0 0 0 0 0

1 1 0 1 1 1 0 0 0 1  - 143 
- 29 28 27 26 25 24 23 22 21 20
= (1*-29)+ (1*28)+ (0*27)+(1*26)+(1*25)+(1*24)+(0*23)+(0*22)+(0*21)+(1*20)
=-512+256+64+32+16+1
=-143 answer
 Multiplication of Signed numbers
• Case 4: Multiply the given numbers (-13) x (-11)
• number of bits required to represent the number -13 is 5 bits
• number of bits required to represent the number -11 is 5 bits
• Convert decimal to binary
• 13 1101 111011
• Take 2’s complement of 130010+1=0011
• Take 2’s complement of 110100+1=0101
• -13 10011(5 bits=1(sign), 0011(magnitude))
• -1110101(5 bits=1(sign), 0101(magnitude))
• Since the multiplier is negative(-), take 2’s complement of both M(-13) and Q(-11) and
proceed as 13 and 11
• Take 2’s complement of (-13)01100+1=01101(+13)
• Take 2’s complement of (-11)01010+1=01011(+11)
• +13 01101(5 bits=0(sign), 1101(magnitude))
• +1101011(5 bits=0(sign), 1011(magnitude))
Multiplication of Signed numbers
0 1 1 0 1  + 13 
0 1 0 1 1 ( + 11 )

0 0 0 0 0 0 1 1 0 1

0 0 0 0 0 1 1 0 1
Sign extension is
shown in red
0 0 0 0 0 0 0 0

0 0 0 1 1 0 1

0 0 0 0 0 0

0 0 1 0 0 0 1 1 1 1  - 143 

- 29 28 27 26 25 24 23 22 21 20
= (0*-29)+ (0*28)+ (1*27)+(0*26)+(0*25)+(0*24)+(1*23)+(1*22)+(1*21)+(1*20)
=128+8+4+2+1 =143 answer
 Multiplication of Signed numbers

• Drawbacks of Normal Signed Multiplication

• Different strategies followed for positive and negative multiplier cases
• Multiplicand (+ve) and Multiplier (+ve)

• Multiplicand (-ve) and Multiplier (+ve)

• Multiplicand (+ve) and Multiplier (-ve)

• Multiplicand (-ve) and Multiplier (-ve)

 Multiplication of Signed numbers
– Booth Algorithm
• Allows multiplication of two signed binary integers in 2's complement respectively.
• Advantages:
• Booth Algorithm will treat both positive and negative multiplier in the same way.
• Speed up the performance of the multiplication process - very efficient too.
• It reduces no of partial product addition
• Booth modifies the multiplier bits to reduce the
number of partial product.
 Multiplication of Signed numbers
– Booth Algorithm
• Multiplication Steps:
Step 1: Find binary Multiplier Booth
representation of Multiplicand (M) Multiplier Bit
Bit i Bit (i-1)
and Multiplier (Q) including sign
(Bit to modify) (Bit to the right of i)
bit
Step 2: Add zero to the LSB of 0 0 0×M
the multiplier 0 1 +1 × M
Step 3: Use booth multiplier
recoding table to modify the 1 0 -1 × M
multiplier bits 1 1 0× M
Step 4: Perform Multiplication
 Multiplication of Signed numbers
– Booth Algorithm
Finding the Booth Multiplier
• Example 1: M = 6 , Q = 2 • Example 3: M = - 6 , Q = 2
• 6  0110 and 2 -> 0010 • - 6  1010 and 2 -> 0010
• Booth Recoding • Booth Recoding multiplier
multiplier
Multiplier Booth
0 0 1 0 0
0 0 1 0 0 Bit i Bit (i-1) Multipl
0 +1 -1 0
0 +1 -1 0 (Bit to (Bit to the ier Bit
modify) right of i)
• Example 2: M = 6 , Q = -2 • Example 4: M = 6 , Q = -2
• 6  0110 and -2 -> 1110 • - 6  1010 and -2 -> 1110
0 0 0×M
• Booth Recoding • Booth Recoding multiplier 0 1 +1 × M
multiplier 1 1 1 0 0
1 1 1 0 0 1 0 -1 × M
0 0 -1 0
0 0 -1 0 1 1 0× M
 Case 1: 6 X 2 Multiplication of Signed numbers - Booth Algorithm
Step 1: Find binary representation of Multiplicand (6) and multiplier
(2) Including sign bit. 6  0110 and 2 -> 0010
Step 2:Recoding multiplier  00100 0+1-10
Step 3: Multiplication operation Multiplier Booth
0110X Bit i Bit (i-1) Multiplier
0+1-10 -1 take 2’complement (Bit to (Bit to the Bit
00000000 of multiplicand modify) right of i)
1111010 0 0 0×M
000110 0 1 +1 × M
00000 (Sign bit of the result) 1 0 -1 × M
1 1 0× M
100001100 answer is 12
7 6 5 4 3 2 1 0
(Ignore carry) -2 2 2 2 2 2 2 2 =(0*-27)+ (0*26)+(0*25)+(0*24)+(1*23)+(1*22)+(0*21)+(0*20)=8+4=12
Case 2: 6 X -2 Multiplication of Signed numbers - Booth Algorithm
Step 1: Find binary representation of Multiplicand (6) and multiplier
(-2) Including sign bit. 6  0110 and -2  1110
Step 2: Recoding multiplier  11100  0 0 -1 0
Step 3: Multiplication operation Multiplier Booth
0110X Bit i Bit (i-1) Multiplier
0 0 -1 0 -1 take 2’complement (Bit to (Bit to the Bit
00000000 of multiplicand modify) right of i)
1111010 0 0 0×M
000000 0 1 +1 × M
00000 (Sign bit of the result) 1 0 -1 × M
1 1 0× M
11110100 answer is -12
-27 26 25 24 23 22 21 20 =(1*-27)+ (1*26)+(1*25)+(1*24)+(0*23)+(1*22)+(0*21)+(0*20)=-128+64+32+16+4=-12
Case 3: -6 X 2 Multiplication of Signed numbers - Booth Algorithm
Step 1: Find binary representation of Multiplicand (-6) and multiplier
(2) Including sign bit. -6  1010 and 2 0010
Step 2: Recoding multiplier  00100  0 +1 -1 0
Step 3: Multiplication operation Multiplier Booth
1010X Bit i Bit (i-1) Multiplier
0+1-1 0 -1 take 2’complement (Bit to (Bit to the Bit
00000000 of multiplicand modify) right of i)
0000110 0 0 0×M
111010 0 1 +1 × M
00000 (Sign bit of the result) 1 0 -1 × M
1 1 0× M
11110100 answer is -12
-27 26 25 24 23 22 21 20 =(1*-27)+ (1*26)+(1*25)+(1*24)+(0*23)+(1*22)+(0*21)+(0*20)=-128+64+32+16+4=-12
Case 4: -6 X -2 Multiplication of Signed numbers - Booth Algorithm
Step 1: Find binary representation of Multiplicand (-6) and multiplier
(-2) Including sign bit. -6  1010 and -2 1110
Step 2: Recoding multiplier  11100  0 0 -1 0
Step 3: Multiplication operation Multiplier Booth
1010X Bit i Bit (i-1) Multiplier
0 0 -1 0 -1 take 2’complement (Bit to (Bit to the Bit
00000000 of multiplicand modify) right of i)
0000110 0 0 0×M
000000 0 1 +1 × M
00000 (Sign bit of the result) 1 0 -1 × M
1 1 0× M
00001100 answer is 12
-27 26 25 24 23 22 21 20 =(0*-27)+ (0*26)+(0*25)+(0*24)+(1*23)+(1*22)+(0*21)+(0*20)=8+4=12
 Multiplication of Signed numbers
– Booth Algorithm
• Hardware for Booth’s Multiplication
 Multiplication of Signed numbers
– Booth Algorithm
Flow Chart
M - Multiplicand
Q - Multiplier
Q0 - least significant bit of QR
Q-1 - previous least significant bit of QR
A- 0
Count - number of bits in multiplier
Example: Multiplication of Signed numbers - Booth Algorithm
Multiply 7 x 3
Multiplicand =7  Binary equivalent is 0111M
Multiplier = 3 Binary equivalent is 0011Q
-7  Binary equivalent is 1001 -M
A0 0 0 0 A 1 1 10
-M 1 0 0 1 M 0 1 1 1
A1 0 0 1 A0 1 0 1
Step A Q Q-1 Action Count

1 0 0 0 0 0 0 1 1 0 Initial 4

2 1 0 0 1 0 0 1 1 0 AA-M
1 1 0 0 1 0 0 1 1 Right Shift 3

3 1 1 1 0 0 1 0 0 1 Right Shift 2

4 0 1 0 1 0 1 0 0 1 AA+M
0 0 1 0 1 0 1 0 0 Right Shift 1

5 0 0 0 1 0 1 0 1 0 Right Shift 0 Convert binary to decimal and the

answer is 21
-27 26 25 24 23 22 21 20
Example: Multiplication of Signed numbers - Booth Algorithm
Multiply 7 x -3
Multiplicand =7  Binary equivalent is 0111M
Multiplier = -3 Binary equivalent is 1101Q
-7  Binary equivalent is 1001 -M
Step A Q Q-1 Action Count

1 0 0 0 0 1 1 0 1 0 Initial 4
A0 0 0 0
2 1 0 0 1 1 1 0 1 0 AA-M -M 1 0 0 1
1 1 0 0 1 1 1 0 1 Shift 3 A1 0 0 1

3 0 0 1 1 1 1 1 0 1 AA+M A1 1 0 0
+M 0 1 1 1
0 0 0 1 1 1 1 1 0 Shift 2
A 10 0 1 1 Discard 1
4 1 0 1 0 1 1 1 1 0 AA+M A0 0 0 1
1 1 0 1 0 1 1 1 1 Shift 1 -M 1 0 0 1
A1 0 1 0
5 1 1 1 0 1 0 1 1 1 Shift 0
-27 26 25 24 23 22 21 20 Convert binary to decimal and the
answer is -21
Example: Multiplication of Signed numbers - Booth Algorithm
Multiply -7 x 3
Multiplicand =-7  Binary equivalent is 1001M
Multiplier = 3 Binary equivalent is 0011Q

Step A Q Q-1 Action Count

1 0 0 0 0 0 0 1 1 0 Initial 4
A0 0 0 0
2 0 1 1 1 0 0 1 1 0 AA-M -M 0 1 1 1
0 0 1 1 1 0 0 1 1 Shift 3 A0 1 1 1

3 0 0 0 1 1 1 0 0 1 Shift 2 A0 0 0 1
+M 1 0 0 1
4 1 0 1 0 1 1 0 0 1 AA+M A1 0 1 0
1 1 0 1 0 1 1 0 0 Shift 1

5 1 1 1 0 1 0 1 1 0 Shift 0

-27 26 25 24 23 22 21 20 Convert binary to decimal and the

answer is -21
Example: Multiplication of Signed numbers - Booth Algorithm
Multiply -7 x -3
Multiplicand =-7  Binary equivalent is 1001M
Multiplier = -3 Binary equivalent is 1101Q

Step A Q Q-1 Action Count

1 0 0 0 0 1 1 0 1 0 Initial 4
A0 0 0 0
2 0 1 1 1 1 1 0 1 0 AA-M -M 0 1 1 1
0 0 1 1 1 1 1 0 1 Shift 3 A0 1 1 1

3 1 1 0 0 1 1 1 0 1 AA+M A0 0 1 1
+M 1 0 0 1
1 1 1 0 0 1 1 1 0 Shift 2
A1 1 0 0
4 0 1 0 1 0 1 1 1 0 AA-M
A1 1 1 0
0 0 1 0 1 0 1 1 1 Shift 1 -M 0 1 1 1
A0 1 0 1 Discard 1
5 0 0 0 1 0 1 0 1 1 Shift 0
-27 26 25 24 23 22 21 20 Convert binary to decimal and the
answer is 21
 Multiplication of Signed numbers
– Booth Algorithm
Practice Problems
• Show the step by step multiplication process using Booth
algorithm when the following binary numbers are
multiplied. Assume 5-bit registers that hold signed
numbers. The multiplicand in both cases is +15.
• (+15) × (+13)
• (+15) × (-13)
 Multiplication of Signed numbers
– Bit Pair Recoding Algorithm
• Fast Multiplication / Modified Booth Algorithm
• Bit-pair recoding halves the maximum number of summands (versions of the
multiplicand)
• - Reduces the number of Partial Products
 Multiplication of Signed numbers
– Bit Pair Recoding Algorithm
Multiplier Multiplier bit Booth
Note:
on the right Multiplier Bit
Bit i+1 Bit (i)
If multiplier bit is (left bit) (Bit to modify) i-1

• +1 Partial Product (PP) = M × 1

0 0
0 0
• -1 PP = 2’s (M)
0 1
• +2 PP = M × 10
0 1
• -2 PP = 2’s (M × 10) 1 0
1 0
1 1
1 1
0 0×M
1 +1 × M
0 +1 × M
1 +2 × M
0 -2 × M
1 -1 × M
0 -1 × M
1 0× M
 Multiplication of Signed numbers – Bit Pair Recoding Algorithm
Case 1: 13 x 6
0 1 1 0 1 ( + 13 ) Multiplier Multiplier Booth
´ 0 0 1 1 0 +6  bit on the Multiplier
Bit i+1 Bit (i)
(left bit) (Bit to right Bit
• Bit- Pair Recoded Multiplier modify) i-1

Implied 0 0 0 0 0×M
0 0 0 1 1 0 0 0 0 1 +1 × M
Sign extension 0 +2 -2Bit Pair Recoding Multiplier 0 1 0 +1 × M
0
0
1 1
+2
0 1
-2
0 1 1 +2 × M
1
0
1
0
1
0
1
1
1
1
0
0
0
1
1
0
1 0
1 0 0 -2 × M
0 0 0 0 0 0
1 0 0 0 1 0 0 1 1 1 0
1 0 1 -1 × M
1 1 0 -1 × M
64+8+4+2=78
1 1 1 0× M
 Multiplication of Signed numbers – Bit Pair Recoding Algorithm
Case 2: 13 x -6
0 1 1 0 1 ( + 13 )
1 1 0 1 0  -6 
Multiplier Multiplier Booth
Bit i+1 Bit (i) bit on the Multiplier
• Bit- Pair Recoded Multiplier (left bit) (Bit to right Bit
Implied 0 modify) i-1
1 1 1 0 1 0 0
0 0 0 0×M
Sign extension 0 -1 -2 Bit Pair Recoding Multiplier 0 0 1 +1 × M
0 1 1 0 1 0 1 0 +1 × M
0 -1 -2
1 1 1 1 1 0 0 1 1 0 0 1 1 +2 × M
1 1 1 1 0 0 1 1
0 0 0 0 0 0 1 0 0 -2 × M
1 1 1 0 1 1 0 0 1 0 -78
- 29 28 27 26 25 24 23 22 21 20 1 0 1 -1 × M
= (1*-29)+ (1*28)+ (1*27)+(0*26)+(1*25)+(1*24)+(0*23)+(0*22)+(1*21)+(0*20) 1 1 0 -1 × M
=-512+256+128+32+16+2
=-78 answer 1 1 1 0× M
 Multiplication of Signed numbers – Bit Pair Recoding Algorithm
Case 3: -13 x 6
1 0 0 1 1 ( - 13 )
0 0 1 1 0 +6 
Multiplier Multiplier Booth
Bit i+1 Bit (i) bit on the Multiplier
• Bit- Pair Recoded Multiplier (left bit) (Bit to right Bit
modify) i-1
Implied 0
0 0 0 1 1 0 0 0 0 0 0×M
Sign extension 0 +2 -2Bit Pair Recoding Multiplier 0 0 1 +1 × M
1 0 0 1 1
0 +2 -2 0 1 0 +1 × M
0 0 0 0 0 1 1 0 1 0 0 1 1 +2 × M
1 1 1 0 0 1 1 0
0 0 0 0 0 0 1 0 0 -2 × M
-78
1 1 1 0 1 1 0 0 1 0
1 0 1 -1 × M
- 29 28 27 26 25 24 23 22 21 20
1 1 0 -1 × M
=-512+256+128+32+16+2 =-78 answer
1 1 1 0× M
 Multiplication of Signed numbers – Bit Pair Recoding Algorithm
Case 4: -13 x -6
1 0 0 1 1 ( - 13 )
1 1 0 1 0  -6 
Multiplier Multiplier Booth
Bit i+1 Bit (i) bit on the Multiplier
• Bit- Pair Recoded Multiplier (left bit) (Bit to right Bit
Implied 0 modify) i-1
1 1 1 0 1 0 0
0 0 0 0×M
Sign extension 0 -1 -2 Bit Pair Recoding Multiplier 0 0 1 +1 × M
1 0 0 1 1
0 1 0 +1 × M
0 -1 -2
0 1 1 +2 × M
0 0 0 0 0 1 1 0 1 0

0 0 0 0 1 1 0 1
1 0 0 -2 × M
0 0 0 0 0 0 1 0 1 -1 × M
0 0 0 1 0 0 1 1 1 0 64+8+4+2=78 1 1 0 -1 × M
- 29 28 27 26 25 24 23 22 21 20
1 1 1 0× M
 Multiplication of Signed numbers
– Bit Pair Recoding Algorithm
Practice Problems
• Show the step by step multiplication process using Bit-pair
recoding technique when the following binary numbers are
multiplied. Assume 5-bit registers that hold signed
numbers. The multiplicand in both cases is +15.
• (+15) × (+13)
• (+15) × (-13)
Fixed Point Arithmetic Operations-
Division
 Division
• First, the bits of the dividend are examined from left to right, until the
set of bits examined represents a number greater than or equal to the
divisor
• this is referred to as the divisor being able to divide the number
• Until this event occurs, 0s are placed in the quotient from left to right
• When the event occurs, a 1 is placed in the quotient and the divisor is
subtracted from the partial dividend
• The result is referred to as a partial remainder
Binary Division - Example
Circuit Arrangement
Hardware Implementation of binary division

An n-bit positive divisor is loaded into register M

An n-bit positive dividend is loaded into register Q

Register AC (A) is Set to 0 M – Divisor (Initial) --- Quotient (Final)

Q – Dividend
Acc – 0 (Initial) – Remainder (Final)
Initial carry C is set to 0

After the division is complete, the n-bit quotient is in register Q and

the remainder is in register AC

 Binary Division
• Restoring Division
• Non-Restoring Division

M – Divisor (Initial) --- Quotient (Final)

Q – Dividend
Acc – 0 (Initial) – Remainder (Final)
 Restoring Division M – Divisor (Initial) --- Quotient (Final)
Q – Dividend
Acc – 0 (Initial) – Remainder (Final)
• Partial remainder is restored by adding the divisor to the negative difference
• The restoring algorithm calculates the remainder by successively
subtracting the shifted denominator from the numerator until the remainder is
in the appropriate range. The operation in each step depends on the result of the
previous step.
• Value of Register is initially kept 0 and this is the register whose value is
restored during iteration - Restoring.
 Restoring Division - Steps
M – Divisor (Initial) --- Quotient (Final)
• Steps: Q – Dividend
Acc – 0 (Initial) – Remainder (Final)

• If the sign of A is 1,
• Shift A and Q left one binary position

n cycles • A-M  A (Subtract M from A and place the result back in A)

set q0 to 0 and
A+M  A (restore A);
Otherwise,
set q0 to 1 , No ADD (No Restore);
• Repeat these steps n times
 Restoring Division – Example 1
Dividend = 8 Divisor = 3 • Shift A and Q left one binary position
• A-M  A (Subtract M from A and place the result back in A)
• If the sign of A is 1,
set q0 to 0 and
A+M  A (restore A);
Otherwise,
set q0 to 1 , No ADD (No Restore);
• Repeat these steps n times
 Restoring Division – Example 2
• Q (Dividend) = 7 and M (Divisor)= 3
 Non - Restoring Division
• Avoids restoring step in every cycle – improves the performance
• Drawbacks of Restoring Division
• In restoring,
if A is +ve (0),
left shift, A-M ----- 2A-M
if A is –ve (1),
A+M, Left Shift, A-M ------------- 2(A+M)-M =2A+M
 Non - Restoring Division - Steps
If the sign of A is 1,
Shift A and Q left one binary position (Left Shift),
A+M  A;
Otherwise,
n cycles Shift A and Q left one binary position (Left Shift),
A-M  A;
If the sign of A is 1,
set q0 to 0
Otherwise,
set q0 to 1,
Repeat these steps n times
After n cycles,
If the sign of A is 1,
A+M  A; (Restore)
 Non - Restoring Division – Example 1
Dividend = 8 Divisor = 3
If the sign of A is 1,
Shift A and Q left one binary position (Left Shift),
A+M  A;
Otherwise,
n cycles Shift A and Q left one binary position (Left Shift),
A-M  A;
If the sign of A is 1,
set q0 to 0
Otherwise,
set q0 to 1,
Repeat these steps n times
After n cycles,
If the sign of A is 1,
A+M  A; (Restore)
 Restoring Division – Examples
Case 1: Dividend = 12 Divisor = 3
 Restoring Division – Examples
Case 1: Dividend = 12 Divisor = 3
 Restoring Division – Examples
Case 2: Dividend = -7 Divisor = 3
• Dividend = -ve
• Divisor = +ve
• Algorithm:
 Restoring Division – Examples
Case 3: Dividend = 7 Divisor = -3
Case 4: Dividend = -7 Divisor = -3
 Restoring Division – Examples
• Perform Division using Restoring and Non - Restoring Algorithm.
Dividend = 11 Divisor = 2

• Find 7 divided by 6 using restoring and Non - Restoring division

Algorithm method

• Find 13 divided by 4 using Restoring Division and Non - Restoring

division Algorithm For Unsigned Integer
Floating Point Representation
 Floating Point Representation
• Fixed-point notation (e.g., twos complement) - Very large numbers cannot be
represented, very small fractions.
• Floating - point notation

• This number can be stored in a binary word with three fields:

• Sign: plus or minus
• Significand S (Mantissa)
• Exponent E
• Base
• 976,000,000,000,000 can be represented as 9.76 * 1014, and
• 0.0000000000000976 can be represented as 9.76 * 10-14
Floating Point Representation
IEEE – 754 Floating Point Representation
IEEE - Institute of Electrical and Electronics Engineers
• 3 basic components Excess 127 (Single Precision):
No. of bits for Exponent (k)= 8
• Sign of Mantissa Bias = (2𝑘−1 - 1) = (27 - 1) = 127

0 - positive number
1 - negative number
• Biased exponent
- An exponent field needs to represent both positive and negative exponents.
• A bias is added to the actual exponent in order to get the stored exponent.
• Normalized Mantissa
- Mantissa - part of a number in scientific notation or a floating-point number
- consists of its significant digits.
- Here we have only 2 digits, i.e. O and 1.
- So a normalized mantissa is one with only one ‘1’ to the left of the decimal.
 Floating Point Representation
IEEE-754 Floating Point Representation

• Single Precision Format (32 bits)

• Bias – Excess 127 - (E-127) Excess 127 (Single Precision):

Depends on the size of the registers No. of bits for Exponent (k)= 8
• Double Precision Format (64 bits) Bias = (2𝑘−1 - 1) = (27 - 1) = 127

• Bias – Excess 1023 - (E-1023)

Excess 1023 (Double Precision):

No. of bits for Exponent (k)= 11
Bias = (2𝑘−1 - 1) = (210 - 1) = 1023
Floating Point Representation – SP Format
• The representation used is known as a biased representation.
• The leftmost bit stores the sign of the number (0 = positive, 1 = negative).
• The exponent value is stored in the next 8 bits.
• Typically, the bias equals (2𝑘−1 - 1), where k is the number of bits in the binary exponent.
• The final portion of the word (23 bits in this case) is the Significand (Mantissa)
 Floating Point Representation – Steps
Steps:
1. Binary Conversion
2. Normalize the Mantissa
3. Identify Sign bit
4. Find the Exponent with Bias Value
Need for Normalization :
• Multiple representation of mantissa
and exponent are possible
– creates confusion
Hence normalization needed
Floating Point Representation –
Normalization

Formula to make normalized FP values in Human Readable form

 Floating Point Representation –
Normalization

Decimal FP: 0.0234  Not normalized, 0.234×10-1 -- Normalized

(If the MSB bit after radix point is Non-zero –> Normalized)
Binary FP: 0.01011101  Not normalized, 1.011101×2-2  Normalized
(If the radix point is after the MSB ‘1’ -Normalized)
 Floating Point Representation – Biasing
• Sign bit – Sign of the mantissa
• Possibility – exponent can also be signed (+ve and –ve)
• Hence – need to make exponent unsigned to represent the value correctly.
• Add the maximum value of the range – to make the exponent unsigned.
• Example: Consider 4 bit – exponent (Range: -8 to +7)

To make the exponent unsigned (+ve), -

Add the maximum value of the range (8)
to all the values in the range of
exponents.

Excess 8 format
Floating Point Representation – Examples

negative
20 127 + 20 = 147

negative

normalized -20 127 - 20 = 107

The bias equals to (2K-1 – 1)  28-1 – 1 = 127

Floating Point Representation – Examples
Convert these number to IEEE single precision format:
(a) 199.95312510 = 1100 0111.1111012
= 1.100 0111 111101 x 27 stored
+ 7 + 127 = 13410 1 · 1 0 0 0 1 1 1 1 1 1 1 0 1
0 1 0 0 0 0 1 1 0 1 0 0 0 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0
sign biased exponent significand

(b) -77.710 = -100 1101.10110 01102 ... 7710 = 100 11012

= -1.00 1101 101100110 ... x 26 0.710 Þ 0.7 x 2  1.4

0.4 x 2  0.8
0.8 x 2  1.6
0.6 x 2  1.2
0.2 x 2  0.4
0.4 x 2  0.8
0.8 x 2  1.6
0.6 x 2  1.2
0.2 x 2  0.4

...
stored [23 bits]
– 6 + 127 = 13310 1 · 0 0 1 1 0 1 1 0 1 1 0 ...
1 1 0 0 0 0 1 0 1 0 0 1 1 0 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0
sign biased exponent significand
 Floating Point Representation - Example
• Represent 85.125 in Floating Point Single Precision Format
• Steps: 3. Identify Sign bit
1. Binary Conversion sign = 0
85 = 1010101, 0.125 = 001
85.125 = 1010101.001 4. Find the Exponent with Bias Value
Biased exponent for Single precision :
2. Normalize the Mantissa Excess 127+6=133
1.010101001 x 26 Exponent = 133 = 10000101
Normalized Mantisa = 010101001
(add 0's to complete the 23 bits) E-127=6
E=133
The IEEE 754 Single precision is: Exponent = 133 = 10000101

0 10000101 01010100100000000000000
 Floating Point Representation - Example
• Represent 85.125 in Floating Point Double Precision Format
• Steps: 3. Identify Sign bit
1. Binary Conversion sign = 0
85 = 1010101, 0.125 = 001
85.125 = 1010101.001 4. Find the Exponent with Bias Value
Biased exponent for Double precision :
2. Normalize the Mantissa Excess 1023+6 =1029
1.010101001 x 26 Exponent = 1029 = 10000000101
Normalized Mantisa = 010101001
(add 0's to complete the 52 bits) E-1023=6
E=1029
The IEEE 754 Double precision is: Exponent = 1029 = 10000000101

0 10000000101 0101010010000000000000000000000000000000000000000000
 Floating Point Representation - Example
• Represent 1259.125 in Floating Point Single Precision Format
• Step1: Convert to Binary Step 2: Normalize the Mantissa
 Floating Point Representation - Example
• Represent 1259.125 in Floating Point Single Precision Format
• SP format (Excess-127) DP format (Excess-1023)
 Conversion of Floating Point Binary
Representation to Decimal- Example
Convert 0110100000000011 to FP Decimal. (Assume M=9 bits, E=6 bits) in the form S.M.E
(Assume Exponent is not Biased and Mantissa is not normalized)
 Conversion of Floating Point Binary
Representation to Decimal- Example
Convert 0110100000000011 to FP Decimal. (Assume M=9 bits, E=6 bits) in the form S.M.E
(Assume Exponent is not Biased and Mantissa is not normalized)
Steps:
1. Convert E to decimal.
2. Place the radix point in Mantissa based on
the decimal Exponent (E).
(If 23 – place radix point after first 3 bits.
Neglect the sign bit)
3. Follow Binary to Decimal Procedure.
 Conversion of Floating Point Binary
Representation to Decimal- Example
Convert 0101010000000010 to FP Decimal. (Assume M=9 bits, E=6 bits) in the form S.M.E
(Assume Exponent is not Biased and Mantissa is not normalized)
Floating Point Representation
• Overflow generally means that
values have grown too large to be
represented.
• Underflow is a less serious
problem because is just denotes a
loss of precision, which is
guaranteed to be closely
approximated by zero.
 Exercise Problems
Express the number - (640.5)10 in IEEE 32 bit and 64 bit floating point format
Solution:
• IEEE 32 BIT FLOATING POINT FORMAT
MSB 8 bits 23 bits
sign Biased Mantissa/Significand
Exponent (Normalized)
Step 1: Express the given number in binary form
(640.5) = 1010000000.1* 20
Step 2: Normalize the number into the form 1.bbbbbbb
1010000000.1* 20 = 1. 0100000001* 29
Once Normalized, every number will have 1 at the leftmost bit. So IEEE notation is saying that there is no need to store
this bit. Therefore significand to be stored is 0100 0000 0100 0000 0000 000 in the allotted 23 bits
 Exercise Problems
Express the number - (640.5)10 in IEEE 32 bit and 64 bit floating point format
Solution:
• IEEE 32 BIT FLOATING POINT FORMAT
MSB 8 bits 23 bits
sign Biased Mantissa/Significand
Exponent (Normalized)
Step 3: For the 11 bit biased exponent field, the bias used is
2k-1-1 = 28-1-1 = 127
Add the bias 127 to the exponent 9 and convert it into binary in order to store for 8-bit biased
exponent. 127 + 9 =136 ( 1000 1000)

Step 4: Since the given number is negative, put MSB as 1

Step 5: Pack the result into proper format(IEEE 32 bit)

1 1000 1000 0100 0000 0010 0000 0000 000

 Exercise Problems
Express the number - (640.5)10 in IEEE 32 bit and 64 bit floating point format
Solution:
• IEEE 64 BIT FLOATING POINT FORMAT
MSB 11 bits 52 bits
sign Biased Mantissa/Significand
Exponent (Normalized)
Step 1: Express the given number in binary form
(640.5) = 1010000000.1* 20
Step 2: Normalize the number into the form 1.bbbbbbb
1010000000.1* 20 = 1. 0100000001* 29
Once Normalized, every number will have 1 at the leftmost bit. So IEEE notation is saying that there is no need to store this bit. Therefore
significand to be stored is 0100 0000 0100 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 in the allotted 52 bits.
 Exercise Problems
Express the number - (640.5)10 in IEEE 32 bit and 64 bit floating point format
Solution:
• IEEE 64 BIT FLOATING POINT FORMAT
MSB 11 bits 52 bits
sign Biased Mantissa/Significand
Exponent (Normalized)
Step 3: For the 11 bit biased exponent field, the bias used is
2k-1-1 = 211-1-1 = 1023
Add the bias 1023 to the exponent 9 and convert it into binary in order to store for 11-bit
biased exponent.
1023 + 9 =1032 ( 1000 0001 000)
Step 4: Since the given number is negative, put MSB as 1
Step 5: Pack the result into proper format(IEEE 64 bit)

1 1000 0001 000 0100 0000 0010 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
 Exercise Problems
Represent -12.62510 in single precision IEEE-754 format.
Solution:
• Step #1: Convert to target base. -12.62510 = -1100.1012
• Step #2: Normalize. -1100.1012 = -1.1001012 × 23
• Step #3: Fill in bit fields. Sign is negative, so sign bit is 1.
Exponent is in excess 127 (not excess 128!), so exponent is represented as the
unsigned integer E = 3 + 127 = 130.
Leading 1 of significant is hidden, so final bit pattern is:
1 1000 0010 . 1001 0100 0000 0000 0000 000
Floating Point Arithmetic Operations
Addition
Subtraction
Multiplication
Division
 Floating Point Arithmetic Operations
• Note:
• Sign Bit – Not considered for Calculations
• IEEE 754 format is optional
• Biasing the exponent - Optional
• Normal Floating point Operations is performed
• Floating Point Operations: – No 2’s complement (Sign bit is
represented Directly…)
• Addition – Directly Add mantissas (No 2’s Complement)
• Subtraction – Directly subtract Mantissas (No 2’s Complement)
• Multiplication Division – Direct multiplication (No 2’s Complement)
• Division – Direct Division (No 2’s Complement)
 Floating Point Arithmetic Operations
• Normal Addition
X = 1.01101 x 27 1.01101 x 27
Y = 1.10101 x 26 + 0.110101 x 27
• Normal Subtraction 10.001111 x 27

X = 1.01101 x 27 1.01101 x 27
Y = 1.10101 x 26 – 0.110101 x 27
0.100101 x 27
• Normal Multiplication
X = 6.2510 = 110.012 = 1.1001 x 22 1.10012
Y = 12.510 = 1100.12 = 1.1001 x 23 x 1.10012
10.011100012

• Normal Division
X = 3.7510 = 11.112 = 1.111 x 21 0.110011
1.111 1.011111101
Y = 95.62510 = 101 1111.1012
= 1.011111101 x 26
 Floating Point Arithmetic Operations –
Addition/Subtraction
0.0234  Not normalized
• Steps 0.234×10-1 -- Normalized
• Check for 0’s in the given decimal and normalize it. (If the MSB bit is Non-zero –> Normalized)

• Choose the number with smaller Exponent.

• Align Mantissas (Shift its Mantissa right to number of positions – difference
between exponents)
• Set the exponent of result = larger exponent
• Add or Subtract Mantissas and determine the sign
• Normalize the result, if necessary
For addition and subtraction, it is necessary to ensure that both operand
exponents have the same value
This may involves shifting the radix point of one of the operand to achieve
alignment
 Floating Point Arithmetic Operations
Some problems that may arise during arithmetic operations are:
• Exponent overflow: A positive exponent exceeds the maximum possible
exponent value and this may leads to + or - in some systems
• Exponent underflow: A negative exponent is less than the minimum possible
exponent value (eg. 2-200), the number is too small to be represented and maybe
reported as 0
• Significand underflow: In the process of aligning significands, the smaller number
may have a significand which is too small to be represented
• Significand overflow: The addition of two significands of the same sign may
result in a carry out from the most significant bit
 Floating Point Arithmetic Operations –
Addition/Subtraction - Algorithm
Algorithm:
Floating Point Arithmetic Operations –
Addition - Example Normalize

No 2’s Complement
Direct Addition

= 273.125
Floating Point Arithmetic Operations –
Addition - Example
Floating Point Arithmetic Operations –
Subtraction - Example Normalize

No 2’s Complement
Direct Subtraction

1.01110110 × 25= 46.75

Floating Point Arithmetic Operations –
Subtraction - Example
 Floating Point Arithmetic Operations –
Addition – in IEEE format
68.310 + 12.210
68.310 = 100 0100.01001 1001 ... 6810 = 100 01002
= 1.00 0100 01001 1001 ... x 26 0.310 Þ 0.3 x 2  0.6
0.6 x 2  1.2
0.2 x 2  0.4
0.4 x 2  0.8
0.8 x 2  1.6
0.6 x 2  1.2

...
only 24 bits can be stored

1 0 0 0 1 0 0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
32-bit register
more than half
+1 of the LSB

stored [23 bits]

+ 6 + 127 = 13310 1 · 0 0 0 1 0 0 0 1 0 0 1 ...
0 1 0 0 0 0 1 0 1 0 0 0 1 0 0 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0
sign biased exponent significand

167
 Floating Point Arithmetic Operations –
Addition – in IEEE format
12.210 = 1100.0011 0011 ... 1210 = 11002
68.310 + 12.210 = 1.100 0011 0011 ... x 23 0.210 Þ 0.2 x 2  0.4
0.4 x 2  0.8
0.8 x 2  1.6
0.6 x 2  1.2
0.2 x 2  0.4

...
only 24 bits can be stored

1 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

less than half of

the LSB

stored [23 bits]

+ 3 + 127 = 13010 1 · 1 0 0 0 0 1 1 0 0 1 1 ...
0 1 0 0 0 0 0 1 0 1 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
sign biased exponent significand
 Floating Point Arithmetic Operations –
Addition – in IEEE format
Align the smaller number with the larger number by
68.310 + 12.210
shifting it to the right [increasing the exponent]
1000 0010 1.1000011001100110011  1000 0101 0.0011000011001100110011
exponent mantissa exponent mantissa

ADD the mantissa

1.00010001001100110011010
+ 0.00110000110011001100110011
1.01000010000000000000000011
less than half
of the LSB

Store the result in IEEE single-precision format

0 1 0 0 0 0 1 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
sign biased exponent significand
Flowchart- Addition/Subtraction
Z=X+Y and Z=X-Y
 1.01101 x 27 1.01101 x 27
X – Y = ZSUBTRACT X = 1.01101 x 27
+ 0.110101 x 27 – 0.110101 x 27
Y = 1.10101 x 26
10.001111 x 27 0.100101 x 27

Change sign of Y

X = 1.01101 x 27
X+Y=Z 0.100101 x 27
Y = 0.110101 x 27
no no Expoenents yes Add signed Results yes
ADD X = 0? Y = 0? Round result
Equal? significands normalized?

yes yes no no

Increment smaller yes Significand Shift significand RETURN

ZY ZX Z0
exponent = 0? left

no 1.0001111 x 28
1.00101 x 26
RETURN Shift significand RETURN Significand no Decrement
right overflow? exponent

10.001111 x 27yes 1.00101 x 26

Significand Shift significand no Exponent
Y = 0.110101 x 2no7 = 0? right underflow?

yes

Put other number

1.0001111 x 28 Increment
Report underflow
in Z RETURN exponent

RETURN yes Exponent no RETURN

Report overflow
overflow?
 Floating Point Arithmetic Operations –
Multiplication - Algorithm

Z= X × Y
Floating Point Arithmetic Operations –
Multiplication - Example
Floating Point Arithmetic Operations –
Division - Algorithm

Z= X / Y
Floating Point Arithmetic Operations –
Division - Example
Practice Questions
• Perform FP Addition, Subtraction, Multiplication and Division fore the
following inputs
• 123 and 25
• 154 and 10
Representation of Non Numeric Data
(Character Codes)
 Non-Numeric Data Representation

• Non-Numeric data use specific form of characters to represent.

• To save the text into bit sequence and decipher the bit sequence
into text, there must be a standard character set-bit mapping
table.
• Different Representation
• ASCII - American Standard Code for Information Interchange
• Unicode
• EBCDIC character code - Extended Binary Coded Decimal Interchange
Code
 Non-Numeric Data Representation

• ASCII - American Standard Code for Information Interchange.

• Unicode - Under different platform, different software and different
language, able to exchange every character over the world
Character set should be large enough. Each character has only one
meaning.
• EBCDIC character code - It is a character-encoding format used
by IBM mainframes. It is an 8-bit code and is NOT Compatible to
ASCII. It had been designed primarily for ease of use of punched
cards.
 Character Representation ASCII

• ASCII (American Standard Code for Information Interchange)

Code.
• It uses 7 bits to represent one character.
• Use number 0 to 127 represent English character set.
• In order to enhance character set, ASCII character set use 8 bits to
represent one character.
• So it can represent some non-English character, common symbols
and mathematical symbols.
 MSB (3 bits)
Character Representation ASCII
LSB 0 1 2 3 4 5 6 7
(4 bits) 0 NUL DLE SP 0 @ P ‘ P
1 SOH DC1 ! 1 A Q a q • A - 1000001 - 64+1=65
2 STX DC2 “ 2 B R b r
3 ETX DC3 # 3 C S c s
• Here MSB - 100 and
4 EOT DC4 $ 4 D T d t • LSB – 0001
5 ENQ NAK % 5 E U e u
6 ACK SYN & 6 F V f v
7 BEL ETB ‘ 7 G W g w
8 BS CAN ( 8 H X h x
9 HT EM ) 9 I Y I y
A LF SUB * : J Z j z
B VT ESC + ; K [ k {
C FF FS , < L \ l |
D CR GS - = M ] m }
E SO RS . > N m n ~
F SI US / ? O n o DEL
Control Character Representation (ASCII)
NUL Null DC1 Device Control 1
SOH Start of Heading (CC) DC2 Device Control 2
STX Start of Text (CC) DC3 Device Control 3
ETX End of Text (CC) DC4 Device Control 4
EOT End of Transmission (CC) NAK Negative Acknowledge (CC)
ENQ Enquiry (CC) SYN Synchronous Idle (CC)
ACK Acknowledge (CC) ETB End of Transmission Block (CC)
BEL Bell CAN Cancel
BS Backspace (FE) EM End of Medium
HT Horizontal Tab. (FE) SUB Substitute
LF Line Feed (FE) ESC Escape
VT Vertical Tab. (FE) FS File Separator (IS)
FF Form Feed (FE) GS Group Separator (IS)
CR Carriage Return (FE) RS Record Separator (IS)
SO Shift Out US Unit Separator (IS)
SI Shift In DEL Delete
DLE Data Link Escape (CC)

(CC) Communication Control

(FE) Format Effector
(IS) Information Separator
 Extended Binary Coded Decimal Interchange Code
• It had been designed primarily for ease of use of punched cards.
• It was used on IBM mainframes and midrange systems (AS/400).
• Another strength of EBCDIC was the availability of wider range of control characters for
ASCII.
• The character coding in this set is based on binary coded decimal.
• The contiguous characters in the alphanumeric range are represented in blocks of 10
starting from 0000 binary to 1001 binary.
• Other characters fill in the rest of the range.
• There are four main blocks in the EBCDIC code:

There are several different variants of EBCDIC. Most of these differ in the punctuation coding.
EBCDIC character code in hexadecimal indices
EBCDIC control character representation
 Practice Problems
• Represent the following numbers in a) Sign and Magnitude b) 1s
complement and c) 2’s complement representation
i) +24 ii) - 24 iii) -8 iv) +13 v) -37
• 2. Multiply the following numbers using Booth algorithm.
i) 11* 13
ii) 11* -13
iii) -11* - 13
• 3. Show the step by step multiplication process using AC , QR and Q-1
registers for the below number
i) -15* 5
 Practice Problems
• 4. Multiply the following numbers using modified booth algorithm / Bit pair recoding( Try
one problem using the registers(A, Q , Q-1 ) method)
i) 23 * 10
ii) 14 * -2
iii) -12* 8
• 5. Divide the following numbers using restoring division algorithm
i) 14/7
ii) 28/11
• 6. Divide the following numbers using non- restoring division algorithm
i) 18/9
ii) 27/4
• 7. Represent the following number in IEEE- 754 format
i) 12312.13
ii) -14.5