Ls 421

LOGOSOL
Four-Axis DC Servo
Controller With Built-In
Power Amplifiers
LS-421
Technical Reference
Document No 710420103 / Rev. 1.2 - April, 1999

T h e in fo rm a tio n in th is d a ta b o o k h a s b e e n c a re fu lly c h e c k e d a n d is b e lie v e d to b e re lia b le ,
h o w e v e r, n o re s p o n s ib ility c a n b e a s s u m e d fo r in a c c u ra c ie s . A ll in fo rm a tio n in th is m a n u a l is
s u b je c t to c h a n g e w ith o u t n o tic e a n d d o e s n o t re p re s e n t a c o m m itm e n t o n th e p a rt o f th e v e n d o r.
F le x W a re  is tra d e m a rk o f L o g o s o l, In c .
T ra d e m a rk s a re u s e d th ro u g h o u t th e m a n u a l o n ly a s re fe re n c e to e x is tin g c o m m o n p ro d u c ts . If a
re g is te re d tra d e m a rk is u s e d w ith o u t b e in g in d ic a te d a s s u c h , th is d o e s n o t im p ly th a t th e n a m e is
fre e .
© C o p yrig h t L o g o s o l, In c . 1 9 9 1 - 1 9 9 9 .
A ll rig h ts re s e rv e d . N o p a rt o f th is p u b lic a tio n m a y b e re p ro d u c e d , p h o to c o p ie d , s to re d o n

re trie v a l s ys te m , o r tra n s m itte d w ith o u t th e e x p re s s w ritte n c o n s e n t o f th e p u b lis h e r.
L S -4 2 1 T e c h n ic a l R e fe re n c e
D o c u m e n t N o 7 1 0 4 2 0 1 0 3 / R e v . 1 .2 - A p ril, 1 9 9 9
L o g o s o l, In c .
1 1 5 5 T a s m a n D riv e , S u n n yv a le , C A 9 4 0 8 9
T e l: (4 0 8 ) 7 4 4 -0 9 7 4
F a x : (4 0 8 ) 7 4 4 -0 9 7 7
H ttp ://w w w .lo g o s o lin c .c o m
LS-421 Technical Reference
P reface
T h a n k yo u fo r c h o o s in g L o g o s o l M o tio n C o n tro lle r fo r a d d re s s in g yo u r a u to m a tio n n e e d s . L o g o s o l
is c o m m itte d to p ro v id in g p ro d u c ts w ith e x c e p tio n a l v a lu e a n d fu n c tio n a lity.
L S -4 2 1 M o tio n C o n tro l B o a rd is a n in te g ra te d p ro d u c t, w h ic h c o m b in e s th re e m a jo r fu n c tio n s in

o n e b o a rd : M o tio n C o n tro l, I/O C o n tro l a n d P o w e r A m p lific a tio n . T h is in n o v a tiv e a p p ro a c h
s ig n ific a n tly re d u c e s th e o v e ra ll d im e n s io n s o f th e c o n tro lle r, e lim in a te s a la rg e n u m b e r o f
re d u n d a n t c o m p o n e n ts a n d o ffe rs a v a rie ty o f c u s to m o p tio n s .
W e s in c e re ly h o p e th is m a n u a l w ill h e lp yo u q u ic k ly a n d e ffic ie n tly in te g ra te th e b o a rd in to yo u r

s ys te m .
Logosol, Inc. Doc. # 710420103
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Table of Contents
I. HOW TO USE THIS MANUAL......................................................................................................... 5
II. INSTALLATION.............................................................................................................................. 6
❑ Requirements .............................................................................................................................. 6
❑ Preparing the Board.................................................................................................................... 7
In s p e c tio n ......................................................................................................................... 7
J u m p e r S e ttin g s ................................................................................................................ 7
In te rfa c e C o n n e c to rs ....................................................................................................... 1 0
L E D In d ic a to rs ................................................................................................................ 1 1
❑ Installation Procedure .............................................................................................................. 11
III. HARDWARE REFERENCE.......................................................................................................... 13

❑ Architecture Overview .............................................................................................................. 13
C o n tro lle r A rc h ite c tu re .................................................................................................... 1 4
M e m o ry M a p ................................................................................................................... 1 7
❑ Base Module.............................................................................................................................. 18
B o a rd L a yo u t ................................................................................................................... 1 8
M o tio n P ro c e s s o r ............................................................................................................ 1 9
B u ilt-in P o w e r A m p lifie rs ................................................................................................. 2 2
D ig ita l O u tp u ts a n d O u tb o u n d P o w e r .............................................................................. 2 4
S e rv o C o n tro l a n d D ia g n o s tic s C irc u it ............................................................................. 2 6
In te rru p t R e q u e s t L in e s ................................................................................................... 3 2
B o a rd Id e n tifie r................................................................................................................ 3 2
In te rfa c e C o n n e c to rs ....................................................................................................... 3 4
❑ Input Board ............................................................................................................................... 37
D ig ita l O p to is o la te d In p u ts .............................................................................................. 3 9
In c re m e n ta l E n c o d e r In te rfa c e ........................................................................................ 4 3
M u lti-tu rn A b s o lu te E n c o d e r R e c e iv e r ............................................................................. 4 5
❑ Interface Wiring......................................................................................................................... 48
❑ External Power Supply ............................................................................................................. 49
IV. BASIC CONTROL PROCEDURES ............................................................................................. 50

B o a rd Id e n tific a tio n ......................................................................................................... 5 1
B o a rd In itia liz a tio n a n d P o w e r O n ................................................................................... 5 2
E n a b le A m p lifie rs ............................................................................................................ 5 3
D is a b le A m p lifie rs ........................................................................................................... 5 4
D ia g n o s tic s ..................................................................................................................... 5 5
V. APPENDIX A................................................................................................................................ 56
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❑ Technical Specification ............................................................................................................ 56

B a s ic F e a tu re s ................................................................................................................ 5 6
M o tio n C o n tro l................................................................................................................. 5 7
D ig ita l I/O lin e s ................................................................................................................ 5 7
P o w e r R e q u ire m e n ts ....................................................................................................... 5 7
VI. APPENDIX B: MEMORY MAP .................................................................................................... 58
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I. How To Use This Manual
T h is m a n u a l d e s c rib e s L S -4 2 1 m o tio n c o n tro l b o a rd . It is in te n d e d to s e rv e a s a h a rd w a re

re fe re n c e fo r s ys te m in te g ra to rs . T h is p u b lic a tio n in c lu d e s in fo rm a tio n a b o u t th e fo llo w in g to p ic s :
• In s ta lla tio n . T h is c h a p te r p re s e n ts th e re q u ire m e n ts to th e h o s t s ys te m a n d a s te p b y s te p

p ro c e d u re h o w to in s ta ll th e b o a rd in to yo u r s ys te m . B o a rd s e tu p is s u e s , in c lu d in g ju m p e r
s p e c ific a tio n a n d e x te rn a l p o w e r c o n n e c to r p in o u t a re c o v e re d .
• H a rd w a re R e fe re n c e . It d e s c rib e s th e c o n tro lle r a rc h ite c tu re a n d h a rd w a re fe a tu re s , in c lu d in g

s e rv o c h a n n e ls , p o w e r a m p lifie rs , d ig ita l in p u ts a n d o u tp u ts , e n c o d e r in te rfa c e , e tc . T h e
fu n c tio n in g o f h a rd w a re p ro te c tio n a n d d ia g n o s tic s c irc u its is d is c u s s e d in d e ta il. T h is c h a p te r
in c lu d e s a ls o in te rfa c e c o n n e c to r s p e c ific a tio n a n d p o w e r re q u ire m e n ts fo r e x te rn a l p o w e r
s o u rc e s .
• B a s ic C o n tro l P ro c e d u re s . T h is p a rt p re s e n ts typ ic a l p ro c e d u re s fo r in itia liz a tio n , d ia g n o s tic s

a n d c o n tro l a s flo w c h a rts .
• A p p e n d ix e s p ro v id e a d d itio n a l re fe re n c e in fo rm a tio n . T h e te c h n ic a l s p e c ific a tio n o f th e

c o n tro lle r is g iv e n in A p p e n d ix A . T h e m e m o ry m a p is g iv e n in A p p e n d ix B .
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II. INSTALLATION
L o g o s o l M o tio n C o n tro l B o a rd L S -4 2 1 is a fle x ib le a u to m a tio n d e v ic e s u ita b le fo r m a n y d iffe re n t

typ e s o f a p p lic a tio n s . F o r a s p e c ific a p p lic a tio n th e b o a rd m u s t b e c o n fig u re d u s in g p a rtic u la r
ju m p e r a n d in te rfa c e c o n n e c to r o p tio n s . In a d d itio n to th e h a rd w a re s e ttin g s , s o m e o f th e fe a tu re s
o f th e b o a rd a re s o ftw a re c o n fig u ra b le (e .g . m o to r c u rre n t lim its ). T h is c h a p te r e x p la in s th e
c o n fig u ra tio n p ro c e s s a n d s ta te s th e re q u ire m e n ts to th e h o s t s ys te m , w h e re th e p ro d u c t w ill b e
in s ta lle d .
Disclaimer
L o g o s o l a s s u m e s n o re s p o n s ib ility fo r d a m a g e s o r in ju rie s in c u rre d to y o u r
s y s te m o r to th e o p e ra tin g p e rs o n n e l, d u e to im p ro p e r in s ta lla tio n . A s w ith a n y
p ro d u c t d e s ig n e d fo r in d u s tria l a p p lic a tio n s , a p ro fe s s io n a l in E le c tro n ic s
E n g in e e rin g s h o u ld in s ta ll th e b o a rd .
T h e h a rd w a re in s ta lla tio n m a y re q u ire a c e rta in le v e l o f k n o w le d g e o n th e s e rv ic e a n d

m a in te n a n c e p ro c e d u re s fo r th e c o m p u te r s ys te m w h e re th e b o a rd w ill b e in s ta lle d , w h ic h w ill b e
fu rth e r re fe rre d to a s th e h o s t s y s te m . C o n s u lt th e s e rv ic e d o c u m e n ta tio n o f yo u r h o s t b e fo re
b e g in n in g to in s ta ll th e b o a rd .
If yo u a re n o t fa m ilia r w ith in s ta lla tio n o f e le c tro n ic c o m p o n e n ts s e e k h e lp fro m a c o m p u te r

s e rv ic e e n g in e e r o r c o n ta c t L o g o s o l fo r in s ta lla tio n s u p p o rt.
❑ R EQUIREMENTS
L o g o s o l L S -4 2 1 is a p lu g -in b o a rd fo r a s ta n d a rd IS A b u s s ys te m . T o o p e ra te L S -4 2 1 , th e h o s t
s ys te m m u s t m e e t th e fo llo w in g re q u ire m e n ts :
• IS A b u s s ys te m
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• O n e v a c a n t 8 -b it o r 1 6 -b it b u s s lo t. L S -4 2 1 its e lf o c c u p ie s s p a c e fo r tw o s in g le -s iz e P C -
b o a rd s . O n ly o n e b u s s lo t c o n n e c to r is u s e d .
• A m in im u m o f 5 1 2 K b yte s c o n v e n tio n a l R A M in s ta lle d
• A fre e I/O a d d re s s ra n g e x 2 8 0 h ÷x 2 8 F h o r x 2 A 0 h ÷x 2 A F h , w h e re x m a y b e 0 , 1 , 2 o r 3
• C o m p u te r p o w e r (fro m th e IS A b u s ): + 5 V ± 5 % / 1 A , + 1 2 V ± 5 % /1 A
• E x te rn a l o p e ra tin g p o w e r: 2 4 V D C ± 2 0 %
• E x te rn a l m o to r p o w e r in th e ra n g e : 2 4 ÷8 0 V D C
• A c o o lin g fa n w h e n d riv in g h ig h p o w e r m o to rs (h a v in g c o n s u m p tio n g re a te r th a n 3 A @ 4 8 V )
Caution
M o to r p o w e r s u p p ly m u s t b e e le c tric a lly is o la te d fro m c o m p u te r g ro u n d a n d
fro m o p e ra tin g p o w e r s u p p ly (flo a tin g p o w e r s u p p ly ).
❑ P REPARING THE B OARD
Inspection
In s p e c t th e b o a rd fo r a n y s ig n s o f d a m a g e . L S -4 2 1 w a s th o ro u g h ly te s te d a n d b u rn e d -in ,
in c lu d in g te s ts o n re a l m o to rs a n d c a re fu lly p a c k e d b e fo re s h ip m e n t. Y e t, th e re a lw a ys e x is ts a
s lig h t p o s s ib ility o f s h ip p in g d a m a g e . In c a s e th e re is a n y n o tic e a b le im p e rfe c tio n , p le a s e re p o rt
th is to L o g o s o l im m e d ia te ly.
Jumper Settings
T h e re a re fo u r ju m p e r b lo c k s o n th e b o a rd (J 1 – J 4 ) fo r th e c o n fig u ra tio n o f th e fo llo w in g
h a rd w a re fe a tu re s :
• B a s e I/O A d d re s s (J 1 )
• In te rru p t R e q u e s t L in e (J 2 )
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• C u rre n t L im it M o d e (J 3 )
• S e rv o O ff M o d e (J 4 )
T a k e a m o m e n t to lo c a te th e ju m p e rs o n th e b o a rd a n d g e t fa m ilia r w ith th e ir s e ttin g , d e s c rib e d

u n d e r th e fo llo w in g to p ic s .
■ BASE I/O ADDRESS

E ig h t b a s e a d d re s s e s a re a v a ila b le , d e p e n d in g o n J 1 s e ttin g – 0 x 2 8 0 , 0 x 1 2 8 0 , 0 x 2 2 8 0 , 0 x 3 2 8 0 ,
0 x 2 A 0 , 0 x 1 2 A 0 , 0 x 2 2 A 0 , 0 x 3 2 A 0 . T h u s , u p to 8 b o a rd s m a y b e in s ta lle d in o n e h o s t c o m p u te r
(n o t m o re th a n 4 if IR Q lin e s is u s e d ).
0 x0 2 8 0 0 x0 2 A 0 JUMPER OPEN
0 x1 2 8 0 0 x1 2 A 0 JUMPER CLOSED
0 x2 2 8 0 0 x2 2 A 0
0 x3 2 8 0 0 x3 2 A 0
9 72 91 0 6
Figure 1: Base I/O Address (J1 jumper block)
■ INTERRUPT REQUEST LINE

T h e u s e o f a h a rd w a re in te rru p t is o p tio n a l fo r th e fu n c tio n in g o f th e L S -4 2 1 m o tio n c o n tro lle r.
C o n s u lt yo u r s o ftw a re d o c u m e n ta tio n to fin d o u t if yo u h o s t s o ftw a re re q u ire s in te rru p t s u p p o rt.
T h e re a re fo u r h a rd w a re in te rru p t lin e s to c h o o s e fro m : 7 , 1 0 , 1 2 a n d 1 5 . E a c h L S -4 2 1 b o a rd

s h o u ld h a v e a u n iq u e IR Q lin e . T h is in te rru p t s h o u ld n o t b e s h a re d w ith o th e r d e v ic e h o s te d in
yo u r s ys te m .
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IR Q 7 JUMPER OPEN
IR Q 1 0 JUMPER CLOSED
IR Q 1 2
IR Q 1 5
9 72 91 0 7
Figure 2: Interrupt line (J2 jumper block)
■ CURRENT LIMIT MODE

M o to r c u rre n t o v e rlo a d p ro te c tio n h a s tw o m o d e s o f o p e ra tio n d e p e n d in g o n J 3 ju m p e r s e ttin g s :
s h u td o w n o r c u rre n t lim ita tio n . W ith J 3 ju m p e r in s ta lle d , th e p o w e r a m p lifie rs w ill b e
a u to m a tic a lly s h u t d o w n . If J 3 is le ft o p e n , th e a m p lifie rs w ill re m a in e n a b le d , re g a rd le s s o f th e
o v e rlo a d , w ith th e o u tp u t m o to r c u rre n t lim ite d to th e s p e c ifie d v a lu e (c u rre n t lim ita tio n m o d e ).
S e e a ls o “B u ilt-In P o w e r A m p lifie rs ” o n p a g e 2 2 .
C U R R E N T L IM IT JUMPER OPEN
SHUT DOWN JUMPER CLOSED
9 72 91 0 8
Figure 3: Current Limit Mode (J3 jumper)
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■ SERVO OFF MODE

D e p e n d in g o n J 4 ju m p e r s e ttin g , th e m o to rs w in d in g s a re s h o rte n (J 4 c lo s e d ), o r le ft o p e n (J 4
o p e n ), w h e n a m p lifie rs a re d is a b le d d u e to a h a rd w a re e x c e p tio n . A s h o rt c irc u it o n th e m o to r
w in d in g s p ro v id e s fa s te r s to p p in g c o m p a re d to o p e n w in d in g s b u t s to p p in g w ith o p e n w in d in g s is
s m o o th e r. S e e a ls o “B u ilt-In P o w e r A m p lifie rs ” o n p a g e 2 2 .
S M OOT H STO P JUMPER OPEN
FA S T S T O P JUMPER CLOSED
9 72 91 0 9
Figure 4: Servo Off Mode (J4 jumper)
Interface Connectors
■ CN3 CONNECTOR (EXTERNAL POWER)

T h e C N 3 c o n n e c to r lo c a te d o n th e b o tto m s id e o f th e b o a rd (in -lin e w ith th e IS A b u s c o n n e c to r) is
th e e n try p o in t fo r th e e x te rn a l m o to r a n d o p e ra tin g p o w e r s u p p lie s . T h e te rm in a ls o f th e
e m e rg e n c y s to p in p u t a re a ls o lo c a te d th e re . A s c h e m a tic d ra w in g o f th e lo c a tio n a n d p in o u t o f
th e C N 3 c o n n e c to r is s h o w n in F ig u re 1 2 o n p a g e 3 5 .
■ FRONT PANEL CONNECTOR

T h e fro n t p a n e l c o n n e c to r p ro v id e s th e in te rfa c e to th e c o n tro lle d e q u ip m e n t. T h e s ta n d a rd fro n t-
p a n e l c o n n e c to r fo r L S -4 2 1 m o tio n c o n tro lle r is a 5 6 -p in E L C O c o n n e c to r, s h o w n in F ig u re 2 3 o n
p a g e 4 8 . C u s to m iz e d v e rs io n s o f L S -4 2 1 m a y b e e q u ip p e d w ith a d iffe re n t fro n t-p a n e l in te rfa c e
c o n n e c to r. C h e c k th e d o c u m e n ta tio n th a t c o m e s w ith yo u r s ys te m to v e rify th e typ e o f c o n n e c to r
th a t is in s ta lle d w ith yo u r s ys te m .
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LED Indicators
T h e L S -4 2 1 b o a rd is e q u ip p e d w ith tw o L E D in d ic a to rs (L 1 a n d L 2 ) fo r a fa s t a n d e a s y v is u a l
c h e c k o f th e c o n tro lle r s ta tu s . In o rd e r to c lo s e th e s e rv o lo o p a n d e n a b le th e p o w e r a m p lifie rs
b o th L E D s m u s t b e O N . T h e lo c a tio n o f L 1 a n d L 2 is s h o w n in F ig u re 7 o n p a g e 1 9 .
T h e L 1 in d ic a to r is O N if th e a ll o f th e fo llo w in g c o n d itio n s a re m e t:
• C o m p u te r p o w e r is p re s e n t
• T h e c o n tro lle r is in itia liz e d
• M o to r p o w e r s u p p ly is p re s e n t
• T h e re is n o t a s h o rt c irc u it b e tw e e n a m o to r te rm in a l a n d th e c o m p u te r g ro u n d o r b e tw e e n a
m o to r te rm in a l a n d th e g ro u n d o f th e o p e ra tin g p o w e r.
T h e L 2 in d ic a to r is O N if a ll o f th e fo llo w in g c o n d itio n s a re m e t:
• O p e ra tin g p o w e r is p re s e n t
• N o n e o f th e d ig ita l o u tp u ts is o v e rlo a d e d .
❑ I NSTALLATION P ROCEDURE
• P o w e r O ff. D is c o n n e c t th e p o w e r to th e h o s t s ys te m . N e v e r to u c h e le c tro n ic c irc u its o r w irin g
w h ile p o w e r is o n . T h is p ro te c ts yo u a n d yo u r h a rd w a re .
• S ta tic E le c tric ity P re c a u tio n s . U s e a p ro p e rly g ro u n d e d a n d s ta tic e le c tric ity s a fe w o rk b e n c h

w h e n p e rfo rm in g th e in s ta lla tio n . T o u c h e le c tric a l g ro u n d to e v e n tu a lly d is c h a rg e a ll s ta tic
e le c tric ity a c c u m u la te d in yo u r b o d y.
• B o a rd S e tu p . S e le c t th e I/O a d d re s s w ith J 1 ju m p e r b lo c k . O p tio n a lly s e le c t IR Q lin e w ith J 2

ju m p e r b lo c k . S e tu p th e S e rv o o ff M o d e (J 4 ) a n d C u rre n t L im it M o d e (J 3 ). S e e ju m p e r la yo u ts
in s e c tio n “J u m p e r S e ttin g s ” o n p a g e 7 , e a rlie r in th is c h a p te r.
• E x te rn a l P o w e r. P lu g in th e m a in p o w e r c o n n e c to r C N 3 . C h e c k p o w e r s u p p ly – m o to r p o w e r
(2 4 ÷8 0 V ) a n d o p e ra tin g p o w e r (2 4 V ). M a k e s u re th e e m e rg e n c y s to p c o n ta c t b e tw e e n p in s 7
& 8 o f C N 3 c o n n e c to r is c lo s e d .
• In s e rt in S lo t. P lu g in L S -4 2 1 in to a fre e IS A -b u s s lo t. A n y s lo t m a y b e u s e d .
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• S c re w th e B o a rd . F ix L S -4 2 1 w ith a s c re w to th e c h a s s is . N e v e r s w itc h o n th e p o w e r b e fo re
L S -4 2 1 is fix e d to th e c h a s s is . T h e b o a rd m ig h t h a v e tilte d w ith in th e s lo t a n d s h o rt-c irc u ite d
th e b u s w ith u n p re d ic ta b le re s u lts .
• T e s t th e in s ta lla tio n . S w itc h o n yo u r s ys te m a n d c h e c k w h e th e r o r n o t th e b o a rd in te rfe re s

w ith th e n o rm a l c o m p u te r o p e ra tio n . S w itc h o n th e L S -4 2 1 e x te rn a l p o w e r s u p p ly. R u n th e
a p p lic a tio n s o ftw a re .
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III. Hardware Reference
T h is c h a p te r e x p la in s in d e ta il th e h a rd w a re fe a tu re s a v a ila b le in L S -4 2 1 m o tio n c o n tro lle r. T h e

s u b je c ts in it a re o rg a n iz e d to re fle c t th e o v e ra ll s tru c tu re o f th e c o n tro lle r, w h ic h is a n a s s e m b ly
o f th re e m o d u le s (B a s e M o d u le , In p u t B o a rd a n d In te rfa c e W irin g ):
• A rc h ite c tu re O v e rv ie w is a b rie f d e s c rip tio n o f th e c o n tro lle r s tru c tu re a n d fe a tu re s .
• B a s e M o d u le d e s c rib e s th e h a rd w a re c o m p o n e n ts a n d fe a tu re s s u p p o rte d b y th e B a s e
M o d u le , a m o n g w h ic h a re th e M o tio n P ro c e s s o r, th e D ig ita l O u tp u ts a n d th e S e rv o C o n tro l
a n d D ia g n o s tic s c irc u it.
• In p u t B o a rd e x p la in s D ig ita l In p u ts , In c re m e n ta l E n c o d e r In te rfa c e a n d A b s o lu te E n c o d e r
In te rfa c e , lo c a te d o n th a t m o d u le
• In te rfa c e W irin g g iv e s th e s c h e m a tic s o f th e w irin g , w h ic h c o n n e c ts th e B a s e M o d u le , th e

In p u t B o a rd a n d th e fro n t-p a n e l in te rfa c e c o n n e c to r.
• E x te rn a l P o w e r S u p p ly s ta te s th e re q u ire m e n ts to th e e x te rn a l p o w e r s o u rc e s a n d o ffe rs a n
e x a m p le s c h e m e fo r a typ ic a l e x te rn a l p o w e r s u p p ly
❑ ARCHITECTURE O VERVIEW
L S -4 2 1 is a 4 -a x is m u ltip u rp o s e s e rv o c o n tro lle r w ith b u ilt-in p o w e r a m p lifie rs fo r D C m o to rs w ith
q u a d ra tu re in c re m e n ta l e n c o d e rs . It is d e s ig n e d to m e e t th e re q u ire m e n ts fo r h ig h p re c is io n a n d
h ig h re lia b ility e s s e n tia l to in d u s tria l a p p lic a tio n s . T h e b o a rd is d e s ig n e d a s a p lu g -in b o a rd fo r
P C /A T c o m p a tib le c o m p u te rs w ith IS A b u s . T h e u n iq u e F le x W a re ™ d e s ig n a llo w s fle x ib le w irin g
a n d p in a s s ig n m e n t to m e e t s p e c ific re q u ire m e n ts a n d to a c h ie v e c o m p a tib ility w ith th e e x is tin g
h a rd w a re . T o a tta in h ig h e r re lia b ility o f o p e ra tio n in in d u s tria l e n v iro n m e n ts , a ll in p u ts a n d
o u tp u ts a re o p to is o la te d fro m th e c o m p u te r g ro u n d .
13
T o d e liv e r u ltim a te p e rfo rm a n c e a n d a d a p ta b ility to d iffe re n t a p p lic a tio n s L S -4 2 1 is d e s ig n e d

u s in g th e la te s t a c h ie v e m e n ts in IC te c h n o lo g y. T h e o n b o a rd 2 5 M H z P M D M C 1 4 0 1 A D S P
p ro c e s s o r g u a ra n tie s p re c is e a n d s m o o th m o tio n c o n tro l, a n d u s e s s p a rin g ly th e h o s t c o m p u te r
re s o u rc e s . In th is m a n u a l, th e M C 1 4 0 1 A c h ip s e t is re fe rre d to a s th e M o tio n P ro c e s s o r (M P ).
A ll in p u t, o u tp u t a n d c o n tro l s ig n a ls a re p ro c e s s e d b y a n In -S ys te m P ro g ra m m a b le (IS P ) c h ip s e t
to a llo w fa s t a n d e a s y u s e r-d e fin e d c u s to m iz a tio n s . T h is a p p ro a c h a llo w s e a s y fa c to ry
c u s to m iz a tio n s o f th e c o n tro lle r in p u t a n d o u tp u t a s s ig n m e n ts .
L S -4 2 1 c o n tro lle r is e q u ip p e d w ith th e fo llo w in g h a rd w a re s a fe ty fe a tu re s :
• E m e rg e n c y s to p in p u t
• O u tp u t o v e rlo a d p ro te c tio n
• A m p lifie r o v e rc u rre n t p ro te c tio n
• M o to r p o w e r u n d e rv o lta g e a n d s h o rt c irc u it p ro te c tio n
• O p e ra tin g p o w e r u n d e rv o lta g e p ro te c tio n
• A d e d ic a te d d ia g n o s tic s c irc u it fo r id e n tific a tio n o f th e c a u s e s fo r h a rd w a re e x c e p tio n s a n d

a c tiv a tio n o f p ro te c tio n c irc u its (e .g . d is a b lin g th e a m p lifie rs ).
Controller Architecture
L S -4 2 1 is a th re e -p ie c e a s s e m b ly, w h ic h c o n s is ts o f th e fo llo w in g c o m p o n e n ts :
• A m o th e r-b o a rd re fe rre d to a s B a s e M o d u le (B M )
• A p lu g -in b o a rd th a t s u p p o rts a ll in p u t c irc u its , re fe rre d to a s In p u t B o a rd (IB )
• A n In te rfa c e W irin g (IW ) to c o n n e c t B M a n d IB to th e L S -4 2 1 fro n t p a n e l c o n n e c to r
B M c a n b e c o m b in e d w ith v a rio u s typ e s o f IB s to c re a te th e o p tim a l s o lu tio n in e a c h m o tio n

c o n tro l a p p lic a tio n . T h e s ta n d a rd IB a v a ila b le fro m L o g o s o l a n d c o m p a tib le w ith th e L S -4 2 1 B M
is L S -4 2 1 -2 1 1 2 .
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BAS E
M O D U LE
IN T E R FA C E
W IR IN G
IN P U T
BOAR D
L S -42 1
9729100
Figure 5: LS-421 main components
W ith re s p e c t to fu n c tio n , L S -4 2 1 p ro v id e s th e fo llo w in g m o d u le s :
• M o tio n P ro c e s s o r , im p le m e n te d a s a D S P m o tio n c o n tro l c h ip s e t (M C 1 4 0 1 A )
• P o w e r A m p lifie rs w ith P W M o u tp u t
• In c re m e n ta l E n c o d e r R e c e iv e r
• A b s o lu te P o s itio n E n c o d e r R e c e iv e r
• D ig ita l In p u ts
• D ig ita l O u tp u ts
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• S e rv o C o n tro l a n d D ia g n o s tic s C irc u it, w h ic h c o n tro ls m o to r a m p lifie rs , d ig ita l o u tp u ts ,

o u tb o u n d p o w e r s o u rc e s a n d th e IR Q lin e to th e h o s t, b a s e d o n h o s t c o m m a n d s o r o n s ig n a ls
c o m in g fro m o n -b o a rd p ro te c tio n c irc u its .
• P o w e r S u p p ly , w h ic h c o n tro ls th re e o u tb o u n d p o w e r lin e s .
T h e in te rc o n n e c tio n s b e tw e e n th e a b o v e fu n c tio n a l m o d u le s a re p re s e n te d in th e fo llo w in g fig u re :
9729105a
Figure 6: LS-421 block diagram
16
Memory Map
L S -4 2 1 is d e s ig n e d a s a s ta n d a rd IS A b u s p e rip h e ra l d e v ic e . T h e h o s t s ys te m c o m m u n ic a te s
w ith th e L S -4 2 1 m o tio n c o n tro lle r u s in g d e s ig n a te d p o rt a d d re s s e s .
T o s a v e I/O s p a c e , L S -4 2 1 u s e s o n ly 1 6 b yte s fro m th e lo w e s t 1 0 2 4 I/O a d d re s s e s ra n g e . T h e

re s t o f L S -4 2 1 re g is te rs o c c u p y th e s p a c e lo c a te d a t o ffs e t 0 x 4 0 0 , 0 x 8 0 0 a n d 0 x C 0 0 . F o r
in s ta n c e , if L S -4 2 1 b a s e a d d re s s is s e t to 0 x 2 8 0 , th e fo llo w in g I/O a d d re s s a re in u s e –
0 x 2 8 0 ÷0 x 2 8 F , 0 x 6 8 0 ÷0 x 6 8 F , 0 x A 8 0 ÷0 x A 8 F , 0 x E 8 0 ÷0 x E 8 F . E ig h t b a s e a d d re s s e s a re a v a ila b le ,
d e p e n d in g o n J 1 s e ttin g – 0 x 2 8 0 , 0 x 1 2 8 0 , 0 x 2 2 8 0 , 0 x 3 2 8 0 , 0 x 2 A 0 , 0 x 1 2 A 0 , 0 x 2 2 A 0 , 0 x 3 2 A 0 . S e e
“J u m p e r S e ttin g s : B a s e I/O A d d re s s ” o n p a g e 8 .
In th is m a n u a l a n d in o th e r re fe re n c e s o u rc e s , re g is te rs a re n a m e d c o n s is te n tly w ith th re e to s ix -
le tte r a b b re v ia tio n s , w h ic h c o rre s p o n d to th e ir fu n c tio n . T h e ta b le b e lo w s h o w s L S -4 2 1 re g is te r
lo c a tio n s re la tiv e to c o n tro lle r b a s e a d d re s s . T h e o ffs e ts a re in h e x a d e c im a l n o ta tio n .
READ WRITE
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
0 MC1401A DATA REGISTER 0 MC1401A DATA REGISTER 0
1 READY 1 MC1401A COMMAND REGISTER 1
2 2 2
3 3 3
4 4 4
5 5 5
6 6 6
7 7 7
8 IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN0 8 8
A AE RST OPT SPS CL3 CL2 CL1 CL0 A AE RST OPT SPS A
B EMG STP MPF OPF EMGL STPL MPFL OPFL B B
C ADI MPI C ENADI C
D OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0 D OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0 D
E E PCS3 PCS2 PCS1 PCS0 APERES E
F F F
400 400 400

401 401 401
402 402 402
403 403 403
404 APE D7 APE D6 APE D5 APE D4 APE D3 APE D2 APE D1 APE D0 404 REQ APE#0 404
407 APE RDY BE OF OS BA PS CE 407 REQ APE#3 407
408 408 CURRENT LIMIT #0 (0x0 - 0xF) 408
40A 40A CURRENT LIMIT #2 (0x0 - 0xF) 40A
40B 40B CURRENT LIMIT #3 (0x0 - 0xF) 40B
40C 40C 40C
40D 40D 40D
40E 40E 40E
40F 40F 40F
807 ID3 = 0 ID2 = 0 ID1 = 0 ID0 = 1 807 807
C07 ID7 = 1 ID6 = 0 ID5 = 1 ID4 = 1 C07 C07
Table 1: LS-421 Memory Map
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❑ B ASE M ODULE
T h is s e c tio n e x p la in s th e m a in p a rts a n d c o n tro ls c o n ta in e d in th e B a s e M o d u le (B M ) o f th e L S -
4 2 1 M o tio n C o n tro l B o a rd . T h e B a s e M o d u le is th e m a in p a rt o f L S -4 2 1 s e rv o c o n tro lle r a n d it
p la ys th e ro le o f a m o th e rb o a rd fo r th e In p u t B o a rd (IB ) m o d u le .
T h e B a s e M o d u le s u p p o rts th e fo llo w in g fu n c tio n a l m o d u le s :
• M o tio n c o n tro l p ro c e s s o r
• P u ls e w id th m o d u la tio n (P W M ) m o to r p o w e r a m p lifie rs
• O p to is o la te d d ig ita l o u tp u ts ,
• S e rv o C o n tro l a n d D ia g n o s tic s (S C D ) lo g ic c irc u it.
Board Layout
T h e b o a rd la yo u t w ith c a ll-o u ts to th o s e p a rts , w h ic h c a n b e m o n ito re d , m a n ip u la te d o r a d ju s te d
in o rd e r to s e tu p o r s e rv ic e th e b o a rd , is p re s e n te d in F ig u re 7 . S o m e o f th e d e s ig n a te d
c o m p o n e n ts a re n o t u s e r-s e rv ic e a b le .
T h e B M b o a rd is e q u ip p e d w ith tw o L E D in d ic a to rs , d e n o te d a s L 1 a n d L 2 , fo r fa s t a n d e a s y
v is u a l c h e c k o f th e c o n tro lle r s ta tu s . In o rd e r to c lo s e th e s e rv o lo o p a n d e n a b le th e p o w e r
a m p lifie rs b o th L E D m u s t b e O N .
T h e L 1 in d ic a to r is O N if th e a ll o f th e fo llo w in g c o n d itio n s a re m e t:
• C o m p u te r p o w e r is p re s e n t
• T h e c o n tro lle r is in itia liz e d
• M o to r p o w e r s u p p ly is p re s e n t
• T h e re is n o t a s h o rt c irc u it b e tw e e n a m o to r te rm in a l a n d th e c o m p u te r g ro u n d o r b e tw e e n a
m o to r te rm in a l a n d th e g ro u n d o f th e o p e ra tin g p o w e r.
T h e L 2 in d ic a to r is O N if a ll o f th e fo llo w in g c o n d itio n s a re m e t:
• O p e ra tin g p o w e r is p re s e n t
• N o n e o f th e d ig ita l o u tp u ts is o v e rlo a d e d .
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J 1 JU M P E R B L O C K
CN1 (I/O A D D R E S S )
(IN T E R F A C E B O A R D )
J 3 JU M P E R
(C U R R E N T L IM IT M O D E )
P0
P1
P2
P3
(C U R R E N T L IM IT A D J U S T )
+ T E R M IN A L M O T O R # 0
J 2 JU M P E R B L O C K
(IN T E R R U P T L IN E )
- T E R M IN A L M O T O R # 0
L 1 (M O T O R P O W E R O K )
C N 2 (O U T P U T S A N D
O UTB OUND POW E R)
L 2 (O P E R AT IN G P O W E R O K )
J 4 JU M P E R
(S E R V O O F F M O D E )
F1 F U SE
(O P E R AT IN G P O W E R )
C N 3 C O N N E C TO R
(E X T. P O W E R & E M . S T O P )
F2 F U SE
(M O T O R P O W E R )
9729101
Figure 7: Base Module Board Layout
Motion Processor
L S -4 2 1 im p le m e n ts th e la te s t D ig ita l S ig n a l P ro c e s s in g (D S P ) te c h n o lo g y fo r m a x im u m
p e rfo rm a n c e a n d p re c is io n . T h e c o n tro lle r is b a s e d o n M C 1 4 0 1 A m o tio n c o n tro l c h ip s e t fro m
P re c is io n M o tio n D e v ic e s , In c (P M D ).
T h e M C 1 4 0 1 A c o n s is ts o f tw o 6 8 -p in P L C C c h ip s :
• P e rip h e ra l in p u t/o u tp u t IC (I/O c h ip )
19
• C o m m a n d P ro c e s s o r IC (C P c h ip )
T h e C P a n d I/O c h ip s fu n c tio n to g e th e r a s o n e in te g ra te d m o tio n p ro c e s s o r (M P ). In te rc o n n e c tio n

b e tw e e n th e tw o c h ip s c o n s is ts o f a d a ta b u s a n d v a rio u s c o n tro l a n d s yn c h ro n iz a tio n s ig n a ls ,
w h ic h a re im p le m e n te d in th e h a rd w a re o f th e B M .
T h e M P e m p lo ys th re e in te rfa c e s to th e L S -4 2 1 b o a rd :
• E n c o d e r in te rfa c e
• A m p lifie r in te rfa c e
• H o s t in te rfa c e
W ith in th e L S -4 2 1 b o a rd a rc h ite c tu re , th e a m p lifie r in te rfa c e is c o n n e c te d to th e B a s e M o d u le ,

th e e n c o d e r in te rfa c e is c o n n e c te d to th e In p u t B o a rd a n d M P H o s t P ro c e s s o r In te rfa c e is
re p re s e n te d in th e M P -C M D a n d M P -D A T re g is te rs (s e e n e x t s e c tio n s ).
M P p e rfo rm s th e fo llo w in g fu n c tio n s :
• R e a d s q u a d ra tu re e n c o d e r s ig n a ls a n d a c c u m u la te s c u rre n t e n c o d e r p o s itio n .
• G e n e ra te s P W M m o to r o u tp u t s ig n a ls , w h ic h a re fe d to th e m o to r p o w e r a m p lifie rs
• C lo s e s th e s e rv o lo o p , b a s e d o n P ro p o rtio n a l-In te g ra l-D e riv a tiv e (P ID ) + V e lo c ity F e e d

F o rw a rd (V ff) + D C b ia s d ig ita l s e rv o filte rin g . O p e n -lo o p m o to r c o n tro l is a ls o fe a s ib le .
• P e rfo rm s h ig h -s p e e d p o s itio n c a p tu re (la tc h in g ), trig g e re d b y e x te rn a l s ig n a ls
• G e n e ra te s th e tra je c to ry p ro file . T h e fo llo w in g typ e s a re s u p p o rte d : S -c u rv e , tra p e z o id a l,

v e lo c ity c o n to u rin g , e le c tro n ic g e a rin g
• C h e c k s m o to r to rq u e lim its
• D e te c ts a n d re c o v e rs fro m e x c e s s iv e m o tio n e rro r, w h e n m o tio n is s to p p e d a b ru p tly b y a

p ro te c tio n c irc u it.
• In te rp re ts h o s t c o m m a n d s s e n t to M P
• S e ts M P h o s t in te rru p ts
• M a in ta in s M P s ta tu s in fo rm a tio n
T h e fo llo w in g fe a tu re s o f th e M P 1 4 0 1 c h ip s e t a re n o t s u p p o rte d in th e L S -4 2 1 m o tio n c o n tro lle r:
• T h e c o n tro l lin e s fo r tra v e l lim it s w itc h e s a re n o t c o n n e c te d . T h u s M P a x is s ta tu s w ill n e v e r

re p o rt tra v e l lim it e x c e e d e d .
20
• In d e x a n d H o m e h ig h -s p e e d p o s itio n c a p tu re lin e s o f th e M P a re c o n n e c te d to g e th e r. T h u s ,
p o s itio n -la tc h in g s ig n a ls fro m L S -4 2 1 (in d e x p u ls e s o r in p u ts d e s ig n a te d fo r p o s itio n c a p tu re )
w ill a c tiv a te b o th In d e x a n d H o m e lin e s . T h e h o s t s o ftw a re m a y c h o o s e w h ic h o f o n e o f th e m
to u s e fo r p o s itio n c a p tu rin g .
■ ENCODER INTERFACE.
Q u a d ra tu re e n c o d e r s ig n a ls a re fe d fro m th e L S -4 2 1 IB to th e I/O c h ip . S e e “In p u t B o a rd :
In c re m e n ta l E n c o d e r In te rfa c e ” o n p a g e 4 3 .
■ AMPLIFIER INTERFACE
T h e m o to r o u tp u t s ig n a ls a re c o n n e c te d to th e P W M c o n tro l c h ip o n B M . S e e “B u ild -In P o w e r
A m p lifie rs o n p a g e 2 2 .
■ HOST INTERFACE
L S -4 2 1 p ro v id e s th e n e c e s s a ry e n v iro n m e n t fo r th e M P c h ip s e t. W ith in th e L S -4 2 1 a rc h ite c tu re
M P is in te rfa c e d v ia a n 8 -b it b i-d ire c tio n a l b u s (M P b u s ) a n d v a rio u s c o n tro l s ig n a ls .
T o th e h o s t s ys te m , L S -4 2 1 p ro v id e s a s im p lifie d a n d tra n s p a re n t c o m m u n ic a tio n in te rfa c e to M P

th ro u g h tw o 8 -b it re g is te rs , w h ic h a re a c c e s s ib le b y th e h o s t s ys te m a t s p e c ific a d d re s s e s :
• M o tio n P ro c e s s o r C o m m a n d R e g is te r (M P -C M D )
• M o tio n P ro c e s s o r D a ta R e g is te r (M P -D A T )
C o m m a n d s a n d d a ta a re tra n s fe rre d fro m th e M P -C M D a n d M P -D A T re g is te rs to th e M P b u s . L S -

4 2 1 is re s p o n s ib le fo r s e ttin g th e c o rre c t le v e ls fo r th e M P c o n tro l lin e s , b a s e d o n th e c u rre n t h o s t
o p e ra tio n (re a d o r w rite to th e re s p e c tiv e re g is te r), th u s s im p lifyin g h o s t to M P c o m m u n ic a tio n
a n d s yn c h ro n iz a tio n . T h e h o s t is s yn c h ro n iz e d w ith M P b y p o lin g th e R E A D Y b it b e fo re w ritin g to
th e M P -C M D o r M P -D A T re g is te rs .
R/W access D7 D6 D5 D4 D3 D2 D1 D0
Base Addr + 0 R/W MP-DAT
Base Addr + 1 Write MP-CMD
Base Addr + 1 Read READY
Table 2: MC1401A register location
M P c o m m a n d s e t is m a d e o f s in g le -b yte c o m m a n d s . D a ta is o rg a n iz e d in 1 6 -b it w o rd s . A ll d a ta is
e n c o d e d “h ig h to lo w ”, i.e . e a c h 1 6 -b it w o rd is e n c o d e d h ig h b yte firs t, lo w b yte s e c o n d , a n d tw o
w o rd d a ta v a lu e s a re e n c o d e d h ig h w o rd firs t, lo w w o rd s e c o n d . C o m m a n d s c o u ld b e o f o n e o f
th e fo llo w in g th re e typ e s :
• D a ta le s s c o m m a n d
21
• W rite c o m m a n d
• R ead com m and
A ll c o m m a n d s a s s o c ia te d w ith d a ta (re a d o r w rite ) h a v e e ith e r 1 o r 2 w o rd s o f d a ta .
T h e h o s t s ys te m m u s t c o m p ly w ith th e fo llo w in g re q u ire m e n ts w h e n s e n d in g a c o m m a n d a n d

re a d in g o r w ritin g d a ta to th e M P :
• T o s e n d a c o m m a n d , th e h o s t m u s t w rite th e c o m m a n d c o d e to th e M P -C M D re g is te r firs t,
th e n w rite o r re a d th e w o rd s o f d a ta to th e M P -D A T re g is te r, if a n y.
• E a c h w rite o p e ra tio n to th e M P -C M D re g is te r m u s t b e p re c e d e d b y p o lin g (re a d in g

re p e a te d ly) th e R E A D Y re g is te r to c o n firm th a t M P is a v a ila b le to re c e iv e th e c o m m a n d .
• E a c h w ritin g / re a d in g o f th e h ig h b yte o f e a c h w o rd to / fro m th e M P -D A T re g is te r m u s t b e

p re c e d e d b y p o lin g th e R E A D Y re g is te r to c o n firm th a t M P is a v a ila b le to re c e iv e d a ta o r th a t
th e d a ta c o n ta in e d in M P -D A T is v a lid fo r re a d in g . T h is p o lin g is n o t n e c e s s a ry b e tw e e n th e
b yte s o f e a c h w o rd (b e fo re re a d in g / w ritin g th e s e c o n d b yte ).
A d d itio n a l in fo rm a tio n a b o u t th e M P c h ip s e t m a y b e fo u n d in th e M C 1 4 0 1 A R e fe re n c e M a n u a l
a v a ila b le fro m P e rfo rm a n c e M o tio n D e v ic e s , In c .
Built-in Power Amplifiers

E a c h L S -4 2 1 s e rv o c h a n n e l is e q u ip p e d w ith a b u ilt-in p o w e r a m p lifie r, c a p a b le o f d e liv e rin g u p
to 1 0 A . T h e a m p lifie rs a re d e s ig n e d a s H -b rid g e s w ith F E T tra n s is to rs (IR F 9 5 4 0 a n d IR C 5 3 0 ). T o
a c h ie v e h ig h n o is e im m u n ity a n d re lia b ility, th e p o w e r c irc u its a re o p to is o la te d fro m th e c o m p u te r
g ro u n d .
A s p e c ia l c irc u it a d ju s ts P W M s ig n a ls , g e n e ra te d b y th e M o tio n P ro c e s s o r, to m e e t th e p o w e r
b rid g e s re q u ire m e n ts .
■ ENABLING AND DISABLING THE POWER AMPLIFIERS

S e rv o C o n tro l a n d D ia g n o s tic s (S C D ) lo g ic a l c irc u it c o n tro ls th e a m p lifie r e n a b le (A E ) s ig n a l. T h e
a m p lifie rs a re im m e d ia te ly s h u t d o w n in th e fo llo w in g c a s e s :
• P o w e r fa ilu re
• E x c e s s m o to r c u rre n t
• D ig ita l o u tp u t o v e rlo a d
• E m e rg e n c y s to p c irc u it is a c tiv a te d .
22
T h e c o d e o f th e e v e n t, w h ic h h a s d is a b le d th e a m p lifie rs is la tc h e d in a s p e c ia l re g is te r a n d is
a v a ila b le to th e h o s t fo r d ia g n o s tic s . T h e fu n c tio n in g o f S C D is e x p la in e d in d e ta il in “S e rv o
C o n tro l a n d D ia g n o s tic s C irc u it” o n p a g e 2 6 .
MOTO R PO WE R
(F LO ATING )
+5V C H A NN E L #0 P OW E R AM P LIFIER
IS O LATE D F RO M
C O MP U TE R G R O U N D
+MO T OR T ER M IN A L
H C P L26 31
+5V
-MO TO R TE R MINA L
H C P L26 31 O V E RC U R R E N T
S EN S E
FR O M MO T IO N PR O C E SS OR
P WM P R OC E S SIN G
C H A NN E L #1 P OW E R AM P LIFIER
P WM
C H A NN E L #2 P OW E R AM P LIFIER MO TO R TE R MIN AL S
C H A NN E L #3 P OW E R AM P LIFIER
A MPL IFIE R E N AB LE
H O ST P R O C ES S O R
S ER V O C O N TR O L
AND
D IA G NO ST IC MO TO R PO WE R FA ILU R E
S TATU S
TO
O P E RATIN G P O WE R /O U T PU T FAILU R E
E MER G EN C Y S TO P IN P UT
S TO P IN PU T S
+12V
CO M PU T ER +5V
POW ER
S U P P LY E N C OD E R P O W E R (+9V )
+12V LM 317
97 2920 0
Figure 8: Build-in Power Amplifiers
■ SERVO-OFF MODE
If th e a m p lifie rs a re d is a b le d w h ile th e m o to rs a re m o v in g , th e y c a n s to p in o n e o f tw o w a ys
d e p e n d in g o n J 4 ju m p e r s e ttin g . W h e n J 4 is in s ta lle d , th e m o to rs w in d in g s a re s h o rte n , w h ile if
J 4 is le ft o p e n , th e m o to rs h a v e th e ir w in d in g s o p e n . A s h o rt c irc u it o n th e m o to r w in d in g s
p ro v id e s fa s te r s to p p in g c o m p a re d to o p e n w in d in g s a n d m a y h e lp p re v e n t e v e n tu a l c o lla p s in g o f
m e c h a n ic a l p a rts u n d e r th e ir o w n w e ig h t. O n th e o th e r h a n d s to p p in g w ith o p e n w in d in g s is
23
s m o o th e r. F o r th e lo c a tio n o f th e J 4 ju m p e r o n th e L S -4 2 1 b o a rd , s e e “J u m p e r S e ttin g s ” o n p a g e
9.
■ MOTOR BRAKES
If th e c o n tro lle d m o to rs o r th e a c tu a te d m e c h a n is m s a re e q u ip p e d w ith b ra k e s , th e y c a n b e
a u to m a tic a lly a c tiv a te d w h e n th e a m p lifie rs a re d is a b le d . T o o b ta in th is fu n c tio n a lity, th e b ra k e s
s h o u ld b e p o w e re d b y O P S o u tb o u n d p o w e r s o u rc e a n d b e n o rm a lly c lo s e d (th e a x is is s to p p e d
w h e n th e b ra k e is n o t a c tiv a te d ). T h is h a p p e n s , b e c a u s e O P S is c o n tro lle d b y th e A E s ig n a l. S e e
“D ig ita l O u tp u ts a n d O u tb o u n d P o w e r” o n p a g e 2 4 .
■ CURRENT LIMITS
T h e o u tp u t c u rre n t fro m e a c h H -b rid g e is c o n tin u o u s ly m o n ito re d b y a p ro te c tio n c irc u itry a n d is
lim ite d to a v a lu e a d ju s ta b le in th e ra n g e o f 2 ÷1 0 A . T h e lim it fo r e a c h a x is c a n b e p ro g ra m m e d
in d iv id u a lly u s in g a s p e c ia l re g is te r. T h e ra n g e 2 ÷1 0 A is d iv id e d in to 1 6 s te p s . A trim m e r-p o t (P 0 ,
P 1 , P 2 , P 3 ) m a y b e u s e d fo r p re c is e a d ju s tm e n t o f th e s e le c te d lim it. If a n a m p lifie r o u tp u t is
o v e rlo a d e d o r s h o rte n e d , th e H -b rid g e o u tp u t c u rre n t p ro te c tio n is a c tiv a te d . T h e p ro te c tio n h a s
tw o m o d e s o f o p e ra tio n d e p e n d in g o n J 3 ju m p e r s e ttin g . W ith J 3 ju m p e r in s ta lle d th e s e rv o lo o p
w ill b e s h u t d o w n a u to m a tic a lly a n d th e P W M p o w e r a m p lifie rs w ill b e d is a b le d . If J 3 is le ft o p e n ,
th e a m p lifie rs w ill re m a in e n a b le d re g a rd le s s o f th e o v e rlo a d d u ra tio n . T h e o u tp u t c u rre n t is
lim ite d to th e s p e c ifie d v a lu e . F o r th e lo c a tio n o f th e J 3 ju m p e r o n th e L S -4 2 1 b o a rd , s e e “J u m p e r
S e ttin g s ” o n p a g e 9 .
Digital Outputs and Outbound Power

B e in g a fu lly in te g ra te d s e rv o c o n tro lle r, L S -4 2 1 o ffe rs , in a d d itio n to th e s e rv o c h a n n e ls , 8
g e n e ra l-p u rp o s e d ig ita l o u tp u ts e q u ip p e d w ith h ig h v o lta g e , h ig h c u rre n t F E T tra n s is to rs . It a ls o
fe a tu re s th re e re la y c o n tro lle d p o w e r s o u rc e s . T h e re la ys a n d th e re s p e c tiv e p o w e r s o u rc e s a re
n a m e d b a s e d o n th e ir typ ic a l u s a g e .
• S y s te m P o w e r S u p p ly ( S P S ). T h e S P S re la y is u s e d a s m a in s ys te m p o w e r s w itc h . It
c o n n e c ts (d is c o n n e c ts ) th e o p e ra tin g p o w e r (2 4 V ) fro m a n u m b e r o f c irc u its o n th e B M . T h e
o u tp u t fro m th e S P S re la y is fe d to th e O P T a n d O P S o u tb o u n d p o w e r c irc u its . It a ls o c o n tro ls
th e n o rm a lly o p e n m o to r p o w e r re la y. T h u s , tu rn in g S P S o ff w ill d is a b le th e p o w e r a m p lifie rs ,
a s w e ll a s O P S a n d O P T . T h e c irc u it c o n tro llin g th e d ig ita l o u tp u ts is a ls o p o w e re d b y S P S
a n d tu rn in g S P S o ff w ill s w itc h o ff th e d ig ita l o u tp u ts . T h e o u tp u t fro m th e S P S re la y is
a v a ila b le a s a n o u tb o u n d p o w e r s o u rc e (2 4 V ), im m e d ia te ly fo llo w in g c o n tro lle r in itia liz a tio n .
S P S o u tb o u n d p o w e r is n o rm a lly u s e d to p o w e r s e n s o rs in th e c o n tro lle d e q u ip m e n t. T h is
g u a ra n te e s th a t th e u s e r s e n s o rs w ill re m a in p o w e re d a ll th e tim e e x c e p t w h e n th e
e m e rg e n c y in p u t is a c tiv a te d .
• O P T io n a l P o w e r S u p p ly ( O P T ) is a g e n e ra l-p u rp o s e p o w e r s o u rc e a n d m a y b e c o n tro lle d

in d iv id u a lly. S P S m u s t b e O N to e n a b le O P T .
24
• O u tp u t P o w e r S u p p ly ( O P S ) is u s e d b a s ic a lly to p o w e r m o to r b re a k s a n d v a rio u s u s e r v a lv e s
a n d s w itc h e s . O P S c a n n o t b e c o n tro lle d s e p a ra te ly. Its s ta te d e p e n d s o n a m p lifie r e n a b le
s ta tu s a n d S P S s ta tu s . If th e p o w e r a m p lifie rs a re d is a b le d o r th e S P S is o ff, O P S is o ff. T h is
is u s e fu l fo r d e v ic e s th a t s h o u ld b e s h u t o ff a u to m a tic a lly w h e n th e a m p lifie rs a re d is a b le d ,
fo r in s ta n c e m o to r b re a k s o r o th e r e m e rg e n c y c irc u its .
9729901
Figure 9: Digital outputs and outbound power sources
T h e o u tp u ts a re o p e n c o lle c to r tra n s is to rs c o n n e c te d to th e g ro u n d o f th e o p e ra tin g v o lta g e . T h e y

a re o p to is o la te d fro m c o m p u te r g ro u n d . A ll o u tp u ts a re s h o rt-c irc u it p ro te c te d . If o n e o f th e m is
o v e rlo a d e d , th e p ro te c tio n c irc u it w ill s h u t d o w n a ll tra n s is to r o u tp u ts . O P T a n d S P S re la ys w ill
n o t b e a ffe c te d . T h e s e rv o lo o p w ill b e tu rn e d o ff a u to m a tic a lly (a m p lifie r d is a b le ) a n d th is w ill
tu rn o ff O P S a s w e ll. O n c e a c tiv a te d , th e p ro te c tio n k e e p s o u tp u ts d is a b le d u n til th e e v e n t th a t
c a u s e d th e o v e rlo a d e x is ts . T h e o u tp u ts a re c o n tro lle d th ro u g h re g is te r b its O U T 0 to O U T 7 . T o
a c tiv a te a n o u tp u t o r p o w e r s u p p ly, th e c o rre s p o n d in g b it m u s t b e s e t H IG H (1 ).
25
Base Addr + 0xA R/W AE RST OPT SPS CL3 CL2 CL1 CL0
Base Addr + 0xD R/W OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0
Table 3: Digital Outputs and Outbound Power Registers
A c tiv a tio n o f th e e m e rg e n c y in p u t w ill d is a b le S P S . In o rd e r to p re v e n t a n a c c id e n ta l tu rn o n a fte r

th e e m e rg e n c y in p u t is a c tiv a te d , S P S is e q u ip p e d w ith a d o u b le b u ffe re d lo g ic . T o re s to re S P S
a fte r b e in g s h u t o ff, S P S m u s t b e c yc le d o ff-o n , i.e . S P S c o n tro l b it s h o u ld b e firs t s e t L O W (0 )
a n d a fte r th a t s e t H IG H (1 ).
Servo Control and Diagnostics Circuit

T h e S e rv o C o n tro l a n d D ia g n o s tic s c irc u it (S C D ) a llo w s th e h o s t to s e t u p th e c o n tro lle r a n d to
m o n ito r th e c u rre n t L S -4 2 1 s ta tu s .
■ CONTROLLED SIGNALS
T h e S C D c irc u it c o n tro ls th e a m p lifie r e n a b le s ig n a l b a s e d o n s e v e ra l in te rn a l a n d e x te rn a l
e x c e p tio n s ig n a ls . In a d d itio n to th a t, it c o n tro ls th e M o tio n P ro c e s s o r re s e t s ig n a l. T h e s e s ig n a ls
c a n b e m o n ito re d o r c o n tro lle d b y th e A E a n d R S T s ta tu s /c o n tro l b its . If A E is s e t to H IG H (1 ) th e
a m p lifie rs a re e n a b le d . A E s e t to L O W (0 ) m e a n s th a t th e a m p lifie rs a re d is a b le d .
Table 4: Amplifier Enable Control
T h e m o tio n p ro c e s s o r is in re s e t w h e n th e R S T b it is s e t to H IG H (1 ). S e ttin g R S T to L O W (0 )
re m o v e s re s e t fro m th e p ro c e s s o r.
Table 5: Motion Processor Reset Control
■ MONITORED SIGNALS
S e v e ra l p ro te c tio n c irc u its o n th e L S -4 2 1 b o a rd g e n e ra te s ig n a ls w h e n n o rm a l o p e ra tio n a l
c o n d itio n s a re v io la te d . T h e s e s ig n a ls a re fe d to th e S C D c irc u it, w h ic h s e ts th e s ta te o f s ta tu s
b its , a v a ila b le to th e h o s t fo r d ia g n o s tic s . W h e n s u c h a n e v e n t o c c u rs th e a m p lifie r e n a b le s ig n a l
(a n d th e re s p e c tiv e s ta tu s b it A E ) is s e t L O W (0 ). T h is in c id e n t w ill b e re fe rre d to a s h a rd w a re
e x c e p tio n .
26
9729302
Figure 10: Servo Control and Diagnostics
In a d d itio n to th e re g is te rs , w h ic h c o n tin u o u s ly re p o rt th e s ta te s o f s o m e o f th e e x c e p tio n s ig n a ls ,

th e S C D c irc u it c o n tro ls a la tc h re g is te r, w h ic h la tc h e s th e v a lu e o f th e e x c e p tio n s ig n a ls a t th e
m o m e n t w h e n e x c e p tio n s o c c u r.
T h e fo llo w in g e x c e p tio n s ig n a ls a re m o n ito re d :
• M o to r P o w e r F a ilu re (M P F )
• O u tp u t O v e rlo a d / O u tp u t P o w e r F a ilu re (O P F )
• E m e rg e n c y In p u t (E M G )
• S to p In p u t (S T P )
• A m p lifie r E n a b le (A E )
• M P R e s e t (R S T )
27
• M o to r C u rre n t L im it O v e rlo a d (C L 0 to C L 3 )
■ AMPLIFIER ENABLE (AE)

In c a s e o f e m e rg e n c y, p o w e r a m p lifie rs m u s t b e d is a b le d to p ro te c t th e c o n tro lle d e q u ip m e n t
a n d /o r th e c o n tro lle r its e lf. W h e n a m p lifie rs a re d is a b le d , th e re is n o p o w e r o n th e m o to r
te rm in a ls , b u t e n c o d e r fe e d b a c k c o n tin u e s to fu n c tio n .
L S -4 2 1 a m p lifie r e n a b le s ig n a l is c o n tro lle d b y A m p lifie r E n a b le (A E ) b it. O n ly th e h o s t s o ftw a re

m a y s e t th e A E b it H IG H (1 ). T h e A E b it c a n b e re s e t (s e t L O W (0 )) e ith e r b y th e h o s t o r
a u to m a tic a lly b y th e S C D c irc u it.
Note
A E b it h a s a d u a l m e a n in g . In re a d m o d e it re p re s e n ts th e s ta tu s o f th e
a m p lifie rs (e n a b le d o r d is a b le d ). In w rite m o d e , it is a c o n tro l b it to e n a b le o r
d is a b le th e p o w e r a m p lifie rs . T h e a m p lifie rs o f a ll fo u r s e rv o c h a n n e ls a re
c o n tro lle d s im u lta n e o u s ly b y o n e A E b it. T h u s , a m p lifie rs c a n n o t b e e n a b le d o r
d is a b le d o n in d iv id u a l b a s is .
Table 6: Amplifier Enable control
T o a c tiv a te th e a m p lifie r e n a b le s ig n a l, A E c o n tro l b it s h o u ld b e s e t H IG H (1 ). A m p lifie r e n a b le

s ig n a l is s e t L O W b y e ith e r w ritin g lo g ic z e ro to th e A E b it, o r a u to m a tic a lly w h e n p ro te c tio n
c irc u its a re a c tiv a te d a n d a h a rd w a re e x c e p tio n o c c u rs .
Note
F o r s a fe ty re a s o n s , A E is e q u ip p e d w ith d o u b le b u ffe re d lo g ic to p re v e n t a n
a c c id e n ta l tu rn o n a fte r a n e m e rg e n c y s h u t d o w n .
T h e s a m e d o u b le b u ffe re d lo g ic is im p le m e n te d in th e c o n tro l o f S P S . S e e D ig ita l O u tp u ts a n d

O u tb o u n d P o w e r” o n p a g e 2 4 . T o re s to re A E a fte r a n e x c e p tio n a l e v e n t, th e A E c o n tro l b it s h o u ld
b e firs t s e t L O W (0 ). T h e n , s e ttin g A E c o n tro l b it H IG H (1 ) w ill e n a b le th e a m p lifie rs , if th e e v e n t
th a t a c tiv a te d th e p ro te c tio n c irc u it is n o lo n g e r p re s e n t.
■ MP RESET (RST)
R S T b it c a n b e c o n tro lle d b y th e s o ftw a re o r is a u to m a tic a lly s e t H IG H (1 ) a fte r th e p o w e r u p o r
a fte r th e h a rd w a re re s e t is is s u e d .
28
Note
R S T b it h a s a d u a l m e a n in g . In re a d m o d e it re p re s e n ts th e s ta tu s o f th e m o tio n
p ro c e s s o r re s e t s ig n a l. In w rite m o d e , it is a c o n tro l b it s e t o r to re m o v e m o tio n
p ro c e s s o r re s e t s ig n a l.
Base Addr + 0xA R/W $( RST OPT SPS CL3 CL2 CL1 CL0
Table 7: MP Reset control
T o p u t M P in re s e t s ta te , R S T b it m u s t b e s e t H IG H (1 ). T o c le a r M P re s e t s ig n a l a n d to e n a b le
M P , R S T m u s t b e s e t L O W (0 ).
■ MOTOR POWER FAILURE (MPF)

T o p o w e r th e m o to rs , L S -4 2 1 re q u ire s a s e p a ra te p o w e r s u p p ly is o la te d fro m th e c o m p u te r
g ro u n d a n d th e o p e ra tin g p o w e r (2 4 V ). If M o to r P o w e r is b e lo w th e u n d e rv o lta g e lim it, M P F is s e t
H IG H (1 ) a n d A E is a u to m a tic a lly d is a b le d . M P F is a ls o s e t H IG H (1 ) in c a s e o f le a k a g e b e tw e e n
h ig h v o lta g e m o to r c irc u its a n d a n y o f th e lo w v o lta g e c o m p u te r o r 2 4 V c irc u its . A c u rre n t a s lo w
a s 0 .5 m A w ill trig g e r th e p ro te c tio n . T h e M P F v a lu e is la tc h e d in th e M P F L b it a t th e m o m e n t
w h e n A E tu rn s L O W . T h e a m p lifie rs h a v e to b e p re v io u s ly e n a b le d (A E s h o u ld b e H IG H ) in o rd e r
to la tc h a v a lu e in M P F L w h e n m o to r p o w e r fa ilu re o c c u rs . T h u s , w h e n a m p lifie rs a re d is a b le d a
c h a n g e in th e m o to r p o w e r fa ilu re c o n d itio n w ill b e re fle c te d in M P F o n ly b u t w ill n o t a ffe c t M P F L .
Base Addr + 0xB Read EMG STP MPF OPF EMGL STPL MPFL OPFL
Table 8: MPF status
■ OUTPUT OVERLOAD / OPERATING POWER FAILURE (OPF)

T h e re a re tw o c o n d itio n s th a t c a n trig g e r a n O p e ra tin g P o w e r F a ilu re (O P F ) e v e n t:
• T h e o p e ra tin g p o w e r, re q u ire d to p o w e r th e O u tp u ts a n d O u tb o u n d P o w e r S o u rc e s is o u t o f
ra n g e . T h e o p e ra tin g p o w e r re q u ire d fo r th e O u tp u ts a n d O u tb o u n d P o w e r S o u rc e s m u s t b e
2 4 V ±2 0 % . If it is b e llo w th e p re s c rib e d ra n g e , th e O P F is s e t H IG H (1 ) a n d A E is
a u to m a tic a lly d is a b le d .
• O n e o r m o re o f th e d ig ita l o u tp u ts is o v e rlo a d e d . A ll d ig ita l o u tp u ts a re s h o rt c irc u it p ro te c te d .

If a n y o f th e m is o v e rlo a d e d , a ll o u tp u ts a re d is a b le d a n d O P F is s e t H IG H (1 ).
If a n y o f th e a b o v e c o n d itio n s o c c u r, a m p lifie rs a re d is a b le d a n d a ll d ig ita l o u tp u ts a re tu rn e d o ff.

T o d is tin g u is h b e tw e e n th e tw o c o n d itio n s , th e h o s t s h o u ld firs t s e t L O W (0 ) a ll o u tp u ts a n d th e n
re a d th e O P F re g is te r. If O P F h a s a g a in a v a lu e o f 1 , th is in d ic a te s a m is s in g o r o u t o f ra n g e
o p e ra tin g p o w e r.
29
T h e c u rre n t O P F v a lu e is la tc h e d a s O P F L a t th e m o m e n t w h e n a m p lifie rs a re d is a b le d (A E tu rn s
L O W ).
Table 9: OPF Status
If th e h o s t m a k e s a n a tte m p t to e n a b le th e p o w e r a m p lifie rs b y s e ttin g H IG H (1 ) th e A E b it,

w ith o u t d is c o n n e c tin g th e o v e rlo a d in g o u tp u t o r s e ttin g its c o n tro l b it L O W , th e p ro te c tio n w ill n o t
a llo w th a t to h a p p e n a n d A E w ill b e in s ta n tly re s e t to L O W (0 ).
T o d ia g n o s e w h ic h o u tp u t(s ) is o v e rlo a d e d th e h o s t m u s t firs t re s e t a ll o u tp u ts , i.e . s e t L O W (0 )

O U T 0 to O U T 7 b its . T h e n , A E s h o u ld b e s e t H IG H (1 ) a n d th e o u tp u ts s h o u ld b e a c tiv a te d a g a in
o n e b y o n e , b y s e ttin g th e c o rre s p o n d in g O U T b its H IG H (1 ) u n til th e p ro te c tio n is trig g e re d
a g a in .
■ EMERGENCY STOP INPUT (EMG)

L S -4 2 1 is e q u ip p e d w ith e m e rg e n c y s to p in p u t. T o o p e ra te L S -4 2 1 , a n o rm a lly c lo s e d c o n ta c t
m u s t b e c o n n e c te d to th a t in p u t. O p e n in g th e c o n ta c t w ill im m e d ia te ly d is a b le th e a m p lifie rs a n d
a ll o u tp u ts a n d w ill s h u t o ff a ll o u tb o u n d p o w e r s o u rc e s . F o r d e ta ils w h e re to c o n n e c t a n
e m e rg e n c y b u tto n o r o th e r e m e rg e n c y d e v ic e , s e e “In te rfa c e C o n n e c to rs ” o n p a g e 3 4 . In th e
e v e n t o f a c tiv a tin g th e e m e rg e n c y s w itc h , E M G b it is s e t to o n e (1 ) o th e rw is e is re s e t to z e ro (0 ).
W h e n a m p lifie rs a re d is a b le d (th e A E tu rn s L O W ), th e m o m e n ta ry s ta te o f th e e m e rg e n c y s w itc h
is la tc h e d in th e E M G L s ta tu s b it.
Table 10: EMG status
Note
A c tiv a tin g th e e m e rg e n c y s to p w ill tu rn o ff S P S a n d w ill d is a b le a ll o th e r p o w e r
s o u rc e s a n d o u tp u ts .
■ OPTIONAL EMERGENCY STOP INPUTS (STP)

S o m e o f th e g e n e ra l p u rp o s e in p u ts o r a s p e c ifie d c o m b in a tio n o f th e m c a n b e u s e d a s a n
a d d itio n a l e m e rg e n c y s to p . T h is is a c u s to m o p tio n a n d m a y b e in s ta lle d o n u s e r re q u e s t. It is n o t
s u p p o rte d b y d e fa u lt. S e e “O p tio n a l E m e rg e n c y S to p ” In p u ts o n p a g e 4 2 .
W h e n th e o p tio n is in s ta lle d a n d o n e o r m o re o f th e o p tio n a l e m e rg e n c y s to p in p u ts a re a c tiv a te d ,

S T P is s e t H IG H (1 ). U n d e r n o rm a l c o n d itio n s S T P is L O W (0 ). S T P is c o n tin u o u s ly a v a ila b le to
th e h o s t a n d th e c u rre n t S T P v a lu e is la tc h e d a s S T P L a t th e m o m e n t w h e n a m p lifie rs a re
d is a b le d .
30
Table 11: STP status
■ CURRENT LIMIT VIOLATION (CL0 – CL3)

C u rre n t L im it V io la tio n e v e n t h a p p e n s w h e n o n e o r m o re o f th e m o to r p o w e r a m p lifie rs m a k e a n
1
a tte m p t to e x c e e d th e ir p ro g ra m m e d c u rre n t lim its fo r m o re th a n 1 0 0 m s .
Note
C u rre n t L im it V io la tio n e v e n t w ill n o t b e g e n e ra te d w h e n th e c u rre n t lim it
p ro te c tio n m o d e is s e t to “c u rre n t lim ita tio n ” a n d n o t “s h u td o w n ”. T h e J 3 ju m p e r
s e ttin g c o n tro ls th is m o d e . S e e “C u rre n t L im it M o d e ” o n p a g e 9 .
T h e c u rre n t lim it p ro te c tio n h a s tw o m o d e s o f o p e ra tio n d e p e n d in g o n J 3 ju m p e r s e ttin g .
W ith J 3 ju m p e r le ft o p e n , C L 0 – C L 3 s ig n a ls (a n d re s p e c tiv e c o n tro l b its ) w ill n e v e r b e s e t H IG H ,

re g a rd le s s o f th e o c c u rre n c e o f a n o v e rlo a d . M o to r c u rre n t th o u g h , w ill b e lim ite d to th e
p ro g ra m m e d v a lu e .
If J 3 ju m p e r is in s ta lle d , th e C L 0 -C L 3 s ig n a ls (a n d re s p e c tiv e c o n tro l b its ) w ill b e s e t H IG H

w h e n e v e r a n a tte m p t to o v e rlo a d o c c u rs . E v e n s h o rt o v e rlo a d s (u n d e r 1 0 0 m s ) w ill s h o w u p in
th e C L 0 -C L 3 b its fo r a lim ite d tim e . T h e c u rre n t th o u g h , is a lw a ys lim ite d to th e p ro g ra m m e d
v a lu e . If th e o v e rlo a d d u ra tio n is g re a te r th a n 1 0 0 m s th e p o w e r a m p lifie rs w ill b e d is a b le d b y
S C D (C u rre n t L im it V io la tio n e v e n t w ill o c c u r).
W h e n A E tra n s itio n s fro m H IG H (1 ) to L O W (0 ), C L 0 to C L 3 p re s e rv e th e ir v a lu e s a s th e y w e re a t

th e m o m e n t o f fa ilu re . T h is is e q u iv a le n t to la tc h in g th e v a lu e s . B y re a d in g th e C L re g is te r th e
h o s t c a n d e te rm in e w h ic h c h a n n e l w a s o v e rlo a d e d .
Base Addr + 0xA Read AE RST OPT SPS CL3 CL2 CL1 CL0
Table 12: CL Status
■ SETTING OF AMPLIFIER CURRENT LIMITS

T h e o u tp u t o f e a c h a m p lifie r is p ro te c te d a g a in s t s h o rt c irc u it o r o v e rlo a d . T h e c u rre n t is
c o n s ta n tly m o n ito re d a n d lim ite d (if o v e rlo a d o c c u rs ) to a v a lu e th a t c a n b e s e t in d iv id u a lly fo r
e a c h a x is .
T h e c u rre n t m a y b e lim ite d w ith in th e ra n g e o f 1 ÷1 0 A w ith a 4 -b it p re c is io n . O n ly th e fo u r M S B

a re u s e d . W ritin g 0 x 0 0 to th e c o rre s p o n d in g re g is te r s e ts th e c u rre n t lim it to its lo w e s t le v e l (le s s
1
T h e p rotec tion w ill ac tu ally lim it th e c u rren t to th e p rog ram m ed valu e.
31
th a n 1 A ). W ritin g 0 x F 0 s e ts th e c u rre n t lim it to its h ig h e s t le v e l (1 0 A ). T h e v a lu e c a n b e fin e -

tu n e d u s in g a trim m e r-p o t (P 0 , P 1 , P 2 , P 3 ), s h o w n in F ig u re 7 .
Base Addr + 0x408 Write CURRENT LIMIT #0 (0 ÷ 0xF)
Base Addr + 0x409 Write CURRENT LIMIT #1 (0 ÷ 0xF)
Base Addr + 0x40A Write CURRENT LIMIT #2 (0 ÷ 0xF)
Base Addr + 0x40B Write CURRENT LIMIT #3 (0 ÷ 0xF)
Table 13: Current Limit Value Registers
F o r d e ta ils o n h o w th e S e rv o C o n tro l a n d D ia g n o s tic s c irc u it h a n d le s c u rre n t lim it v io la tio n s , s e e

“C u rre n t L im it V io la tio n ” o n p a g e 3 1 .
Interrupt Request Lines

In th e L S -4 2 1 c o n tro lle r a rc h ite c tu re th e re a re tw o s o u rc e s (s ig n a ls ) th a t c a n g e n e ra te in te rru p t
re q u e s ts (IR Q ) to th e h o s t:
• A m p lifie r D is a b le In te rru p t (A D I). A n in te rru p t re q u e s t c a n b e g e n e ra te d , e a c h tim e th e

a m p lifie rs a re d is a b le d .
• M o tio n P ro c e s s o r In te rru p t (M P I). T h e M o tio n P ro c e s s o r c a n g e n e ra te in te rru p t re q u e s t in

re s p o n s e to d iffe re n t e v e n ts .
T h e s ta te s o f b o th in te rru p t re q u e s t s ig n a ls a re v is ib le in th e A D I a n d M P I b its , re s p e c tiv e ly. A D I

in te rru p t re q u e s t s ig n a l m a y b e m a s k e d b y s e ttin g L O W (0 ) th e E N A D I b it in th e In te rru p t M a s k
re g is te r. T h e re is n o t a d e d ic a te d b it to m a s k th e M P I in th e In te rru p t M a s k re g is te r. O n ly s e n d in g
a p p ro p ria te c o m m a n d s to th e M P m a y m a s k a n M P in te rru p t re q u e s t.
Base Addr + 0xC Read ADI MPI
Base Addr + 0xC Write EN ADI
Table 14: IRQ Status and Mask Registers
J 2 ju m p e r b lo c k s e le c ts th e in te rru p t lin e to th e h o s t. IR Q 7 , IR Q 1 0 , IR Q 1 2 , IR Q 1 5 m a y b e u s e d .
F o r ju m p e r s e ttin g s , s e e “In s ta lla tio n : In te rru p t R e q u e s t L in e ” o n p a g e 8 .
Board Identifier
D u e to its m o d u la r d e s ig n a n d a d a p ta b le In S ys te m P ro g ra m m a b le (IS P ) a rc h ite c tu re , L S -4 2 1
m o tio n c o n tro l b o a rd a llo w s q u ic k a n d e a s y c u s to m iz a tio n s . T o p ro v id e in fo rm a tio n a b o u t th e
c u rre n t c o n tro lle r c o n fig u ra tio n , L S -4 2 1 fe a tu re s a n 8 -b it ID n u m b e r a v a ila b le to th e h o s t in ID 0 to
ID 7 re g is te rs .
32
%DVH $GGU [ Read ID3 ID2 ID1 ID0
Base Addr + 0xC07 Read ID7 ID6 ID5 ID4
Table 15: ID registers
T h e ID fo r th e s ta n d a rd L S -4 2 1 c o n fig u ra tio n is 0 x B 1 .
33
Interface Connectors
T h e B a s e M o d u le s u p p o rts tw o in te rfa c e c o n n e c to rs d e s ig n a te d a s C N 2 a n d C N 3 . C N 3 c o n n e c to r
is th e e n try p o rt fo r th e e x te rn a l m o to r a n d o p e ra tin g p o w e r s u p p lie s . T h e e m e rg e n c y s to p in p u t
is a ls o lo c a te d th e re . A ll d ig ita l o u tp u ts a n d o u tb o u n d p o w e r s o u rc e s a re w ire d to C N 2 c o n n e c to r.
A b lo c k d ia g ra m o f C N 2 a n d C N 3 c o n n e c to rs is s h o w n b e lo w .
H -B R ID G E H -B R ID G E H -B R ID G E H -B R ID G E
M C1401A
M O T IO N P R O C E S S O R
MOT3 MOT2 MOT1 MOT0
C N 2 C ON N EC TO R
SHORT
C IR C U IT
S EN S O R
OU T7
OU T6
OU T5
OU T4
OU T3
OU T2
OU T1
OU T0
S PS OPS
OU TPU T
FUS E
FUS E
OVERLOAD
S EN S O R
OPT
FRO M
P R O T E C T IO N
L O G IC AE
OU TPU TS A N D O U TB OU N D P OW E R
C O N T R O L R E G IS T E R S
C N 3 C ON N EC TO R
E M ER G EN C Y S TOP
P OW ER
M OTO R
P O W E R (2 4 V )
O P E R AT IN G
9 72 91 0 2a
Figure 11: Block Diagram of CN2 & CN3 connectors
34
■ CN3 CONNECTOR (EXTERNAL POWER)

T h e fo llo w in g fig u re illu s tra te s th e p in o u t o f th e C N 3 c o n n e c to r a n d its lo c a tio n o n th e B a s e
M o d u le .
8
E M ER G EN C Y S TOP
7
6 O P E R AT IN G P O W E R G R O U N D ( )
5 O P E R AT IN G P O W E R (+ 2 4 V )
4
3
2
1
} M OTO R PO W E R
9729103
Figure 12: CN3 Connector Location and Pinout
35
■ &1 &211(&725 2873876 287%281' 32:(5

T h e fo llo w in g fig u re illu s tra te s th e p in o u t o f th e C N 2 c o n n e c to r a n d its lo c a tio n o n th e B a s e
M o d u le .
14 - OUT 0
13 - OUT 1
12 - OUT 2
11 - O U T 3
10 - OUT 4
9 - OUT5
8 - OUT6
7 - OUT7
6 - + 24 V O P S
5 - + 24 V O P T
4 - + 24 V S P S
3 - + 24 V O P E R AT IN G P O W E R (F U S E )
2 - E ME R G EN C Y S TOP
1 - O P E R AT IN G P O W E R G R O U N D
9 72 91 0 4
Figure 13: CN2 Connector Location and Pinout
36
❑ I NPUT B OARD
L S -4 2 1 is a m u ltip u rp o s e m o tio n c o n tro lle r. T o ta ilo r c o n tro lle r I/O fe a tu re s to a b ro a d ra n g e o f
c u s to m a p p lic a tio n s , a ll in p u t c irc u its a re lo c a te d o n a s e p a ra te b o a rd , th e s o -c a lle d In p u t B o a rd
(IB ). IB is p lu g g e d in to B M , w h ic h s e rv e s a s a m o th e rb o a rd . A fla t rib b o n c a b le c o n n e c ts IB to th e
c o n tro lle r in te rfa c e c o n n e c to r, m o u n te d o n th e fro n t p a n e l.
Note
T h e fro n t p a n e l c o n n e c to r a n d th e in p u t b o a rd m a y b e o rd e re d in d iffe re n t
c u s to m d e s ig n e d c o n fig u ra tio n s fo r s p e c ific a p p lic a tio n s . T h e s ta n d a rd L S -4 2 1
In p u t B o a rd is L S -4 2 1 -2 1 1 2 .
9737100
Figure 14: LS-421-2112 Input Board Layout
In p u t B o a rd L S -4 2 1 -2 1 1 2 fe a tu re s :
• 1 6 g e n e ra l-p u rp o s e d ig ita l o p to is o la te d in p u ts . T w o o f th e in p u ts m a y b e a lte rn a tiv e ly u s e d a s

a b s o lu te p o s itio n e n c o d e r in p u ts .
• O p to is o la te d in te rfa c e a n d p o w e r s u p p ly fo r u p to 4 in c re m e n ta l e n c o d e rs
• 4 -c h a n n e l o p to is o la te d re c e iv e r, p o w e r s u p p ly a n d b a c k u p b a tte ry fo r u p to 4 m u lti-tu rn
a b s o lu te p o s itio n e n c o d e rs . T w o o f th e c h a n n e ls o v e rla p tw o o f th e g e n e ra l-p u rp o s e d ig ita l
o p to is o la te d in p u ts a n d m a y b e a lte rn a tiv e ly u s e d a s s u c h .
• A ll in p u t lin e s a n d e n c o d e r s ig n a ls a re p ro c e s s e d b y In S ys te m P ro g ra m m a b le (IS P ) lo g ic
d e v ic e fo r m a x im u m fle x ib ility
37
9737904a
Figure 15: LS-421-2112 Input Board Block Diagram
38
Digital Optoisolated Inputs

A ll 1 6 in p u ts IN 0 ÷IN 1 5 m a y b e u s e d a s g e n e ra l-p u rp o s e in p u ts , a lth o u g h s o m e o f th e m m a y
h a v e a d d itio n a l fu n c tio n s . S ix m a y s e rv e a s s tro b e s fo r h ig h s p e e d p o s itio n c a p tu rin g . IN 0 /A P E 2
a n d IN 1 /A P E 3 m a y b e u s e d a s in p u ts fo r tw o a d d itio n a l m u lti-tu rn a b s o lu te p o s itio n e n c o d e rs .
A P E 0 a n d A P E 1 a re d e d ic a te d a s in p u ts fo r tw o m u lti-tu rn a b s o lu te p o s itio n e n c o d e rs .
■ GENERAL PURPOSE INPUTS

T h e o p to is o la te d in p u ts a re d e s ig n e d to w o rk w ith o p e n c o lle c to r o r c o n ta c t s e n s o rs .
9737903
Figure 16: General purpose inputs
O n L S -4 2 1 -2 1 1 2 in p u t b o a rd th e o p e ra tio n a l p o w e r is u s e d to p o w e r th e in p u ts . T h e
c o rre s p o n d in g s e n s o r s h o u ld b e c o n n e c te d b e tw e e n th e in p u t a n d th e o p e ra tin g p o w e r g ro u n d
(fo r th e s ta n d a rd in te rfa c e w irin g th e o p e ra tin g p o w e r g ro u n d is a t p in W ).
Note
T h e s e n s o r s h o u ld b e a b le to s in k 1 0 m A @ 2 4 V in o rd e r to a c tiv a te th e in p u t.
T h e h o s t c a n c h e c k in p u ts s ta te re a d in g th e in p u t re g is te r b its IN 0 to IN 1 5 . W h e n a n in p u t is
a c tiv a te d (th e re is c u rre n t) th e s ta te o f th e c o rre s p o n d in g b it is L O W (0 ).
39
Base Addr + 0x8 Read IN7 IN6 IN5 IN4 IN3 IN2 IN1 IN0
Base Addr + 0x9 Read IN15 IN14 IN13 IN12 IN11 IN10 IN9 IN8
Table 16: Input Registers
9737905
Figure 17: LS-421 Input Connection Diagram
■ ABSOLUTE POSITION ENCODER INPUTS

A P E 0 , A P E 1 , IN 0 /A P E 2 , IN 1 /A P E 3 a re d e s ig n e d to w o rk a s d a ta in p u ts fo r m u lti-tu rn A b s o lu te
P o s itio n E n c o d e rs (A P E ). A ll fo u r in p u ts u s e + 5 V p o w e r s u p p ly. IN 0 /A P E 2 , IN 1 /A P E 3 h a v e d u a l
fu n c tio n . If n o t c o n n e c te d to a n A P E , IN 0 /A P E 2 a n d IN 1 /A P E 3 m a y b e u s e d a s g e n e ra l p u rp o s e
in p u ts (w ith + 5 V p o w e r s u p p ly). W h e n c o n n e c te d to a n A P E , IN 0 /A P E 2 a n d IN 1 /A P E 3 o s c illa te
H IG H -L O W re fle c tin g th e s ig n a l le v e ls re s u ltin g fro m th e s e ria l c o m m u n ic a tio n w ith th e A P E o v e r
th a t lin e .
Note
T o a c tiv a te A P E 0 , A P E 1 , IN 0 /A P E 2 , IN 1 /A P E 3 , th e lo a d s h o u ld b e a b le to s in k
20mA @ 5V.
40
9738902
Figure 18: Multi-Turn Absolute Position Encoder (APE) Inputs
■ HIGH SPEED POSITION CAPTURE INPUTS

T h e M o tio n P ro c e s s o r is a b le to re c o rd th e a b s o lu te m o to r p o s itio n u s in g th e e n c o d e r in d e x lin e
a s a s tro b e . S e e M C 1 4 0 1 A m a n u a l fo r in fo rm a tio n h o w to u s e p o s itio n c a p tu re m o d e . L S -4 2 1 is
e q u ip p e d w ith s p e c ia l c irc u itry, w h ic h a llo w s u s in g s o m e o f th e c o n tro lle r in p u ts a s p o s itio n
s tro b e s , in p la c e o f th e e n c o d e r in d e x s ig n a l. T h e fo llo w in g in p u ts m a y b e u s e d to th is p u rp o s e :
IN 2 , IN 5 , IN 6 , IN 7 , IN 8 o r IN 9 .
Note:
W ith IB L S -4 2 1 -2 1 1 2 th e s e le c te d s tro b e in p u t b e c o m e s th e c o m m o n s tro b e fo r
a ll fo u r s e rv o c o n tro lle d m o tio n a x e s .
T h e h o s t m a y c o n tro l w h ic h o n e o f IN 2 , IN 5 , IN 6 , IN 7 , IN 8 o r IN 9 to s e rv e a s a s tro b e b y w ritin g a

c o d e d v a lu e to th e P o s itio n C a p tu re S e le c t re g is te rs (P C S 0 to P C S 3 ).
Base Addr + 0xE Write PCS3 PCS2 PCS1 PCS0 APE RES
Table 17: PCS control registers
E ith e r lo w (in p u t is c lo s e d to th e g ro u n d ) o r h ig h (in p u t is o p e n ) le v e l m a y b e s e le c te d to trig g e r

th e c a p tu re . F o r L S -4 2 1 -2 1 1 2 s e le c te d s tro b e in p u t is c o m m o n fo r a ll fo u r a x e s . F o r h o m in g
p u rp o s e s , ro w 1 4 o r 1 5 fro m th e ta b le b e llo w s h o u ld b e s e le c te d . T h is w ill a llo w e a c h a x is to
c a p tu re th e m o to r p o s itio n u s in g its o w n e n c o d e r in d e x s ig n a l.
41
# PCS3 PCS2 PCS1 PCS0 Channel#0 Channel#1 Channel#2 Channel#3 Act. level
0 0 0 0 0 IN6 IN6 IN6 IN6 Low
1 0 0 0 1 IN6 IN6 IN6 IN6 High
2 0 0 1 0 IN7 IN7 IN7 IN7 Low
4 0 1 0 0 Reserved Reserved Reserved Reserved -
5 0 1 0 1 Not used Not used Not used Not used -
6 0 1 1 0 IN2 IN2 IN2 IN2 Low
8 1 0 0 0 IN5 IN5 IN5 IN5 Low
10 1 0 1 0 IN8 IN8 IN8 IN8 Low
11 1 0 1 1 IN8 IN8 IN8 IN8 High
12 1 1 0 0 IN9 IN9 IN9 IN9 Low
13 1 1 0 1 IN9 IN9 IN9 IN9 High
14 1 1 1 0 Index#0 Index#1 Index#2 Index#3 Low
15 1 1 1 1 Index#0 Index#1 Index#2 Index#3 Low
Table 18: Selecting Strobe Inputs
■ OPTIONAL EMERGENCY STOP INPUTS

In s o m e c u s to m iz e d c o n fig u ra tio n s , o n e o r m o re o f g e n e ra l-p u rp o s e in p u ts m a y b e u s e d a s
a d d itio n a l e m e rg e n c y s to p s .
Note
T h e s ta n d a rd v e rs io n o f L S -4 2 1 -2 1 1 2 d o e s n o t s u p p o rt th is o p tio n .
In a c u s to m iz e d v e rs io n o f L S -4 2 1 -2 1 1 2 (p a rt n u m b e r 9 2 0 4 2 0 4 2 2 ) IN 2 , IN 3 , IN 4 , IN 5 a re
c o n fig u re d a s a d d itio n a l e m e rg e n c y s to p in p u ts . A ll fo u r in p u ts m u s t b e in a c tiv e s ta te (c o n n e c te d
to th e o p e ra tin g p o w e r g ro u n d ) to e n a b le th e p o w e r a m p lifie rs (s e e F ig u re 1 9 ). If o n e o r m o re o f
th e o p tio n a l e m e rg e n c y s to p in p u ts is d is c o n n e c te d fro m th e o p e ra tin g p o w e r g ro u n d , th e p o w e r
a m p lifie rs a re a u to m a tic a lly d is a b le d a n d th e O u tp u t P o w e r S u p p ly (O P S ) is s w itc h e d o ff.
S T P b it in th e s ta tu s re g is te r is s e t H IG H (1 ) if a t le a s t o n e o f th e o p tio n a l e m e rg e n c y s to p in p u ts
is le ft o p e n . T h e v a lu e o f S T P is la tc h e d in S T P L d u rin g A E tra n s itio n H IG H to L O W . S e e
“O p tio n a l E m e rg e n c y S to p In p u ts ” o n p a g e 3 0 .
T h e fo llo w in g fig u re s h o w s a s im p le a p p lic a tio n o f o p tio n a l e m e rg e n c y s to p in p u ts (a s 4 n o rm a lly

c lo s e d b u tto n s ) a n d th e ir w irin g to th e fro n t-p a n e l c o n n e c to r.
42
A9729002
Figure 19 Optional Emergency Stop Inputs Wiring
Incremental Encoder Interface

L S -4 2 1 -2 1 1 2 in p u t b o a rd is d e s ig n e d to w o rk w ith q u a d ra tu re in c re m e n ta l e n c o d e rs w ith in d e x
p u ls e . E n c o d e rs m u s t b e e q u ip p e d w ith o p e n c o lle c to r o u tp u ts o r lin e d riv e rs c a p a b le to s in k
2 0 m A @ 5 V . M e d iu m -s p e e d H P 2 5 3 1 o p to c o u p le rs a re u s e d to p ro v id e 2 0 m A c u rre n t lo o p fo r
in c re a s e d n o is e im m u n ity. L S -4 2 1 -2 1 1 2 re c e iv e rs a re ra te d fo r s p e e d s u p to 1 ,0 0 0 ,0 0 0 e n c o d e r
c o u n ts p e r s e c o n d .
43
9737906
Figure 20: Incremental Encoder interface
T o p re v e n t v o lta g e d ro p a c ro s s lo n g in te rfa c e c a b le s , L S -4 2 1 p ro v id e s + 9 V fo r e n c o d e r p o w e r.
A n a d d itio n a l v o lta g e re g u la to r (7 8 0 5 ) is re q u ire d . It s h o u ld b e lo c a te d c lo s e to th e e n c o d e rs .
9737907
Figure 21: Encoder Power Supply
44
Multi-turn Absolute Encoder Receiver

L S -4 2 1 -2 1 1 2 is d e s ig n e d to o p e ra te w ith u p to fo u r m u lti-tu rn a b s o lu te p o s itio n e n c o d e rs (A P E ).
T h e fo llo w in g typ e s , m a n u fa c tu re d b y T a m a g a w a S e ik i C o a re s u p p o rte d :
• S A 3 5 -1 1 /2 4 b it-L P S -5 V
• S A 5 6 -1 1 /2 4 b it-L P S -5 V
S A 3 5 /5 6 s e rie s e n c o d e rs c o n s is t o f tw o m o d u le s – in c re m e n ta l a n d a b s o lu te , w h ic h fu n c tio n
s im u lta n e o u s ly a n d in d e p e n d e n tly o f e a c h o th e r.
T h e in c re m e n ta l m o d u le fu n c tio n s a s a s ta n d a rd in c re m e n ta l e n c o d e r. It s h o u ld b e c o n n e c te d to
L S -4 2 1 -2 1 1 2 in c re m e n ta l e n c o d e r in te rfa c e . S e e “In c re m e n ta l E n c o d e r In te rfa c e ” o n p a g e 4 3 .
D a ta fro m th e S A 3 5 /5 6 in c re m e n ta l e n c o d e r is re c e iv e d a n d p ro c e s s e d b y th e M o tio n P ro c e s s o r.
T h e a b s o lu te m o d u le in S A 3 5 /5 6 c o n s ta n tly tra n s m its s e ria l d a ta c o n s is tin g o f 2 4 -b it a b s o lu te

p o s itio n a n d 6 -b it s ta tu s o v e r th e c o rre s p o n d in g in p u t lin e (A P E 0 , A P E 1 , IN 0 /A P E 2 , IN 1 /A P E 3 ).
S e e “A b s o lu te P o s itio n E n c o d e r In p u ts ” o n p a g e 4 0 . M a n c h e s te r c o d e w ith 3 -b it C R C is u s e d .
R e c e iv e d d a ta is d e c o d e d , c h e c k e d fo r e rro rs a n d s to re d in 2 4 -b it d a ta re g is te r a n d 6 -b it s ta tu s
re g is te r, a v a ila b le to th e h o s t.
T h e re c e iv e r w o rk s o n re q u e s t. T yp ic a lly, it is in s ta n d b y m o d e a n d w a its fo r th e n e x t re q u e s t
c o m m a n d . A ll fo u r m u lti-tu rn a b s o lu te e n c o d e rs s h a re a s in g le re g is te r fo r 2 4 -b it p o s itio n d a ta
a n d 6 -b it s ta tu s . B y w ritin g to o n e o f th e fo u r re q u e s t re g is te rs (R E Q A P E # 0 to R E Q A P E # 3 ) th e
h o s t s e le c ts o n e o f th e e n c o d e r in p u ts A P E 0 , A P E 1 , IN 0 /A P E 2 , IN 1 /A P E 3 a n d e n a b le s th e
re c e iv e r. T h is a ls o s e ts L O W (0 ) th e A P E R D Y fla g .
O n c e A P E R D Y fla g tu rn s H IG H , A P E d a ta a n d s ta tu s a re v a lid a n d m a y b e re a d b y th e h o s t. T h e
d a ta is a v a ila b le in th e A P E D A T A re g is te r, b its 0 to 2 3 , w h e re 2 3 is th e M S B . T h e m in im a l tim e
to c o m p le te th e re q u e s t is 6 7 ÷1 0 9 µs . In n o is y e n v iro n m e n t th is tim e m a y in c re a s e . If th e
re c e iv e r d e te c ts a n e rro r, it w ill d is c a rd re c e iv e d d a ta a n d a u to m a tic a lly s ta rt n e w a c q u irin g
p ro c e d u re . In m o s t c a s e s th e re q u e s t w ill b e c o m p le te d fo r le s s th a n 1 m s .
T h e h o s t is re s p o n s ib le fo r re a d in g th e a b s o lu te p o s itio n fro m th e e n c o d e r in te rfa c e a n d s e ttin g it

a s a c tu a l p o s itio n to th e M P .
Base Addr + 0x404 Write REQ APE#0
Table 19: APE request registers
45
Base Addr + 0x404 Read APE D7 APE D6 APE D5 APE D4 APE D3 APE D2 APE D1 APE D0
Base Addr + 0x405 Read APE D15 APE D14 APE D13 APE D12 APE D11 APE D10 APE D9 APE D8
Base Addr + 0x406 Read APE D23 APE D22 APE D21 APE D20 APE D19 APE D18 D17 APE D16
Base Addr + 0x407 Read APE RDY BE OF OS BA PS CE
Table 20: APE Data & Status Registers
T h e fo llo w in g is a b rie f d e s c rip tio n o f th e a b b re v ia tio n s u s e d in T a b le 2 0 .

APE RDY APE ready flag. If READY=1, data and status are valid. If READY=0, data acquiring is in progress.
APE D23 ÷ D0 Multi-turn absolute position encoder data
CE Counter error status
PS Pre-load status
BA Battery alarm
OS Over-speed
OF Over-flow
BE Battery error
T h e s u p p o rte d a b s o lu te p o s itio n e n c o d e rs m u s t b e re s e t if d is c o n n e c te d o r w h e n a n e rro r o c c u rs

(e .g . o v e r-s p e e d a n d o v e r-flo w ). T o re s e t th e e n c o d e r th e R E S c o n tro l b it m u s t b e s e t H IG H (1 )
a n d h e ld in th a t s ta te fo r a t le a s t 4 ÷5 s e c . T o e n a b le th e a b s o lu te p o s itio n e n c o d e rs , R E S s h o u ld
b e k e p t L O W (0 ).
Base Addr + 0xE Write PCS3 PCS2 PCS1 PCS0 RES
Table 21: APE reset control bit
S A 3 5 /5 6 m u lti-tu rn a b s o lu te e n c o d e rs re q u ire a n e x te rn a l b a tte ry b a c k u p to m a in ta in th e a b s o lu te

m o to r p o s itio n w h e n th e m a in p o w e r is o ff. A fu lly c h a rg e d L S -4 2 1 -2 1 1 2 o n -b o a rd b a tte ry is
c a p a b le to p o w e r fo u r S A 3 5 e n c o d e rs fo r a m in im u m o f 1 5 0 h o u rs . D u rin g n o rm a l o p e ra tio n th e
b a tte ry is re c h a rg e d a u to m a tic a lly.
A s a m p le a p p lic a tio n u s in g a b s o lu te p o s itio n e n c o d e rs is s h o w n o n th e fo llo w in g fig u re .
46
A97 2900 1
Figure 22: Multi-turn absolute encoder sample wiring
47
❑
Logosol, Inc.
+M O T0 A
+M O T1 B
+M O T2 C +MO T0 +MO T1 +MO T2 +MO T3
-MO T3
+MO T3
-MO T2
+MO T2
-MO T1
+MO T1
-MO T0
+MO T0
+M O T3 D A B C D
-M O T 0 E
-M O T 1 F
OUT0 H
-M O T 2 J -MO T0 -MO T1 O UT 0 -MO T2 -MO T3
TO MO TO R TER MIN ALS
(BASE MO D ULE ) -M O T 3 K E F H J K
OUT1 L
OUT2 M
OUT3 N O UT 1 O UT 2 O UT 3 O UT 4
OUT4 P
24V
SP S
O PT
O PS
APE RES R L M N P
O UT 7
O UT 6
O UT 5
O UT 4
O UT 3
O UT 2
O UT 1
O UT 0
OUT5 S
OUT6 T
OUT7 U AP ERE S O UT 5 O UT 6 O UT 7 N.C.
W R S T U V
SPS X
TO C N 2 CO NNE C TOR OPS Y SP S O PS O PT
OPT Z
(BASE MO D ULE ) W X Y Z
2x20 F EMAL E
24V
I NTERFACE W IRING
AP E0 AP E1 IN 0/AP E 2 IN 1/AP E 3
1 2 AP E R ES AP E R ES R a b c d
3 4 AP E0 AP E0 a
5 6 AP E1 AP E1 b IN 2 IN 3
Figure 23: Standard Interface Wiring

IN 0/AP E 2 IN 0/AP E 2 c
IN 1/AP E 3 IN 1/AP E 3 d e f
7 8 IN 2 IN 2 e
9 10 IN 3 IN 3 f
IN 4 IN 4 h
IN 4
IN 5 IN 5 j IN 5
11 12 IN 6 IN 6 k h j
13 14 IN 7 IN 7 l
IN 8 IN 8 m
15 16 IN 9 IN 9 n IN 6 IN 7 IN 8 IN 9
IN 10 IN 10 p
IN 11 IN 11 r k l m n
17 18 IN 12 IN 12 s
19 20 IN 13 IN 13 t
IN 14 IN 14 x IN 10 IN 11 IN 12 IN 13
21 22 IN 15 IN 15 y
+9 V +9 V w p r s t
23 24 +9 V +9 V
BAT BAT FF
BAT BAT SHIELD ENC .G N D +9 V IN 14 IN 15
25 26 G ND G ND v u v w x y
27 28 G ND G ND u
B3 B3 JJ
40 C ON DUC TOR RIBBO N C ABL E

29 30 C3 C3 CC C0 C1 C2 C3
C2 C2 BB
A3 A3 NN z AA BB CC
31 32 A2 A2 MM
33 34 B2 B2 HH
B1 B1 EE B0 B1 BAT B2 B3
35 36 C1 C1 AA
C0 C0 z DD EE FF HH JJ
37 38 A1 A1 LL
A0 A0 KK
B0 B0 DD A0 A1 A2 A3
39 40
KK LL MM NN
.
TO C N 101 C O NNEC TO R 5 6 - P IN E L C O C O N N E C T O R
(IN PUT BOA R D)
( F R O N T V IE W )
97 2 9 50 1
c a b lin g (u s e r h a rn e s s ). T h e L S -4 2 1 s ta n d a rd in te rfa c e w irin g is s h o w n b e lo w .
48
Doc. # 710420103
c u s to m iz a tio n to u s e r-d e fin e d in te rfa c e a n d p in o u t, th e in te rfa c e c o n n e c to r is d e s ig n e d a s a
L S -4 2 1 m a y b e e q u ip p e d w ith d iffe re n t in te rfa c e c o n n e c to rs . T o a llo w fa s t a n d e a s y
s e p a ra te m o d u le . It is m o u n te d o n th e fro n t p a n e l a n d is c o n n e c te d to th e c o n tro lle r w ith a s p e c ia l

❑ E XTERNAL P OWER S UPPLY

L S -4 2 1 m o tio n c o n tro lle r re q u ire s tw o e x te rn a l p o w e r s u p p lie s :
• O p e ra tin g p o w e r (2 4 V D C )
• M o to r p o w e r (2 4 ÷8 0 V D C ).
T h e m o to r p o w e r s u p p ly is u s e d to d riv e th e m o to rs o n ly. T h e o p e ra tin g p o w e r s u p p ly is u s e d to

p o w e r th e o n b o a rd in p u t a n d o u tp u t c irc u its a n d , o p tio n a lly, to p o w e r th e s e n s o rs a n d o th e r
c irc u its in th e c o n tro lle d s ys te m .
Caution
M o to r p o w e r s u p p ly s h o u ld b e flo a tin g . T h is is re q u ire d fo r th e p ro p e r o p e ra tio n
o f th e p ro te c tio n c irc u its . If th is re q u ire m e n t is n o t m e t th e L S -4 2 1 c o n tro lle r
a n d /o r th e u s e r e q u ip m e n t m a y b e d a m a g e d w h e n th e m o to r te rm in a ls a re
s h o rte n e d o r w ro n g ly w ire d .
C N 3 c o n n e c to r is th e e n try p o in t fo r th e e x te rn a l p o w e r s u p p lie s . A ls o , th e e m e rg e n c y s to p in p u t
is c o n n e c te d th e re . T h e s c h e m a tic s o f a typ ic a l p o w e r s u p p ly fo r L S -4 2 1 is s h o w n b e lo w .
TO LS -42 1 S E R V O C O N T R O L LE R
(C N 3 C O N N E C TO R )
M O TO R P O W E R
24 - 80 V
M A IN S ZE N E R D IO D E
30 -10 0V / 0 .5W
(O V E R V O LTA G E
S HU T D OW N)
O P E R ATIN G P O W E R
24 V
E M E R G E N C Y S TO P
9 7 2 9 92 0
Figure 24: Typical power supply
49
IV. Basic Control Procedures
T h is s e c tio n s h o w s a lg o rith m flo w c h a rts fo r s o m e c o m m o n c o n tro l p ro c e d u re s :
• B o a rd Id e n tific a tio n
• B o a rd In itia liz a tio n a n d P o w e r O n
• E n a b le A m p lifie rs
• D is a b le A m p lifie rs
• D ia g n o s tic s
50
Board Identification
Start
Extract high ID nibble

(Read Base addr. + 0xC07)
Extract low ID nibble

(Read Base addr. + 0x807)
Form ID number
Validate ID No End
Identif ication error
Yes
Identif ication OK
End
51
Board Initialization and Power On
Start
Yes
RST == 0 MC1401A is already initialized
No
Init ialize MC1401A
No Error initializing MC1401A

Init == OK End
Set RST = 1; SPS = 0
Yes
Deactivate all outputs

APE RES = 0
Disable ADI
Yes Emergency Stop is activated

EMG == 1 or Operation Pow er is missing End
Set SPS = 0
No
Activate SPS
(Set SPS = 0; Set SPS = 1)
Wait 100 mS
Yes Operation Pow er is out of range

OPF == 1 or an output is overloaded End
Set SPS = 0
No
Yes Motor Pow er is out of range

MPF == 1 or there is a leakage End
Set SPS = 0
No
Init ialize w ith def ault values

PCSi = def ault;
Outputs = defaults;
OPT = default;
Current limit[i] = defaults
End
52
Enable Amplifiers
Start
Yes
AE == 1 The amplifiers are already enabled End
No
No
SPS == 1 SPS is not activated End
Yes
OPF == 0 No
& Operating Pow er or Motor Pow er End
are missing
MPF == 0
Yes
Send STOP Command to MC1401A
Yes
Moving axis ? One or more axes are moving End
No
Activate AE
(AE=0; AE=1)
Wait 150 mS
No The amplifier enable failed

AE == 1 End
Run amplifier diagnostic
Yes
Set up Amplifier Disable Interrupt
if proper interrupt handler is installed
(EN ADI = 1)
End
53
Disable Amplifiers
Start
Disable EN ADI
(EN ADI=0)
Deactivate AE
(AE=0)
End
54
Diagnostics
Start
Y es
A E ==1 A mplif ier is enabled End
No
Y es
EMG(L) ==1 Update s tatus: Emergenc y Stop ac tiv ated
No
Ye s
Y es
ST P(L) == 1 Update s tatus: Emergenc y Input ac tiv ated
No E M G ( )L = = 1
Ye s
E m e rg e n yc So
t p p e
r s s d
e En d
Y es
MPF(L) == 1 Update s tatus: Motor Pow er Failure
NoEM GL
( ) = = 1
Ye s
Em re g n
e c y St p
o rp e s e d En d
Y es
OPF(L) == 1 Update s tatus: Operating Pow er Failure
No E M G ( )L = = 1
Ye s
E m e rg e n yc So
t p p e
r s s d
e En d
Y es
CL0 == 1 Update s tatus: A mplif ier c hannel #0 ov erloaded
NoEM GL
( ) = = 1
Ye s
Em re g n
e c y St p
o rp e s e d En d
Y es
No
Y es
No
Y es
No
If no hardw are A mplif ier Dis able reasons
f ound,
amplif ier dis abled by s oftw are.
End
55
V. Appendix A
❑ T ECHNICAL S PECIFICATION
Basic Features
• 4 s e rv o c o n tro lle d m o tio n a x e s
• M o d u la r d e s ig n
• B u s in te rfa c e : IS A
• D S P te c h n o lo g y b a s e d o n P M D M C 1 4 0 1 A c h ip
• ±1 0 -b it P W M @ 2 5 K H z
• S -c u rv e v e lo c ity p ro file
• P ro g ra m m a b le o u tp u t c u rre n t lim it/s h u t d o w n
• Q u a d ra tu re in c re m e n ta l e n c o d e r in te rfa c e (e n c o d e r p o w e r s u p p ly p ro v id e d )
• M u lti-tu rn a b s o lu te p o s itio n e n c o d e r in te rfa c e (p o w e r a n d b a c k u p s u p p ly p ro v id e d )
• A d d itio n a l g e n e ra l p u rp o s e o p to is o la te d in p u ts a n d o u tp u ts
• F le x ib le w irin g
• E m e rg e n c y s to p in p u t
56
Motion Control
Motion Control Characteristics
Motor Output
PWM resolution ±10 bit
PWM switching frequency 25 kHz
min load inductance 200µH
typical motor power supply voltage range 24÷80 VDC
undervoltage shutdown 18 VDC
overvoltage shutdown 100 VDC
max continuous current per channel 8.5A
max short term current per channel (t < 10 sec) 10A
max continuous current per board 16A
programmable current limit for each channel 2-10A
Encoder
type incremental A, B, Z
max pulse frequency 1 MHz
optoisolated encoder inputs 20mA@5V
Digital I/O lines

Digital Inputs and Outputs Characteristics
14 general-purpose optoisolated digital inputs 24V/10mA
/6 of the inputs may serve as high speed position capture strobes/
8 open collector outputs with short circuit protection
max output voltage 48V
max current per output 1A
max current per board 5A
3 relay controlled 24 V power supplies
relay type OMRON G6B
max current 5A/30V DC
contact resistance 30mΩ
mechanical contact reliability 20 x 106
Power Requirements
Power Supply Characteristics
computer power supply +5V ± 5% / 1A
+12V ± 5% /1A
external operating power 24V DC ± 20%
external motor power 24÷80V DC
57
VI. Appendix B: Memory Map
LS-421 is designed as a standard ISA bus peripheral device. To save I/O space, LS-421 uses only 16 bytes from the lowest 1024 I/O
addresses range. The rest of LS-421 registers occupy the space located at offset 0x400, 0x800 and 0xC00. For instance, if LS-421 base
address is set to 0x280, the following I/O address are in use – 0x280÷0x28F, 0x680÷0x68F, 0xA80÷0xA8F, 0xE80÷0xE8F. Eight base
addresses are available, depending on J1 setting – 0x280, 0x1280, 0x2280, 0x3280, 0x2A0, 0x12A0, 0x22A0, 0x32A0. The table below
shows LS-421 registers location relatively to controller base address. The offsets are in hexadecimal notation.
READ WRITE
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
0 MC1401A DATA REGISTER 0 MC1401A DATA REGISTER 0
1 READY 1 MC1401A COMMAND REGISTER 1
2 2 2
3 3 3
4 4 4
5 5 5
6 6 6
7 7 7
A AE RST OPT SPS CL3 CL2 CL1 CL0 A AE RST OPT SPS A
B EMG STP MPF OPF EMGL STPL MPFL OPFL B B
C ADI MPI C ENADI C
D OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0 D OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0 D
E E PCS3 PCS2 PCS1 PCS0 APERES E
F F F
400 400 400

401 401 401
402 402 402
403 403 403
407 APE RDY BE OF OS BA PS CE 407 REQ APE#3 407
40A 40A CURRENT LIMIT #2 (0x0 - 0xF) 40A
40B 40B CURRENT LIMIT #3 (0x0 - 0xF) 40B
40C 40C 40C
40D 40D 40D
40E 40E 40E
40F 40F 40F
807 ID3 = 0 ID2 = 0 ID1 = 0 ID0 = 1 807 807
C07 ID7 = 1 ID6 = 0 ID5 = 1 ID4 = 1 C07 C07
Table 22: LS-421 Memory Map
58
LOGOSOL
Logosol, Inc.
1155 T asman Driv e
Sunny v ale, CA 94089
USA
Document No 710420103
T el: (408) 744 0974 © 1999 Logosol, Inc.
Fax: (408) 744 0977 Printed in USA
Http://www.logosolinc.com

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LOGOSOL

Document No 710420103 / Rev. 1.2 - April, 1999

A ll rig h ts re s e rv e d . N o p a rt o f th is p u b lic a tio n m a y b e re p ro d u c e d , p h o to c o p ie d , s to re d o n

L S -4 2 1 M o tio n C o n tro l B o a rd is a n in te g ra te d p ro d u c t, w h ic h c o m b in e s th re e m a jo r fu n c tio n s in

W e s in c e re ly h o p e th is m a n u a l w ill h e lp yo u q u ic k ly a n d e ffic ie n tly in te g ra te th e b o a rd in to yo u r

Logosol, Inc. Doc. # 710420103

III. HARDWARE REFERENCE.......................................................................................................... 13

IV. BASIC CONTROL PROCEDURES ............................................................................................. 50

Logosol, Inc. Doc. # 710420103

❑ Technical Specification ............................................................................................................ 56

VI. APPENDIX B: MEMORY MAP .................................................................................................... 58

Logosol, Inc. Doc. # 710420103

I. How To Use This Manual

T h is m a n u a l d e s c rib e s L S -4 2 1 m o tio n c o n tro l b o a rd . It is in te n d e d to s e rv e a s a h a rd w a re

• In s ta lla tio n . T h is c h a p te r p re s e n ts th e re q u ire m e n ts to th e h o s t s ys te m a n d a s te p b y s te p

• H a rd w a re R e fe re n c e . It d e s c rib e s th e c o n tro lle r a rc h ite c tu re a n d h a rd w a re fe a tu re s , in c lu d in g

• B a s ic C o n tro l P ro c e d u re s . T h is p a rt p re s e n ts typ ic a l p ro c e d u re s fo r in itia liz a tio n , d ia g n o s tic s

• A p p e n d ix e s p ro v id e a d d itio n a l re fe re n c e in fo rm a tio n . T h e te c h n ic a l s p e c ific a tio n o f th e

Logosol, Inc. Doc. # 710420103

L o g o s o l M o tio n C o n tro l B o a rd L S -4 2 1 is a fle x ib le a u to m a tio n d e v ic e s u ita b le fo r m a n y d iffe re n t

T h e h a rd w a re in s ta lla tio n m a y re q u ire a c e rta in le v e l o f k n o w le d g e o n th e s e rv ic e a n d

If yo u a re n o t fa m ilia r w ith in s ta lla tio n o f e le c tro n ic c o m p o n e n ts s e e k h e lp fro m a c o m p u te r

Logosol, Inc. Doc. # 710420103

• A m in im u m o f 5 1 2 K b yte s c o n v e n tio n a l R A M in s ta lle d

• A c o o lin g fa n w h e n d riv in g h ig h p o w e r m o to rs (h a v in g c o n s u m p tio n g re a te r th a n 3 A @ 4 8 V )

❑ P REPARING THE B OARD

Logosol, Inc. Doc. # 710420103

T a k e a m o m e n t to lo c a te th e ju m p e rs o n th e b o a rd a n d g e t fa m ilia r w ith th e ir s e ttin g , d e s c rib e d

■ BASE I/O ADDRESS

Figure 1: Base I/O Address (J1 jumper block)

■ INTERRUPT REQUEST LINE

T h e re a re fo u r h a rd w a re in te rru p t lin e s to c h o o s e fro m : 7 , 1 0 , 1 2 a n d 1 5 . E a c h L S -4 2 1 b o a rd

Logosol, Inc. Doc. # 710420103

Figure 2: Interrupt line (J2 jumper block)

■ CURRENT LIMIT MODE

SHUT DOWN JUMPER CLOSED

Figure 3: Current Limit Mode (J3 jumper)

Logosol, Inc. Doc. # 710420103

■ SERVO OFF MODE

S M OOT H STO P JUMPER OPEN

Figure 4: Servo Off Mode (J4 jumper)

■ CN3 CONNECTOR (EXTERNAL POWER)

■ FRONT PANEL CONNECTOR

Logosol, Inc. Doc. # 710420103

• T h e c o n tro lle r is in itia liz e d

• S ta tic E le c tric ity P re c a u tio n s . U s e a p ro p e rly g ro u n d e d a n d s ta tic e le c tric ity s a fe w o rk b e n c h

• B o a rd S e tu p . S e le c t th e I/O a d d re s s w ith J 1 ju m p e r b lo c k . O p tio n a lly s e le c t IR Q lin e w ith J 2

Logosol, Inc. Doc. # 710420103

• T e s t th e in s ta lla tio n . S w itc h o n yo u r s ys te m a n d c h e c k w h e th e r o r n o t th e b o a rd in te rfe re s

Logosol, Inc. Doc. # 710420103

III. Hardware Reference

T h is c h a p te r e x p la in s in d e ta il th e h a rd w a re fe a tu re s a v a ila b le in L S -4 2 1 m o tio n c o n tro lle r. T h e

• A rc h ite c tu re O v e rv ie w is a b rie f d e s c rip tio n o f th e c o n tro lle r s tru c tu re a n d fe a tu re s .

• In te rfa c e W irin g g iv e s th e s c h e m a tic s o f th e w irin g , w h ic h c o n n e c ts th e B a s e M o d u le , th e

Logosol, Inc. Doc. # 710420103

T o d e liv e r u ltim a te p e rfo rm a n c e a n d a d a p ta b ility to d iffe re n t a p p lic a tio n s L S -4 2 1 is d e s ig n e d

L S -4 2 1 c o n tro lle r is e q u ip p e d w ith th e fo llo w in g h a rd w a re s a fe ty fe a tu re s :