ECE102P-DIGITAL SYSTEMS DESIGN

LAB-ASSIGNMENT-1

Student Name: DAGUMATI HARSHA VARDHAN

Student ID: 21BCE2879

Lab Slot: L47+L48

Date of Submission: 27/8/2022

 a. Obtain two SOP expressions F and F’ using your registration number. Minimize
using Boolean algebra and verify your results with K-map. Also implement F
and F’ circuit using only two input NAND gates.

b. Obtain two POS expressions F and F’ obtained using your registration number.
Minimize using Boolean algebra and verify your results with K-map. Also
implement F and F’ circuit using only two input NOR gates.

Aim: Optimized Design and Implementation of Combinational

Circuit.

Tools required:
Multisim online / Offline simulator or LTSpice

Functional Expression: 21BCE2879

F(A,B,C,D)= Σm(1,2,7,8,9,B,C,E)= Σm(1,2,7,8,9,11,12,14)

F=A’B’C’D+A’B’CD’+A’BCD+AB’C’D’+AB’C’D+AB’CD+ABC’D’+
ABCD’

F’(A,B,C,D)=Σm(0,3,4,5,6,10,13,15)
F’=A’B’C’D’+A’B’CD+A’BC’D’+A’BC’D+A’BCD’+AB’CD’+ABC’D+
ABCD
Truth Table:

F= Σm(1,2,7,8,9,11,12,14)

A B C D P
0 0 0 0 0 0
1 0 0 0 1 1
2 0 0 1 0 1
3 0 0 1 1 0
4 0 1 0 0 0
5 0 1 0 1 0
6 0 1 1 0 0
7 0 1 1 1 1
8 1 0 0 0 1
9 1 0 0 1 1
10 1 0 1 0 0
11 1 0 1 1 1
12 1 1 0 0 1
13 1 1 0 1 0
14 1 1 1 0 1
15 1 1 1 1 0
Truth Table:

F’=Σm(0,3,4,5,6,10,13,15)

A B C D P
0 0 0 0 0 1
1 0 0 0 1 0
2 0 0 1 0 0
3 0 0 1 1 1
4 0 1 0 0 1
5 0 1 0 1 1
6 0 1 1 0 1
7 0 1 1 1 0
8 1 0 0 0 0
9 1 0 0 1 0
10 1 0 1 0 1
11 1 0 1 1 0
12 1 1 0 0 0
13 1 1 0 1 1
14 1 1 1 0 0
15 1 1 1 1 1
SOP Boolean Expression Simplification using Boolean Laws
F(A,B,C,D)= Σm(1,2,7,8,9,B,C,E)= Σm(1,2,7,8,9,11,12,14)
F=A’B’C’D+A’B’CD’+A’BCD+AB’C’D’+AB’C’D+AB’CD+ABC’D’+
ABCD’

Simplified form of SOP Expression:

F=A’B’CD’+A’BCD+B’C’D+AB’C’+AB’D+ABD’.
F’(A,B,C,D)=Σm(0,3,4,5,6,10,13,15)
F’=A’B’C’D’+A’B’CD+A’BC’D’+A’BC’D+A’BCD’+AB’CD’+ABC’D+
ABCD

Simplified form of SOP Expression:

F’=A’B’CD+AB’CD’+A’C’D’+A’BC’+A’BD’+ABD.
F(A,B,C,D)= Σm(1,2,7,8,9,B,C,E)= Σm(1,2,7,8,9,11,12,14)

Minterms:1,2,7,8,9,11,12,14
Generic :
F=A’B’CD’+A’BCD+B’C’D+AB’C’+AB’D+ABD’.

Karnaugh’s Map:
F’(A,B,C,D)=Σm(0,3,4,5,6,10,13,15)
Minterms:0,3,4,5,6,10,13,15
Generic:
F=A’B’CD+AB’CD’+A’C’D’+A’+BD’+BC’D+ABD.
Karnaugh’s Map:
Circuit Diagram:
SOP
F=A’B’CD’+A’BCD+B’C’D+AB’C’+AB’D+ABD’.

SOP
F=A’B’CD+AB’CD’+A’C’D’+A’+BD’+BC’D+ABD.
Functional Expression:
F(A,B,C,D)= Σm(1,2,7,8,9,B,C,E)= Σm(1,2,7,8,9,11,12,14)
F=A’B’CD’+A’BCD+B’C’D+AB’C’+AB’D+ABD’
POS Boolean simplified Expression:
F=(A+B+C’+D’).(A’+B+C’+D).(A+C+D).(A+B’+C).(A+B’+D)
.(A’+B’+D’)
Karnaugh’s Map:
F’(A,B,C,D)=Σm(0,3,4,5,6,10,13,15)
Minterms:0,3,4,5,6,10,13,15
F=A’B’CD+AB’CD’+A’C’D’+A’+BD’+BC’D+ABD
POS Boolean simplified Expression:
F’=(A+B+C’+D).(A+B’+C’+D’).(B+C+D’).(A’+B+C).(A’+B+D’)
.(A’+B’+D)
Karnaugh’s Map: