MIC ANSWER BANK

2 Mark’s
1 ) State the function of ALE and READY pin of 8086.
Ans: ALE: i) ALE stand for Address Latch Enable.
ii) Pin number 25.
iii) Generates a signal to latch the address into the external latch for stable output.
READY: i) Pin number 29
ii) Indicates the external memory or I/O device is ready to send or receive data.

2 ) State the function of following register of 8086 microprocessor.

Ans: General purpose register:
Function: Used for general data manipulation and storage.
The four genaral purpose 16bit register.
AX (Accumulator): Used for arithmetic and I/O operations.
BX (Base Register): Used as a base pointer for memory access.
CX (Count Register): Used for loop counting and shift/rotate operations.
DX (Data Register): Used in arithmetic operations and I/O operations.

Segment Register:
Function: Holds segment base addresses used to calculate physical addresses.
CS (Code Segment): Holds the base address of the code segment.
DS (Data Segment): Holds the base address of the data segment.
SS (Stack Segment): Holds the base address of the stack segment.
ES (Extra Segment): Used with certain instructions for additional data segment
access.

5 ) Explain features of 8086.

Ans: i) Single+5v power supply
ii) Clock speed range of 5-10 Mhz.
iii) Capable of executing about 0.33 MIPS(million instructions per second)
iv) 16 bit processor are designed to work with 16 bit binary words.
v) Uses separate buses for address and data .
vi) It has 16-bit general-purpose registers (AX, BX, CX, DX) and 16-bit segment
registers (CS, DS, SS, ES).
3 ) Write program development steps.
Ans: Define Problem: Clearly understand the problem.
Logic Representation: Create algorithm (text) and flowchart (graph) to represent the
program’s logic.
Initialization: Prepare a checklist for necessary initializations.
Coding: Write code using correct instructions.
Conversion: If needed, convert algorithm to assembly language.

14 ) Explain physical address.

Ans: In the 8086 microprocessor, a physical address is a 20-bit address formed by combining
a 16-bit segment address with a 16-bit offset address, allowing access to up to 1 MB of
memory.
4marks ))))

6 ) Explain architecture of 8086. (

Bus Interface Unit (BIU):

• Responsible for fetching instructions and data from memory.
• Contains the instruction queue, which stores prefetched instructions.
• Generates physical addresses using segment registers and offsets.

Execution Unit (EU):

• Performs actual execution of instructions fetched by the BIU.
• Contains general-purpose registers (AX, BX, CX, DX) and segment registers (CS,
DS, SS, ES).
• Includes the arithmetic and logic unit (ALU) for performing arithmetic and logical
operations.
Components:
Registers: AX, BX, CX, DX (general-purpose), CS, DS, SS, ES (segment).
Memory Segmentation: Divides memory into segments.
Instruction Pointer (IP): Points to the next instruction.
Flags Register: Contains status flags.
Interrupts: Supports hardware and software interrupts.

9 ) What is pipeline? How it improves the processing speed.

Ans: A pipeline is a technique in processors where instructions are broken down into stages,
allowing multiple instructions to be processed simultaneously, improving performance.

Pipelining improves processing speed by allowing multiple instructions to be processed

simultaneously in different stages, reducing instruction latency, improving resource
utilization, and enabling higher clock frequencies.
This improves overall speed of the processor
10 ) Concept of memory segmentation and address generation.
Ans:
Memory Segmentation:
In 8086 available memory space is 1MByte.
This memory is divided into different logical segments and each segment has its own base
address and size of 64 KB.
It can be addressed by one of the segment registers.
There are four segments.

Address Generation:
To generate a physical address, the 8086 combines the base address of the segmentwith an
offset address.
The offset address is provided by the instruction being executed.
The physical address is calculated as follows: Physical Address = Base Address of Segment
+ Offset Address.

12 ) Explain the Assembler directive.

SEGMENT:
The SEGMENT directive marks the start of a logical segment in the program. It is followed
by the name of the segment. For example, CODE SEGMENT indicates the start of a logical
segment named CODE. SEGMENT and ENDS directives are used to define and delimit
logical segments in the program.
EQU:
EQU is used to assign a name to a value or symbol. Whenever the assembler encounters the
specified name in the program, it replaces the name with the value or symbol equated to it.
This allows for defining constants and symbolic names for memory addresses or values in the
program.
ASSUME:
ASSUME informs the assembler about the names chosen for Code, Data, Extra, and Stack
segments. It specifies which segment registers (CS, DS, SS, ES) should be initialized with the
addresses allotted by the loader to the corresponding labels.
OFFSET:
OFFSET is an operator that tells the assembler to calculate the offset or displacement of a
named data item or procedure from the start of the segment containing it. It helps in
determining the memory location of variables or procedures within a segment.
13 ) Explain the following assembler directive.
i)DB:
Syntax: DB value1 [, value2, …]
Description: Defines one or more byte-sized (8-bit) data elements. Each value can be a
number , character, or symbol.
Example: DB 10, 0xFF, ‘A’, variable
ii)DW:
Syntax: DW value1 [, value2, …]
Description: Defines one or more word-sized (16-bit) data elements. Each value can be a
number or symbol.
Example: DW 100, 0xABCD, variable
iii)DD:
Syntax: DD value1 [, value2, …]
Description: Defines one or more doubleword-sized (32-bit) data elements. Each value can be
a number or symbol.
Example: DD 1000, 0xFFFFFFFF, variable
iv)DQ:
Syntax: DQ value1 [, value2, …]
Description: Defines one or more quadword-sized (64-bit) data elements. Each value can be a
number or symbol.
Example: DQ 1000000, 0xFFFFFFFFFFFFFFFF, variable

Optional)))))))))))))

7 ) Explain flag register.

Ans: flag register, is a special-purpose register in the 8086 microprocessor that contains
various status flags. These flags indicate the status of the processor after an arithmetic or
logical operation.

Type of flag register:

Carry Flag (CF): Indicates if there was a carry-out or borrow in arithmetic operations.

Parity Flag (PF): Indicates if the number of set bits in the result is even.

Auxiliary Carry Flag (AF): Indicates a carry-out or borrow in the lower 4 bits of a byte.

Zero Flag (ZF): Indicates if the result of an operation is zero.

Sign Flag (SF): Indicates the sign of the result (negative or non-negative).

Overflow Flag (OF): Indicates if the result of a signed operation is too large or too small.