Digital Electronics @ JU 2022-2023-3

HomeWork #2
5 Pages Max., and font size=12 – Softcopy and Hardcopy

Deadline: Thursday 24/8/2023

Name (‫)بالعربي‬ ID # ‫الرقم التسلسلي‬ Submission Date Grade /5

‫كاتيا محمد اسماعيل‬ 24 / 8
Student 0204034
‫عبد الوهاب‬
P1. (0.5-point) In your own words, what are the big differences between the ASIC and FPGA Designs?
Which one to choose when you are going to design a CPU? Make a Table for comparison.
FPGA ASIC
configurability easily reconfigurable with not reconfigurable , the
different designs circuitry is permanent
barrier for entry low barrier for entry — no high barrier for entry in terms
costly production tooling is of costs and learning curve
required
power consumption requires a lot of power in order far more power efficient — and
to function power consumption can be
closely controlled
high-volume mass not suited for high-volume suited for high-volume mass
mass production production
production
design flexibility limited design flexibility capable of implementing both
(analog design isn’t possible, analog and digital
for example) functionalities
update flexibility ideal for applications in which not ideal for applications in
occasional updates or upgrades which the design might need to
are required be updated later on
Performance Medium High

Design Flow Complex

Simple

Simple
High Low

P2. (0.5-point) Draw a flowchart for the design flow in VLSI.

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P3. (0.5-point) What is the most advanced Technology node for 2023? And how is it related to
Moore’s law?

What is the Moore's law theory?

The observation that the number of transistors on computer chips doubles approximately
every two years is known as Moore's Law. Moore's Law is not a law of nature, but an
observation of a long-term trend in how technology is changing. The law was first
described by Gordon E. Moore, the co-founder of Intel, in 1965

The most important Advanced Technology Trend for 2023 is the prominence of Artificial
Intelligence (AI) and AI-based solutions. It is crucial to keep both automation and safety in
mind while organising the activities of the organisation in the future.

The next wave of Moore’s Law will rely on a developing concept called system technology co-
optimization, said Ann B. Kelleher, general manager of technology development at Intel in an
interview with IEEE Spectrum ahead of her plenary talk at the 2022 IEEE Electron Device
Meeting (IEDM).

More efficient power technologies are advancing through the world’s first integration of
GaN-based power switches with silicon-based CMOS on a 300 mm wafer. This sets the stage
for low-loss, high-speed power delivery to CPUs while simultaneously reducing motherboard
components and space.

P4. (0.5-point) What is the meaning of fabless company? Give names for giant electronics fabless
companies.

The term “fabless company” refers to a company that designs and markets hardware while
outsourcing the manufacturing of that hardware to a third-party partner. The term is commonly used
in relation to advanced chip designers, who hold the intellectual property (IP) for the chips they sell.
Who is the father of the fabless industry?
Morris Chang with the founding of Taiwan Semiconductor Manufacturing Corporation (TSMC).
Foundries became the cornerstone of the fabless model, providing a non-competitive manufacturing
partner for fabless companies. The co-founders of the first fabless semiconductor company, LSI
Computer Systems, Inc.

Which is the largest fabless company?

Let's have a look at some of the biggest fabless companies in the country and
see how they operate.

• Qualcomm : Qualcomm is one of the world's leading fabless semiconductor

companies.
• Broadcom

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 • Apple.
• MediaTek.
• Nvidia.

P5. (0.5-point) Could you please provide information about EDA companies? Identify the top
five global companies in this field, including their logos adjacent to their names, along with
pertinent details about each of them. Make a Table.

Definition

Electronic Design Automation, or EDA, is a market segment consisting of software, hardware, and
services with the collective goal of assisting in the definition, planning, design, implementation,
verification, and subsequent manufacturing of semiconductor devices, or chips. Regarding the
manufacturing of these devices, the primary providers of this service are semiconductor foundries, or
fabs. These highly complex and costly facilities are either owned and operated by large, vertically
integrated semiconductor companies or operated as independent, “pure-play” manufacturing service
providers. This latter category has become the dominate business model.

Cadence :

Cadence is a pivotal leader in electronic

systems design, building upon more than 30
years of computational software expertise. The
company applies its underlying Intelligent
System Design strategy to deliver software,
hardware, and IP that turn design concepts
into reality.

Synopsys :

is an American electronic design automation

(EDA) company headquartered in Sunnyvale,
California, that focuses on silicon design and
verification, silicon intellectual property and
software security and quality. Synopsys supplies
tools and services to the semiconductor design
and manufacturing industry.

Ansys, Inc. :

is an American multinational company with its

headquarters based in Canonsburg,
Pennsylvania. It develops and markets
CAE/multiphysics engineering simulation
software for product design, testing and
operation and offers its products and services to
customers worldwide.

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 Siemens AG :
(German pronunciation: is a German
multinational technology conglomerate. Its
operations encompass automation and
digitalization in the process and manufacturing
industries, intelligent infrastructure for buildings
and distributed energy systems, rail transport
solutions, as well as health technology and digital
healthcare services. Siemens is the largest
industrial manufacturing company in Europe,and
holds the position of global market leader in
industrial automation and industrial software.
Mentor Graphics :
Corporation was a US-based electronic design
automation (EDA) multinational corporation for
electrical engineering and electronics,
headquartered in Wilsonville, Oregon. Founded
in 1981, the company distributed products that
assist in electronic design automation,
simulation tools for analog mixed-signal design,
VPN solutions, and fluid dynamics and heat
transfer tools. The company leveraged Apollo
Computer workstations to differentiate itself
within the computer-aided engineering (CAE)
market with its software and hardware.

P6. (0.5-point) Name the most essential EDA tools for VLSI Digital IC Design. (Please use the VLSI
design flow from the Problem P2 above)
EDA tools are a suite of electronic design automation software designed to help integrated circuit
design engineers, hardware engineers and layout engineers, design and develop electronics circuits at
a nanoscopic scale.
EDA software solutions are provided by major companies and of course there are industry standards
that the majority of the market will utilize depending on the foundry of choice (for example: TSMC,
SMIC, GlobalFoundries, and Samsung).
Specification and High-Level Design:

MATLAB or Python: Used for algorithm development and high-level modeling.

SystemVerilog or VHDL: Hardware description languages for specifying the behavior of the design.
RTL Design:

RTL Synthesis Tool (e.g., Design Compiler, Yosys): Converts RTL (Register Transfer Level) code into
gate-level netlists.
Logic Design:

Logic Synthesis Tool: Translates RTL description into a gate-level representation, optimizing for area,
power, and timing.
Cell Libraries: Pre-characterized logic cells for various functions.
Floorplanning and Placement:

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Floorplanning Tool (e.g., Innovus, ICC): Determines the overall chip layout and positioning of major
blocks.
Placement Tool: Places the logic cells onto the chip, considering optimization objectives.
Clock Tree Synthesis:

Clock Tree Synthesis Tool: Generates a clock distribution network to deliver clock signals to all parts
of the chip evenly and with minimal skew.
Routing:

Global Routing Tool: Defines the paths that interconnect various blocks, considering metal layers and
routing resources.
Detailed Routing Tool: Optimizes the routing on individual metal layers, considering timing,
congestion, and manufacturability.
Physical Verification:

Design Rule Checker (DRC) Tool: Ensures the layout adheres to manufacturing rules.
Layout vs. Schematic (LVS) Tool: Compares the layout against the schematic to verify correctness.
Extraction and Parasitic Analysis:

Extraction Tool: Extracts parasitic capacitance and resistance information for accurate timing analysis.
Parasitic Extraction Tool: Estimates the impact of parasitic elements on circuit behavior.

Here is a list of free and open source EDA tools available on the market today:
Alliance Electric Glade Magic OpenRAM Ngspice Oregano Yosys

P7. (0.5-point) What is TSMC? Compare it with Intel and SAMSUNG.

Intel is seeing delays after delays and raising prices in a deteriorating PC market, where AMD
continues to take share by leveraging TSMC's production capabilities.
Samsung is the first to produce the 3nm process using the latest transistor architecture, but
production yield remains a major question for potential customers.
TSMC continues to be the dominant player with the best execution and a potential 100% market
share in N3.
At the leading edge, TSMC is the clear leader, while Samsung is a "show me" story, and Intel needs a
miracle.

In June 2022, Samsung was the

first to mass produce the 3nm
process, followed by TSMC's N3
production ramp in 4Q22. Intel 4
(equivalent to TSMC's N5/N4) will
be Intel's first process node to
utilize ASML's EUV technology,
with the 14th-generation Meteor
Lake CPU expected to launch in
2023.
Intel: Delays after Delays
Intel was once a dominant force in the semiconductor space with more than 80% of the PC CPU
market. But the chip giant has been struggling to keep up with Moore's law with consistent delays
that have given its biggest competitor, Advanced Micro Devices (AMD), a significant advantage. The
company spent 7 years at the 14nm process, and did not start producing 10nm (equivalent to TSMC's

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7nm) until 2019. The 10nm process node was supposed to launch in 2017, or 2 years ahead of AMD's
Zen 2 on TSMC's N7.
Samsung: The Runner-Up
Samsung has ambitions to be the leader in the foundry business given it was the first in the industry
to adopt the EUV tool and to produce 3nm using the GAA transistor architecture. Production for the
1st-gen 3nm GAA began in June 2022, with the 2nd-gen 3nm GAA expected to ramp in 2024. TSMC,
on the other hand, will stay with the FinFET architecture for its 3nm process.
TSMC: The Undisputed King
TSMC is the undisputed leader in the foundry race with a 56% market share (as of 2Q22) and
85%/90% share in 7nm/5nm. In the most recent earnings call (analysis here), management noted the
3nm process is on track for mass production in 4Q22, with revenue contribution in 2023. As is the
case with any new technology, N3 will impact 2023 gross margin by 2-3 points due to initially higher
depreciation expenses. Nevertheless, TSMC is very well-positioned to have a monopoly in the 3nm
process, should Samsung continue to experience trouble.
P8. (0.5-point) In terms of attributes such as speed, power consumption, efficiency, and scalability,
how does Analog compare to Digital technology?? You need to support your answer with examples
Speed:
Analog: Analog systems can process continuous signals, making them well-suited for tasks that
require real-time processing, like audio and video applications. For instance, analog audio amplifiers
can reproduce smooth sound waves with minimal delay.
Digital: Digital systems use discrete values and can process data faster than analog systems for
complex calculations and tasks. Digital signal processors (DSPs) can perform rapid mathematical
operations, enabling applications like high-speed communication and digital image processing.
Power Consumption:
Analog: Analog systems are generally more power-efficient for simple tasks that involve continuous
signals. However, they can become inefficient when processing complex or large datasets due to
inherent noise and signal degradation issues.
Digital: Digital systems are more power-efficient for complex computations and data storage. They
can apply error correction techniques and operate reliably even in the presence of noise, making
them suitable for energy-efficient digital communication systems and memory storage devices.
Efficiency:
Analog: Analog systems can be very efficient for tasks that involve capturing and processing real-
world phenomena directly, such as temperature measurement using analog sensors.
Digital: Digital systems excel in maintaining accuracy and fidelity over long distances and through
various signal degradations. For instance, digital audio can be transmitted over long distances without
significant loss of quality, thanks to error correction techniques.
Scalability:
Analog: Analog systems can become challenging to scale due to the potential degradation of signal
quality and the need for specialized components. For example, analog voltage amplification might
introduce noise that limits the scalability of analog amplifiers.
Digital: Digital systems are highly scalable due to their discrete nature. They can be easily replicated,
and advancements in integrated circuit technology have led to higher density and smaller form
factors for digital components. This scalability is evident in the growth of computing power and
memory storage capacities.

Speed: An analog radio can tune in to real-time broadcasts with minimal delay, while a digital radio
can process and decode various channels rapidly, enabling features like station presets and dynamic
data displays.

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Power Consumption: An analog thermostat relies on simple analog components to control
temperature, consuming low power. In contrast, a smart digital thermostat can analyze temperature
patterns, integrate with other systems, and optimize energy usage, but it consumes more power due
to its digital processing capabilities.

Efficiency: Analog cameras can capture light directly on photosensitive film, allowing for efficient and
continuous recording of scenes. Digital cameras convert light into discrete pixels, which can be
efficiently stored, edited, and transmitted.

Scalability: Analog audio mixing consoles require physical adjustments for each channel, limiting
scalability. Digital audio mixing consoles can handle numerous channels, and their configurations can
be saved and recalled instantly.
P9. (0.5-point) State all what you know about “Three-dimensional integrated circuit”, you need to use
some figures, illustrations, images, facts, history with your answer.
A Three-Dimensional Integrated Circuit (3D IC) is an advanced semiconductor technology that involves
stacking multiple layers of integrated circuits (ICs) on top of each other to create a compact and
efficient design. This technology aims to address some of the limitations of traditional 2D ICs, such as
interconnect delays, power consumption, and size constraints. Here's a comprehensive overview of
3D ICs:
1. Concept and Structure:
A 3D IC involves vertically stacking multiple IC layers, often connected through specialized vertical
interconnects (VIA) that provide communication between the layers. This stacking can be achieved
using different methods, such as through-silicon vias (TSVs), microbumps, and wire bonding. TSVs are
small vertical connections passing through the silicon substrate, enabling communication between
different layers.
2. Advantages:
Performance: Shorter interconnects in 3D ICs reduce signal propagation delays, leading to higher data
transfer rates and improved overall performance.
Power Efficiency: Reduced interconnect length also results in lower power consumption, as power
dissipation is often higher in long interconnects.
Size and Form Factor: 3D stacking enables higher device density in a smaller footprint, which is crucial
for modern portable devices.
3. History and Evolution:
The concept of 3D integration dates back to the 1960s, but it gained significant attention in the 2000s
due to the limitations of Moore's Law and the increasing demand for performance.
Early implementations included simple integration of two ICs using wire bonding or flip-chip
technology.
4. Challenges:
Thermal Management: With higher device density, heat dissipation becomes a challenge. Efficient
thermal management solutions are crucial.
Manufacturing Complexity: Fabricating 3D ICs involves precise alignment of layers and sophisticated
processes for creating TSVs or microbumps.
Cost: The manufacturing complexity and yield issues can lead to higher production costs compared to
traditional 2D ICs.
5. Applications:
High-Performance Computing: 3D ICs are used in supercomputers and data centers to enhance
processing power and reduce power consumption.
Mobile Devices: The small form factor and improved efficiency of 3D ICs make them suitable for
smartphones, tablets, and wearables.

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Networking: 3D ICs can enhance network equipment's processing capabilities, enabling faster data
processing.
Automotive: The compact nature of 3D ICs is beneficial for the space-constrained automotive
environment.

P10. (0.5-point) Do you agree or disagree with the notion that microlithography serves as the limiting
factor in integrated circuit fabrication technology?

I agree with the notion that microlithography has been a significant limiting factor in integrated circuit
(IC) fabrication technology, especially as semiconductor technology has continued to advance.
Microlithography is the process of transferring patterns onto a substrate, such as a silicon wafer,
using light or other forms of radiation. It plays a crucial role in defining the features and dimensions of
transistors, interconnects, and other components on a chip.

Here are some reasons why microlithography can be considered a limiting factor:
Miniaturization and Feature Size , Complexity and Costs , Transition to New Technologies , Yield and
Defects , Physical and Engineering Limits , Research and Innovation .

In recent years, advancements like EUV lithography have provided a way to extend lithography's
capabilities and enable further miniaturization. However, the challenges associated with pushing the
boundaries of microlithography remain, and alternative approaches to computing, such as quantum
computing and novel materials, are being explored to address these challenges and ensure continued
progress in integrated circuit fabrication technology.

Sources and References

[1] https://seekingalpha.com/article/4549486-taiwan-semiconductor-vs-samsung-vs-intel-battle-
at-the-leading-edge
[2] https://www.granitefirm.com/blog/us/2021/12/28/tsmc-process-roadmap/
[3] https://www.randstadusa.com/business/business-insights/news/fpga-vs-asic-similarities-
differences-whats-next/
[4] https://www.intel.com/content/www/us/en/newsroom/news/intel-components-research-
looks-beyond-2025.html#gs.4tmazd

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[5] https://www.asicnorth.com/blog/asic-vs-fpga-difference/