ECE487/587 Embedded Systems Laboratory

Lab 1: Introduction to NIOS II Embedded Systems Programming

1. INTRODUCTION

The purpose of this laboratory is to introduce the student to basic NIOS II embedded systems
programming concepts. These concepts include access and test of multiple memory types, low-level
I/O operations, timer functions, and standard C library I/O functions.

In this lab you will use the NIOS II software build tool to design and test multiple C functions for
testing memory, timing functions, and performing low-level hardware abstraction level (HAL) I/O
to basic I/O devices. The requirements for this lab consist of completing the C functions, test and

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debug of all programs, printing source files and execution results, and completing the laboratory
report.

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2. NIOS II SYSTEM DETAILS

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For this laboratory you will use a prebuilt NIOS II system. The two files defining the system are located at
http://jjackson.eng.ua.edu/courses/ece486/assignments/. The ece487_lab1.sof file contains the NIOS II
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system to be downloaded to the NIOS II embedded development kit and the ece487_lab1.sopcinfo file
contains the NIOS II system information necessary to build the software designs. The prebuilt NIOS II
system contains SRAM, DRAM, FLASH, and ONCHIP memories. The system has a 4K instruction
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cache and no data cache so all data read/writes will come from the accessed memory. The address
range for these memories as well as a partial list of other components in the system is given in Table
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1 below.
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Table 1. NIOS II System Address Space for Memories and Selected Peripherals.
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Memory Address Base/Range

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FLASH (ext_flash) 0x00000000-0x00ffffff

SRAM (ext_ssram) 0x01000000-0x010fffff
ONCHIP RAM (onchip_ram) 0x01102000-0x01102fff
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DRAM (altmemddr) 0x04000000-0x05ffffff

SYS_CLK_TIMER_BASE 0x06000000
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HIGH_RES_TIMER_BASE 0x06000020
BUTTON_IO_BASE 0x06000060
LED_IO_BASE 0x06000070
JTAG_UART_BASE 0x06000080

Names given in parentheses are the names of the components with the NIOS II system and should
be reflected within the system.h file when the NIOS II board support package (BSP) is built. The
default memory for all code, data, and stack in this system is DRAM.

3. LABORATORY DESIGNS

3.1 Memory Test Design

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Within the NIOS II SBT, create a NIOS II BSP project and application project using the
ece487_lab1.sopcinfo file as a basis for the project. The NIOS II application project should contain a
single C program for testing the SRAM, ONCHIP RAM and DRAM. The program should include
three functions: test_sram(), test_onchip_ram(), and test_dram(). Each function
should test each memory by first writing 0x00000000 to each test location, read back all values from
each test and compare against an expected value. The function should then repeat the test operation
with test values 0xffffffff, 0xaaaaaaaa, and 0x55555555. The entire address range for the SRAM and
ONCHIP RAM should be tested. A 1MB address range for the DRAM should be tested. Use a high
resolution timer to report the number of clock ticks and absolute time required for each memory
test function.

In testing the SRAM and ONCHIP RAM, a pointer must be created to explicitly point to the
beginning of the appropriate address space since default memory accesses for data reads and writes

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would be to the DRAM (i.e. the compiler will locate any variable or array declared within the
program in DRAM by default). A code fragment for accessing memory in a specific range of
locations is given as:

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alt_u32 *buffer = (alt_u32 *) base_address_of_memory_to_access;

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/* Write data to memory */
for( i = 0; i < number_of_words_to_write; i++ ) {
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buffer[i] = value_to_write;
}
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Download the NIOS II design contained in ece487_lab1.sof to the Cyclone III device on the NIOS
II embedded development board. Download the application project to the NIOS II development
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board and test.

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Download and execute your program a total of five times and report all execution time data
collected in your laboratory report. Include a discussion of the collected data noting differences, if
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any, between various executions.

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3.2 Memory Test Design with Execution from SRAM

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The default code execution for the provided NIOS II system is from DRAM. This default can be
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changed using the BSP editor tool. Within the BSP editor the Linker Script tab allows the user to
select different defined memories for various purposes. The default values for this project are given
in Table 2 below.

Table 2. Linker Sections, Common Usage and Project Default Memory Devices.

Linker Section Common Use Linker Region Memory Device

Name Name Name
.bss Statically declared altmemddr altmemddr
variables
.heap heap space altmemddr altmemddr
.rodata Read only data altmemddr altmemddr
.rwdata Read/write data altmemddr altmemddr
.stack Stack space altmemddr altmemddr
.text Code altmemddr altmemddr

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Using the BSP Editor, change all Linker Region Names to the SRAM memory. Using the project
code from section 3.1 regenerate the BSP from within the BSP editor, rebuild the BSP project,
rebuild the application project and re-execute the program on the NIOS II embedded development
board. Note how memory accesses are performed for each memory may need to change and that
the entire SRAM address space cannot be tested as before since it should now contain code to be
executed.

Download the NIOS II design contained in ece487_lab1.sof to the Cyclone III device on the NIOS
II embedded development board. Download the application project to the NIOS II development
board and test.

Download and execute your program a total of five times and report all execution time data

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collected in your laboratory report. Include a discussion of the collected data noting differences, if
any, between various executions.

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3.3 Low Level Device I/O and Timer Alarms

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Within the NIOS II SBT, create a NIOS II BSP project and application project using the
ece487_lab1.sopcinfo file as a basis for the project. The NIOS II application project should contain a
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single C program for low level register reads from the PUSHBUTTON parallel I/O (PIO) device
and low level register writes to the LED PIO device. Your program must read the PUSHBUTTON
PIO device and use that input to control an alarm function. The value input from the low two bits
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of the PUSHBUTTON PIO device is to control the rate at which the alarm function is to execute.
The rates to be supported are given in Table 2 below.
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Table 3. PUSHBUTTON PIO Values and Corresponding Alarm Rate.

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PB1 PB0 Alarm Rate

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NOT PRESSED NOT PRESSED 5.0 sec

NOT PRESSED PRESSED 1.0 sec
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PRESSED NOT PRESSED 0.5 sec

PRESSED PRESSED 0.1 sec
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The value of PB2 is to control a value written to the LED PIO for each execution of the alarm
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function. If PB2 is not pressed, the current LED PIO value is to be incremented for each alarm
function execution. If PB2 is pressed, the current value of the LED PIO is to be decremented. If
PB3 is pressed, a value of 0x0 is to be written to the LED PIO. For this project you are also to use a
high resolution timer to measure the time taken from just before reading the PUSHBUTTON PIO
until just after writing and updated value to the LED PIO. This time, in clock ticks and absolute
time, should be continuously output to stdout using an appropriate printf() statement.

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 Instructions for Preparing Laboratory Reports

1. Your lab report should consist of the following:

a) Cover Sheet
b) Abstract
f) Body of the Report (in appropriately named sections)
g) References
h) Appendices (lengthy code, multipage timing diagrams, etc.)

2. Cover Sheet: The cover sheet should follow the format of the sample cover sheet that is
attached.
3. Abstract: The abstract is a brief (50-150 words) summary of your report. The project goals,

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major results, and/or conclusions should be stated in the abstract. The abstract should occupy a
single page with the centered title, "ABSTRACT".
4. Body of the Report: The body of the report should begin with an INTRODUCTION and end

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with a CONCLUSIONS section. The remainder of the report should be divided into several
named sections as appropriate. You should have sections titled according to what is described in

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that section. Note: You should never have a section titled “Body of the Report”.
5. References: As appropriate, include a list of reference material used in preparing your report.
References should be listed in the order they were cited in the report and should be in standard
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IEEE format (see the IEEE Information for Authors document on the course website). The
Preparation of Papers for IEEE TRANSACTIONS and JOURNALS document on the course
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website also provides good examples. The references should occupy a one or more separate
pages with the centered title "REFERENCES". References that do not follow these
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conventions will be graded as completely incorrect.

6. Appendices: Diagrams, programs, tabular data, etc. may be included as appendices or may be
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contained within the body of the report. Any data or program that spans more than one page
should be included in an appendix. Construct multiple, titled and lettered appendices as
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appropriate, e.g. Appendix A – C Source Code for a Memory System Test, etc.
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7. Figures: Figures should be legible and have an appropriate figure number and caption. The
IEEE Information for Authors document on the course website is the source for describing proper
formatting and referencing of figures. Figures that do not follow these conventions or are
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unreadable will be graded as completely incorrect.

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8. All pages are to be numbered with the exception of the cover sheet and abstract page.
9. All reports must be typed and printed on a quality printer.
10. All reports should be stapled or placed in a binder and not folded when submitted.
11. All reports should be free of grammatical and typographical errors. Use an appropriate word
processor with spell and grammar check capabilities.
12. All reports are to be double-spaced with appropriate margins (one inch on all sides).

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 Title

First Laboratory Report for ECE487

Embedded Systems

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Submitted by
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Name
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Student number
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Department of Electrical & Computer Engineering

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The University of Alabama

Tuscaloosa, Alabama 35487

Date

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