IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO.
9, SEPTEMBER 2020
A Wireless EV Charging Topology With
Integrated Energy Storage
Steven Ruddell , Udaya K. Madawala, Fellow, IEEE, and Duleepa J. Thrimawithana, Member, IEEE
Abstract—This article presents a wireless power transfer topol-
ogy based on inductive power transfer (IPT) with integrated super-
capacitor (SC) energy storage. The proposed topology is suitable for
dynamic charging of electric vehicles (EVs), where pulses of energy
must be processed without placing excessive strain on the utility
grid or the EV battery. This topology extends the functionality
of a typical LCL-tuned bidirectional IPT system by adding the
ability to store energy in an SC in a controlled manner. Operation
of the system is described in terms of the switching patterns and
control variables required to transfer energy between the input,
output, and the SCs. A mathematical model that predicts the overall
transfer of power between the input, output, and SCs is presented
along with experimental results at a nominal power level of 3.8 kW
to validate the model and the topology under a variety of typical
operating conditions.
Index Terms—Capacitive energy storage, power electronics,
vehicles.
I. INTRODUCTION
YNAMIC charging of electric vehicles (EVs) by wireless
D power transfer (WPT) is a key emerging technology in the
field of power electronics [2]–[4]. By reducing the requirement
for all of the energy required for a journey on board the vehicle,
the size of the main storage battery can be reduced [5], signif-
icantly reducing cost, weight, and use of rare earth elements.
In a typical dynamic charging system, coils embedded in the
roadway, referred to as primary pads, are energized sequentially
as a vehicle mounted coil moves over them [6], [7]. Magnetic
coupling between the coils allows power to be transferred to
the EV. It has been previously demonstrated that a series of
discrete coils is more practically feasible than a single contin-
uous track found in other WPT systems [8]. In a typical WPT
charging system, a grid supplied primary pad wirelessly transfers
energy to a pad mounted underneath an EV through magnetic
(inductive) coupling [9], [10]. The ground pad array must be
energized selectively in sections that are smaller than the overall
dimensions of the vehicles travelling over them, as otherwise the
Manuscript received September 20, 2019; revised December 9, 2019; accepted
January 8, 2020. Date of publication January 23, 2020; date of current version
May 1, 2020. This paper was presented in part at the 2017 IEEE Southern Power
Electronics Conference, December 2017 [1]. Recommended for publication by
Associate Editor D. Qiu. (Corresponding author: Steven Ruddell.)
The authors are with the Department of Electrical and Computer Engineering,
The University of Auckland, Auckland 1010, New Zealand (e-mail: srud011@
aucklanduni.ac.nz; u.madawala@auckland.ac.nz; d.thrimawithana@auckland.
ac.nz).
Color versions of one or more of the figures in this article are available online
at https://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPEL.2020.2969027
0885-8993 © 2020 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See https://www.ieee.org/publications/rights/index.html for more information.
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8965
stray magnetic flux would exceed the International Commission
on Non-Ionizing Radiation Protection guidelines, which state a
maximum exposure to the general public of 27 μT, at a standard
inductive power transfer (IPT) operating frequency of 85 kHz
[11], [12]. Several significant challenges exist in implement-
ing dynamic charging in practical systems [6], [13], [14]. The
discontinuous power transfer results in very high power pulses
that must be processed by the power electronics system of the
EV. Feeding the high current pulse directly into the EV battery
results in excessive heating and degrades the battery [15]. As
the overall purpose of dynamic charging is to allow smaller
battery packs with correspondingly lower maximum charge
power ratings, the incoming burst of energy must be stored
by another means [16]. Short-term, high power density energy
storage based on supercapacitors (SCs) has been proposed for
dynamic charging applications [17]. Direct connection of the SC
to the EV dc bus has the advantage of simplicity and robustness,
but results in poor utilization of the energy storage capability
of the SC due to the limited voltage swing [17], [18]. Use of a
dedicated dc–dc converter to interface the SC to the EV dc bus
offers good utilization and controllability at the expense of cost,
complexity, and increased component count [18]–[20]. Use of an
energy buffer on the primary side of a charging system reduces
the peak demand on the grid and also helps to improve the power
factor [21]. Multiport dc–dc converters have been developed
to interface the EV dc bus, a hydrogen fuel cell, and another
high power density energy storage element such as an SC or a
flywheel [20]. The energy storage requirement for a dynamic
charging system depends primarily on the power required by
the traction system of the EV and the rate of charging [22].
Differences in power levels over a large time scale can be handled
by the EV battery, whereas short duration power differences,
prevalent in pulsed charging, are best processed by an additional
energy storage with high power density [23]. Energy storage
devices such as flywheels have been developed for light rail
applications, but they are unsuitable for automotive applications
at their current level of development [24]. A bank of SCs,
operating as an energy buffer, is widely accepted solution to
the problem of processing very high energy pulses encountered
in dynamic charging of EVs [23]. However, the SC voltage is
not directly compatible with the traction system of the EV and,
hence, the SC buffer is usually integrated to the EV using a
dedicated converter stage, compromising the efficiency, cost,
size, and reliability of the overall charging system [5], [19], [20].
A topology has been developed that allows energy storage in an
SC combined with an IPT system in a single converter. However,
 8966
Fig. 1. Block diagram of the proposed topology.
the SC current is forced to flow through the IPT pad, resulting in
increased losses [25]. Another approach is to split the two sides
of the H-bridge into half bridges to allow separate control of
their dc bus voltages, allowing for power factor correction [26].
This article proposes a novel converter topology that combines
WPT- and SC-based energy storage using a single converter,
and is an extension of the work presented in [1] and [26]. The
proposed converter has the ability to transfer energy at will
between the input, output, and the energy storage elements. In
this topology, the SC is interfaced with the converter in a manner
that eliminates the dc current flowing through the IPT pad
and compensation network. Another advantage of the system
proposed in this article over previously developed systems is that
the voltage waveform applied to the IPT pad and compensation
network is identical to the symmetrical three level waveform
used in a typical IPT converter, and is free from dc offset [27].
Connection of an SC to the common mode voltage of a dc–ac
converter has been demonstrated in [28] for a hard switching
converter, and connection of a dc source to the common mode
voltage of a three-phase converter in [29]. This article presents
the connection of a dc port to the common mode voltage of an
H-bridge in a resonant converter for EV charging applications.
II. PROPOSED TOPOLOGY
The overall layout of the proposed system is shown in Fig. 1.
A low frequency (LF) converter provides dc power to the
primary side high-frequency (HF) converter, which is coupled
to the IPT pad (coil) through an LCL compensation network. The
primary side HF converter is also connected to an SC to store
energy on the primary (road) side of the system. The secondary
pad is compensated by an LCL network and connected to an HF
converter that rectifies the received power and supplies it to the
EV dc bus. The secondary HF converter is also connected to an
SC to store energy on the primary side. The proposed topology is
shown in Fig. 2, where SCs, CSCp and CSCs are connected to the
midpoints of the primary and secondary converters, respectively.
The dc supply, derived from the utility grid is represented by the
voltage source, Vin , whereas the EV main dc bus is represented
by Vout . The primary pad, Lpt , is magnetically coupled to the
secondary pad, Lst , by a mutual coupling, M. As the circuit
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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO. 9, SEPTEMBER 2020
Fig. 2. Circuit diagram of the proposed topology.
Fig. 3. Dc inductor split into superimposed differential and common mode
components.
in Fig. 2 is symmetrical along a vertical centerline, this article
will describe the operation of the system in terms of primary
side variables and components for the sake of simplicity. These
descriptions can be applied to the secondary side counterparts
unless otherwise stated.
The dc inductors, LDCpa and LDCpb , are mutually coupled
in opposing polarity to present a high impedance to the differ-
ential component of Vpi , this minimizes the ac current between
the two legs of the converter during power transfer from the
primary to the secondary, where Vpi is nonzero. The equivalent
circuit is shown in Fig. 3, where the coupled dc inductors can
be represented as the superposition of a differential inductor
and a common mode inductor. The differential component of
inductance is given by
LDCdiff = LDCpa + LDCpb + 2M (1)
whereas the common mode component of inductance is given
by
LDCpa − M
LDCcm = . (2)
2
Detailed derivation of (1) and (2) is shown in the Appendix.
From this equivalent form, it can be seen that the mutual induc-
tance has the effect of increasing the high-frequency impedance
between the two legs of the bridge when a differential voltage
is applied. The increased impedance is desirable as it decreases
the circulating currents as described in detail in Section IV.
III. MODES OF OPERATION
Switch pairs S1−2 , S3−4 , S5−6 , and S7−8 are switched as
complementary pairs according to the pattern shown in Fig. 4,
where Vpi represents the primary differential inverter voltage.
Vpa and Vpb represent the voltages at the midpoints of the
converter legs. The values of Vpi and Vcm as a function of
 RUDDELL et al.: WIRELESS EV CHARGING TOPOLOGY WITH INTEGRATED ENERGY STORAGE
Fig. 4. Switching waveforms for the primary and secondary converters.
TABLE I
STATE TABLE
converter switching state is shown in Table I. The primary side
inverter common mode voltage is given by
Vpa + Vpb
Vcmp = (3)
2
whereas the primary side inverter differential output voltage is
Vpi = Vpa − Vpb . (4)
The switching waveforms in the secondary converter follow the
same pattern as a the primary, albeit with a 90◦ phase shift either
in the positive or negative direction depending on the desired
direction of power transfer. The application of the proposed
topology described in this article is limited to a unidirectional
power transfer; however, the proposed topology could be op-
erated as a bidirectional system in other applications, such as
Vehicle-to-Grid (V2G) systems [30]. Many possible switching
patterns exist that meet the requirements of controllability of the
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8967
Fig. 5. Primary side current flow in switch states: (a) State [11], (b) State
[00], (c) State [10], and (d) State [01]. Secondary is equivalent to primary.
dc offset and fundamental harmonic magnitude. One such pat-
tern is described in this article and the primary side waveforms
are shown in Fig. 4 where the control variable φp sets the primary
side phase modulation and the control variables tpa and tpb set
the average value of the primary side common mode voltage
as described in Section IV. The secondary side is switched in
a similar manner at a phase offset between the primary and
secondary of θ, with control variables φs , tsa , and tbs . The
switching events are labeled 1 through 6 and are listed in Table I
in terms of the switching period, Ts , and the control variables. It
is significant that in this switching pattern, the primary side con-
verter differential voltage Vpi is a symmetrical phase modulated
signal as in many existing power converter topologies [27], [31].
This simplifies the design of the resonant circuit and allows this
topology to be interoperable with a conventional (no SC) IPT
system. It is possible to omit the SC from either the primary or
the secondary depending on the application. It is also possible
to use tuning topologies other than LCL, however, these variants
are outside the scope of this article.
The current paths through the primary side of the system
are shown in Fig. 5. The voltage across the resonant circuit is
zero in states [11] and [00], as shown in Fig. 5(a) and (b). In
states [01] and [10], the current is divided between the dc coupled
inductors and the resonant circuit, the dc inductors present a high
impedance path, as shown in Section IV.
A. AC Mode
In this mode of operation, the average value of the inverter
common mode voltage, Vcmp is equal to the voltage across the
SC, VSCp . In this case, the current through the SC has an average
value of zero and no energy is transferred to or from the SC. The
voltage applied to the resonant part of the circuit is a three-level
waveform, Vpi , as shown in Fig. 4(c). The converter alternates
between the states shown in Fig. 5(c) and (d).
B. DC Mode
In this mode of operation, the phase modulation φp is set to
zero, the differential component of converter output voltage is
zero, and the converter alternates between the states shown in
 8968 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO. 9, SEPTEMBER 2020

Fig. 5(a) and (b). The time intervals 0–1, 3–4, and 6–7 in Fig. 4 B. DC Mode
reduce to zero and the time intervals tpa and tpb occupy the entire
The average common mode voltage of the primary side con-
switching period Ts . CSCp , LDCcm , and the converter effectively verter is given by
form a buck–boost converter. If the mean volt-second integral
    
of the applied voltages Vpa and Vpb exceed the average voltage tpa π − φp φp
Vcmp = Vin + Vin (8)
of CSCp , the circuit will behave as a buck converter and store tpa + tpb π 2π
energy in the SC. Conversely, if the volt-second integral of Vpa
and Vpb are less than the voltage of CSCp , the circuit will behave where Vin is the dc bus voltage supplying the converter, and
as a boost converter where the SC supplies energy to Vin . tpa and tpb are the duty cycle control variables. It is significant
that the left- and right-hand sides of each converter must have
identical average values as this prevents a dc current from
C. Combined AC and DC Mode
ramping up in the dc inductors.
This mode of operation is a combination of the two pre- Manipulation of the primary side zero state ratio, λzsp
viously described modes. In combined ac and dc mode, the
tpa
phase modulation, φp is nonzero, allowing ac power transfer λzsp = (9)
and simultaneously the zero state ratio is modulated to drive tpa + tpb
current into or out of the SC. The waveforms required to achieve which is the ratio of state [11] to [00] in Table I, allows the
combined ac and dc power transfer are shown in Fig. 4. During average common mode voltage to be controlled, setting a Vcmp
each cycle, the converter passes through each state shown in higher than the associated SC voltage causes a current to flow,
Table I and all current paths shown in Fig. 5. charging the SC. Conversely, setting a Vcmp lower than the
associated SC voltage will discharge the SC. An equivalent
IV. MATHEMATICAL MODEL variable, λzss , describes the secondary side zero state ratio.
This section describes the mathematical model of the pro- With λzsp set to a nominal value of 1:1, VSCp is equal to half
posed topology. The purpose of the model is to provide a deeper the dc bus voltage. This allows effective utilization of the SC
understanding of the internal operation of the system and to serve energy storage capability, as SCs are typically operated in the
as a guide for the design of a practical system. The selection of upper region of their voltage range.
component values and ratings can be guided by the model as The rate of change of SC current averaged across a switching
the effect of component values is demonstrated, along with the cycle, ISCp(avg) , is given by
expected voltage and current stresses on the components. dISCp(avg) Vpa(avg) + Vpb(avg)
= (10)
dt 2LCMp
A. AC Mode
where LCMp is the primary side equivalent common mode
To predict the ac power transfer between the primary and inductance given by (2). Therefore, a current mode controller
the secondary, only the magnitude and relative phase of the can be used to regulate the SC charge and discharge current.
fundamental harmonic are considered. Power transfer does occur From (8), the limits of dc common mode voltage can be derived
at higher harmonics but the effect is negligible compared to  
the fundamental [27]. The Fourier series expansion of Vpi is φp φp
Vcmp(max) = Vin 1 − , Vcmp(min) = Vin (11)
given by 2π 2π
∞
    
4Vin 1 nφp nφp which limits the effect of the control ratio λzs to zero at the
Vpi = cos nωt + sin . (5) maximum phase modulation of φp = π. The power transfer
π n=1,3,...
n 2 2
between the dc bus and the associated SC over a time scale
Similarly, the Fourier series expansion of Vsi is that assumes a constant ISCp is given by

∞
     dVcm
4Vout 1 nφs nφs PDCp = ISCp VSCp = CSCp VSCp . (12)
Vsi = cos nωt + nθ + sin . dt
π n=1,3,...
n 2 2
Combining (8) and (12) gives the power transfer to or from the
(6)
SC in terms of the control variables, assuming a constant φ
The power transfer between the primary and secondary due to
the fundamental harmonic of the switching frequency fsw is λzs π − φp
given by PDCp = Vin CSCp VSCp . (13)
dt π
   
8M Vin Vout φp φs The power transfer between the secondary side dc bus, Vout ,
PAC = sin sin sin(θ) (7) and the secondary side SC is found in a similar manner as the
2πfsw Lpt Lst 2 2
circuit is symmetrical. From (7) and (13), the overall power
which is identical to the result obtained in [31]. It is significant transmission can be found and a controller for the proposed
that the control variables tpa and tpb play no part in ac power system can be synthesized to control the ac and dc mode power
transfer. independently within the limits set by (11).

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 RUDDELL et al.: WIRELESS EV CHARGING TOPOLOGY WITH INTEGRATED ENERGY STORAGE
Fig. 6. Block diagram of control system.
C. Resistive Losses
The purpose of this section is to model the resistive losses
in the system, with particular focus on the losses in the SC and
associated dc inductors as a result of differential current during
ac mode operation. To model the resistive losses in the system,
parasitic losses are assigned to inductors and capacitors. The
currents through these components are described in terms of
the component values and the system operating conditions. The
current through the split inductors can be given as the superposi-
tion of the ac and dc components of current. To calculate the ac
component, the voltage across the SC is assumed to be zero and
the currents IDCpa and IDCpb can be calculated as a function of
the voltages at (relative to negative dc rail) nodes pa and pb
Vpa Z2 − jωM Vpb Vpb Z1 − jωM Vpa
IDCpa = 2 2
, IDCpb =
Z1 Z2 + ω M Z1 Z2 + ω 2 M 2
(14)
where Z1 and Z2 are given by
Z1 = jωLDCpa + RDCpa , Z2 = jωLDCpb + RDCpb
where RDCpa and RDCpb are the parasitic resistances of the
inductors. Combing (12) and (14) gives an expression for overall
current flow through the SC and the dc inductors.
V. CONTROL SYSTEM
The block diagram of the control system is shown in Fig. 6.
On the primary side of the controller, the dc input current Iin
is regulated with a simple proportional integral (PI) controller
to a constant value, by setting the desired primary side SC
current ISCP . The voltage limiting block acts by setting the
desired SC current to zero when the upper or lower limit of
the SC voltage is reached preventing damage to components.
The desired primary SC current is fed to a second PI block that
monitors ISCP and sets the primary side duty cycle modulation
Dp . The primary phase modulation, φp . The secondary side
of the control system is identical to the primary side, with a
phase delay of θ added to set the direction of power transfer as
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8969
Fig. 7. Region of operation, normalized for a given mutual coupling level.
described in Section IV. In order to simulate the movement of
an EV over a roadway mounted pad, the primary and secondary
phase modulations, φp and φs are modulated as trapezoidal
waveforms. This mimics the pulsation in power transfer, as
described by [7]. In the experimental set-up, the duty cycle
modulation block is implemented with an FPGA and all other
elements of the control system are implemented with a C2000
series microprocessor. Analogue sensing of current is achieved
with Hall effect sensors.
A. Region of Operation
This section describes the region of operation of the proposed
converter. The zero state duty cycle modulations that control
the SC voltages act on the period of time in which the converter
output voltages are zero while the phase modulation to control ac
power transfer acts on the period of time when the converter out-
put voltages are nonzero. Consequently, the maximum deviation
of SC voltage from half the dc bus voltage cannot coincide with
maximum ac power transfer. The limitations of power transfer
are shown in Fig. 7, the horizontal axes represent the normalized
SC voltages, the vertical axis shows the maximum power that
can be transferred.
During a typical dynamic charging scenario, the system be-
gins with both CSCp and CSCs discharged, as represented by the
point labeled “I” in Fig. 7. As the system prepares to transfer
power to the EV, CSCp charges to near its maximum value, as
represented by the point labeled “II” in Fig. 7.
When the EV arrives over the roadway pad, ac power transfer
from the primary to the secondary begins. Simultaneously, CSCp
drains to provide additional power to the primary side converter,
while CSCs charges to adsorb the high power pulse arriving at
the secondary side converter. The system traverses through point
“III” and arrives at point “IV” in Fig. 7. As the EV moves off the
roadway pad, the on-board SC, CSCs , discharges and provides
power at a moderate rate to the EV dc bus, as CSCs discharges
the returns to point “I” in Fig. 7.
B. DC Differential Mode Current
The current path from side a to side b of either the primary or
secondary converter through the coupled dc inductors presents
 8970 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 35, NO. 9, SEPTEMBER 2020

TABLE II
COMPONENT PARAMETERS

Fig. 8. Experimental set-up with major components highlighted.

an inductive load with very little dc resistance to the differential

component of the converter output voltage. In the case that the
converter output voltage is not exactly zero, for example, due
to unequal delays in the gate drivers of the switching devices,
the dc current can build up over time eventually resulting in
excessive losses and stress to the switching devices. To mitigate
this potential problem, the differential component of current can
be measured while the system is operating and an extra control
loop can be applied to make small adjustments to the relative
ON times of the left- and right-hand side switches to regulate the
differential component of dc current through the dc inductors to
zero.

VI. RESULTS
To demonstrate the feasibility of the proposed topology and Fig. 9. Overall power transfer, primary side: (a) voltages and (b) currents.
confirm the accuracy of the mathematical model, an experimen-
tal prototype with a nominal power level of 3.8 kW has been
constructed according to the parameters listed in Table II. The
prototype uses a parallel pair of 1-mF aluminum electrolytic
capacitors in place of each of the SCs, in an EV these capacitors
would consist of series stacks of electrolytic double layer ca-
pacitors to achieve the required voltage rating. The EV system
would have a much larger capacitance than the prototype to
enable the storage of much larger energy pulses, however, the
overall theory of operation is equivalent.
The experimental set-up is shown in Fig. 8 with major circuit
elements highlighted.

A. Overall Energy Transfer

To demonstrate the ability of the proposed topology to transfer
energy from the roadway mounted charging system to the EV
dc bus, the prototype is operated in such a way as to charge
and discharge the primary and secondary SC’s in stages. The Fig. 10. Overall power transfer, secondary side: (a) voltages and (b) currents.
time-scale of the energy transfer is selected to mimic a typical
EV dynamic charging scenario at urban roadway speeds. This
demonstration highlights the ability of the proposed system to voltage increases in the regions labeled “B” and “D” linearly
store and retrieve energy in the SC’s. Energy transfer to and from with respect to time as the energy is transferred to the SC from
the primary side SC is shown in Fig. 9, and energy transfer to the associated dc bus. The SC voltage decreases in the regions
and from the secondary SC is shown in Fig. 10. The SC voltage labeled “F” and “H” as energy is transferred from the SC to the
is held constant in regions “A,” “C,” “E,” “G,” and “I.” The SC associated dc bus.

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 RUDDELL et al.: WIRELESS EV CHARGING TOPOLOGY WITH INTEGRATED ENERGY STORAGE 8971

Fig. 11. Results graphs. (a) AC mode mathematical model. (b) DC mode mathematical model. (c) Combined mode mathematical model. (d) AC mode experimental.
(e) DC mode experimental. (f) Combined mode experimental. (g) SC voltages and currents, ac mode mathematical model. (h) SC voltages and currents, dc mode
mathematical model. (i) SC voltages and currents, combined mode mathematical model. (j) SC voltages and currents, ac mode experimental. (k) SC voltages and
currents, dc mode experimental. (l) SC voltages and currents, combined mode experimental.

B. Operating Waveforms
Operation of the system in the ac mode in the forward direction
is demonstrated in Fig. 11(a) and (d), where energy is transferred
from the primary to the secondary at a rate of 2.4 kW. In this
case, the ratios λzsp and λzss are held constant at 1 : 1 and the
phase modulation variables, φp and φs , are set at 2π/3. The
ripple current through the dc inductors is shown in Fig. 11(g), the
average value of this ripple is 0 as predicted by (13). The ripple
frequency of ISC is double the fundamental switching frequency
due to the interleaved ripple in IDCpa and IDCpa . The differential
components of Vpi and Vsi are symmetrical three-level wave-
forms, identical to a conventional phase-modulated IPT system.
This results in no extra losses in the resonant network due to
duty cycle modulation. Some extra losses are expected in the
dc inductors due to the ripple current flowing through them.
Operation of the system in the dc mode is shown in Fig. 11(b)
and (e), where power is transferred from Vin to CSCp at a rate
of 4 kW. There is no differential voltage across the resonant
circuit, so no current flows through the primary or secondary
pad. Fig. 11(c) shows the operation of the system in a combined
ac and dc mode. Energy is transferred from Vin and CSCp to
Vout . The phase modulation variables, φp and φs , are set at
2π/3. The average value of ISCp is nonzero due to the rate
of change of the ratio of the control variables λzss as described
in Section IV. Again, the ripple frequency of ISCp is double the
fundamental switching frequency due to the interleaved ripple
in IDCpa and IDCpa and differential components of Vpi and Vsi
are symmetrical three-level waveforms.
VII. CONCLUSION
The overall concept of a novel converter topology, suitable
for dynamic charging of EVs has been presented. The proposed
topology has advantages over existing systems, namely reduced
complexity and number of switching devices required. A math-
ematical model has been developed to predict the overall power
transfer of the system and to describe the boundary conditions for
the main modes of operation. Results of a numerical simulation,
and an experimental prototype system are shown to confirm the
validity of both the proposed mathematical model and the novel
topology.
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Steven Ian Ruddell received the B.E. degree (first
class hons.) in electrical and electronic engineering
from the University of Auckland, Auckland, New
Zealand, in 2015. He is currently working toward
the Ph.D. degree in researching energy storage in
inductive power transfer systems for use in dynamic
electric vehicle charging.
He is a co-inventor for one patent (pending) relating
to a novel converter topology.
Udaya K. Madawala (Fellow, IEEE) received the
B.Sc. degree (with hons.) in electrical engineering
from The University of Moratuwa, Moratuwa, Sri
Lanka, in 1986, and the Ph.D. degree in power elec-
tronics from The University of Auckland, Auckland,
New Zealand, in 1993.
In 1997, he joined the Department of Electrical
and Computer Engineering, University of Auckland,
where he is currently a Full Professor and focuses
on a number of power electronics projects related to
wireless grid integration of EVs for V2G applications
and renewable energy.
Dr. Madawala is a Distinguished Lecturer of the IEEE Power Electronic
Society and has served both the IEEE Power Electronics and Industrial Elec-
tronics Societies in numerous roles, relating to editorial, conference, advisory
and technical committees, and chapter activities. He is currently an Associate
Editor for the IEEE TRANSACTIONS ON POWER ELECTRONICS, and a member of
both the Administrative Committee and Membership Development Committee
of the IEEE Power Electronics Society.
Duleepa J. Thrimawithana (Senior Member, IEEE)
received the B.E. degree (hons.) in electrical engi-
neering and the Ph.D. degree in power electronics
from The University of Auckland, Auckland, New
Zealand, in 2005 and 2009, respectively.
He joined the Department of Electrical and Com-
puter Engineering, University of Auckland, in 2009,
where he is currently a Senior Lecturer in electrical
engineering. He also serves as the Chairman of the
Joint Chapter of IEEE Industrial Electronics and In-
dustrial Applications Society, New Zealand (North).
He has coauthored more than 100 international journal and conference publi-
cations, and has filed 14 patents on wireless power transfer technologies. His
research areas include wireless power transfer, power electronics, and renewable
energy.
Dr. Thrimawithana received the Jim and Hazel D. Lord Fellowship in 2014
in recognition of his outstanding contributions to engineering as an early career
researcher.