sazgnment-2 KArjan kunar

BoaacSENOIOS66
Compaber organisation ard Archzeckr e
ooutlin he shages rnatdion execulion cyck ina bypical
P'roceser. pscuss e role h instrudion obch, decode, execule and store
phacs. Paide a Specif« exampk o an instetton and descrbe hos
it would Progres trough thee stags.
he islrution execiten cycle,al Xneon as te machine ecyce,s
a Sarts
Series skeps hat a procesa qos
go through to exeule a single
instution.he bypical stags include :

The processer Petehs the instrudion from memory yhe program

Cotrnter (r) halds the address next instucion to be Pethed
-5he. instrudion. is transfered Prorn he memory to
regisler (IR) in the Processor. insbuction
i Decode:
The fetched insbudion i3 decoded to dekermine ht
operat'on heads to be þeoforned.
’ me pcade port d insludon s
instuton bype .
evacbed ho identa!y the
i Execute ;
’ the processor Berferns tme
insrudion. operation spectloed by dec oded
’ Ths ay nucle arithmdli or logie al operatior3, data
mani þudalien or Conbd Alous operati
iv) store
ons.
the resul! execuion is stoved i0 cppopriae location. .
 start
5G+0

To
ARe PC|

IR+ M[AR],PC+e+l

Decode Dpexation code in 1R(2-14)

ARe 1R(o-),1+IR(5)

(Registex or lo=1 -n(Merooy- Yefexernce)

-0(vegistev) (irdivetd -0 (divect)

Eecute Elecute AR-MAR] Nothing

input- output vegister-efeRrI
instrucion ib6truction
5C+0

FxeeutR
nenony-refeience instruct
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Ey: ADD R1, RA, R3

i) feteh te address at next insrudi'on.
+ 7he pra am courker (po) holds
address in he Pe is fethed from menory.
* The inslndion ak
at
* the Poldhd instradion (ADD Ri, Ra, As) is stored in instretion
Tegstor(1R).

* The prSOr decode he opcode (hop) udersband that it

needs to Perorn an addition operat on .

* he operands ("R,'Rs','R3) are idestadsindicattn hat the

Cortcnt d teg isker Ra
Ro is o be adod to centent reqister
R3 ard resut is to be stored in R',

the pro cesser perfoms the addition operati on by addim the

Cortents 4 Ra and 'R3. addtng
* the result is ten
then stored in 'R'.

fv) store .
the reslt addton is stored in tegister 'R.
* The Proqvan counker is updale to point to next instruci
in memory
4 Aßter slep 4, the conbral goes Enek to step to feteh, de code
ard execu the nat instrtion.
4hs Procss lorinuss unless a HALT instrucin s
encounkred
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Drscies the tmpetante a bus in compalr orchitete ,

afprolak beluen Hhe adrs bus ard data bus. fpain hau he
bus archikdur acilales commnicalion betueen d*ttorent compsners
in a comple sysken an example a sibualion cohere a more

Comprehenstue daka bus Could be advantaqeous .

r4 bus in compubr arekbctre Serves s communtcation
Pathuoy hat albus dilteent compnerts d a compaber 34sbem bo
Fransßa data and conbrl rgnals betucen er andther. It ats
as a shared condust for inlormation exchange , enabling
ommunication aneng Varous harduare seamkss
hardare com penents . he tuo
bypes buses in a Compuler suslom primary
the addess bus and
e data bus

Atdress Bus Data Bus

¥ the bs tat caríes he the bus hat cares
mermery addres is called an
cam data
betuben the cPu e memory or
address bus. Perifherals
t is unidiredibnd
The udhd addras bus rhe Lotth
is
usually delermind by data bus is tisua lu
he nurr d address lines delerminad by number &data
Iines.
*t iS sed to specia the
locaion ;n memoy or tt is used to translor actual
Peripherals to read fron Aata between the CPU and
write to Memory r peri pherals.
* Adrss bug is controlled by * pata bus is ontrolled by
Cpo lo spedy he CPo to ini tiate data transler
ahdressa to access Or receie data
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Com prunicalon between omponents

’ he cPCPU Sends the memory oddres o data ilit needs onn
address bus.

mony o peripheral devie ak that oddres pBacn te

requested data on he data bus
Cpu reads the date rorm daka bus
eeifd memory to calion or wrile data ta

Erample a situdin for a

* In e parics where Comprehenst ve
large Uolums dta needbu:
Dala
transevd qucklhy, a wder dak bus can be to be
kosks such as high- advantaq eous por
& Scient peforanance graphics procesing, video
Simulkations,
allous or mare data to be a broader data bus (E:- ol -bitediting
overal Syslern peformance and moved in aa Single yle, im or 12s-bit) f
* A Comprehensiue dala Hhrough pt proving
situatns where Hhe bus is particulary benel:ctd in
and the demard for dernand Por data transßer band dth is
movemont is crucial.data bransr, the eciency data
hig
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) Descrbe the rele regisos in CPU and their Signif cae in

he insbrlin execution proces. lhustrate a sim pl:ifred data path
a cPO,inchuding the tel evant registers and he flow o dat
betuen them. Fuplai hous the data path supprts basic
armekt and log:c operalions.
Aru:
Reqtskrs in CPu Are Srrall, fast stonge locions that ae
sd bto slore temp rony data durtng the execution
they play a instuetion3 .
crucial vde in the instrudn erecutiorn process bu
fact lrtati ng quick access to data Q operands necded Lor aithmelic
ard logze operatians. Regiskers are access
acess than data storedn RAM.
Simpl:frad daba path a cpu, chustrating the roe
reqskers in the instrution exection process.
) Trstrudion Rerster (rR) -
the teg:sler holds the eurent fnstrulion being
execuled. he cPo Pebches
fekhes instrutiors ron memoy and he instrdion
is stored in th TR.

a) Pogran counter (ee) :

the pc Keeps track te addreses t ha eot
instudion to be fethd. After joching
dchina an instrution, the Pc is
bpdaled o point to next insrudion

i) Menong Addrss Regsr (MAR):

This reqsder halds Bhe address dala to be
sored in menor. H 1s used during memory aces3
GPeyaiony.
 M)Mamog Data Regaler (MDR) :
data lelbhad Brom or to be sord
The MDR holds he MDR and meoY
Data is Araskred between te
n memor
in
during read ard orile operatiors
Aabmeic openations; rnor
memorl and loads operardy
from
* he Cpo lches an instrudion
inka Hhe operard gisers,
* he ALLb Perfers the requestea aritmeie operalion on the voles
stored in the operard regiskers.
* he re salt is stored back ina egisl er, LJhich can be one
opoard reqslers or a desigrat result reqisler.

lögie opeatins,
Stmiler to anthralie operations, the epo felehes cn instucion and
loods the eperards inko operand regiskers
|*The ALu pelus the Yeguetad log :c operation en tho uaues
Stored in oprard regiskrs
*the result is store baek in a rag isker.