2252
10, OCTOBER 2016
An Analog Front-End for a Multifunction Sensor
Employing a Weak-Inversion Biasing Technique
With 26 nVrms, 25 aCrms, and 19 fArms
Input-Referred Noise
Masahiko Maruyama, Shigenari Taguchi, Member, IEEE, Masafumi Yamanoue,
and Kunihiko Iizuka, Member, IEEE
Abstract— An analog front-end (AFE) for a multifunction envi-
ronmental sensor is proposed. The AFE is designed to be able to
sense 1 μV, 1 fC, and 1 pA level signals in a low-frequency band
around DC, and consists of an instrumentation amplifier (IA),
a charge amplifier (CA), and a continuous time delta–sigma (CT-
) ADC. To reduce the low-frequency noise of operational
amplifier (OPAMP) which is used for signal path, this paper
proposes a weak-inversion biasing technique. The designed IA
achieved 26 nVrms input-referred noise (IRN) in the band
of 0.1–10 Hz with 0.22 mm2 die area. The designed CA achieved
25 aCrms IRN in charge sensing mode and 19 fArms IRN in
current sensing mode in the band of 0.01–1 Hz, respectively, and
occupies 0.12 mm2 die area. The AFE has been fabricated in
a 0.18 μm CMOS process with 4.5 mm2 die area. The current
consumption at 2.56 kHz output data rate (ODR) is 2.5 mA,
reducing to 2 μA at 0.01 Hz ODR.
Index Terms— Analog front-end, charge amplifier, continuous-
time delta–sigma ADC, environmental sensor, instrumentation
amplifier, weak inversion.
I. I NTRODUCTION
T HE use of environmental sensors in portable equipment
is becoming increasingly common in applications where
low power consumption and small form factors are essen-
tial [1]. As a result, it is expected that multiple sensors will
be integrated into compact packages, as shown in Fig. 1.
The parameters typically assessed by an environmental sensor
include temperature, humidity, gas, dust, and brightness, and
the number and type of parameters that can be assessed
continues to increase. A key challenge that must be addressed
when integrating multiple sensors into a compact package is
how to effectively combine multiple analog front-ends (AFEs),
each with different input formats as in Fig. 2, into a small
die area.
For example, the AFE for an atmospheric pressure sensor
needs to handle a voltage format input because the pressure
Manuscript received February 11, 2016; revised April 20, 2016; accepted
June 5, 2016. Date of publication July 19, 2016; date of current version
September 30, 2016. This paper was approved by Guest Editor Makoto Ikeda.
The authors are with the Electronic Components and Devices Com-
pany, SHARP, Tenri, Nara, 632-8567, Japan (e-mail: maruyama.masahiko@
sharp.co.jp; taguchi.shigenari@sharp.co.jp; yamanoue.masafumi@sharp.co.jp;
iizuka.kunihiko@sharp.co.jp).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/JSSC.2016.2581812
0018-9200 © 2016 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO.
sensor generates its output signal using a piezo-resistive-
bridge [2]. On the other hand, the AFE interfacing with a
gas or humidity sensor needs to handle a charge format input
because it generates output signals using capacitors fabricated
by comb-electrodes [3]. In order to sense dust, a photodiode is
used to detect the scattered light that is caused by the dust [4].
Therefore, the AFE for a dust sensor needs to handle a current
format input because the dust sensor generates its output using
a photodiode. Currently, an instrumentation amplifier (IA) is
used to sense the voltage format, and a charge amplifier (CA)
is used to sense the current and charge formats. Consequently,
the challenge when combining multiple AFEs into a mono-
lithic chip is to reduce IA and CA die area sufficiently.
The AFEs for environmental sensors must be compatible
with multi-format inputs, be low noise, have low power con-
sumption, and occupy a small die area. In recent years, it has
become common to implement an AFE die and miniaturized
transducers into a single package [5]. Since the miniaturized
transducers often have a reduced output level, the AFE chip
should be able to accept smaller signals in order to maintain
a high level of accuracy. In this paper, the accuracy goal is to
be able to sense 1 μV, 1 fC, and 1 pA. The reason for setting
the goal to being able to sense inputs as small as 1 μV comes
from atmospheric pressure sensors, where demand exists to
sense a few centimeters of height for drone control, physical
activity tracking, and indoor navigation. In a typical MEMS
transducer for an atmospheric pressure sensor, an altitude
change of 8.6 cm generates 300 nV output change. Sensing of
this level requires the input referred noise of 45.5 nVrms (or
equivalently, 1.3 cmrms ) or less, while a typical output data
rate required for the atmospheric pressure sensors is 10 sps.
The reason for setting the goal of sensing 1 fC comes from
gas sensors, where demand exists to sense extremely small
levels of gas, such as ppb or ppm, using fabricated comb-
electrodes. The reason for setting the goal of sensing 1 pA
comes from dust sensors, where demand exists to sense light
scattered by extremely fine particles, such as 1 μg/m3 , using
a photodiode. Thus, the IRN for the IA and CA must be
much lower than 1 μV, 1 fC, and 1 pA while keeping the
die area small. In the target application, we assume that the
environmental sensor operates with a button battery CR2025,
MARUYAMA et al.: AFE FOR A MULTIFUNCTION SENSOR EMPLOYING A WEAK-INVERSION BIASING TECHNIQUE 2253

Fig. 1. Multifunction environmental sensor.

Fig. 2. Output formats of transducers.

Fig. 3. Proposed signal path using the CT- ADC of the AFE for environmental sensors.

whose capacity is 165 mAh, over a one-month period, while
keeping a typical output data rate of 10 sps. The allowed
current consumption calculated from the expected battery
lifetime is 230 μA.
In environmental sensing, a significant amount of informa-
tion is concentrated in a low frequency band around DC. In this
paper, we used a signal band that extended from 0 to 10 Hz.
In terms of a solution to address the seemingly incompatible
requirements for both a reduced die size and a low noise,
we adopt two approaches. The first approach, described in
Section II, utilizes the characteristics of CMOS transistors
in weak-inversion in the design of the operational ampli-
fier (OPAMP) that is an essential building block for the AFE.
This approach simultaneously reduces noise, area, and power
consumption. The second approach, described in Section III,
uses a continuous-time delta–sigma (CT-) ADC that, if
properly designed, is able to achieve a high dynamic range
in a relatively small die area. In Section IV, we describe the
IA and CA that are designed and their experimental results.
The IA designed using this approach achieved a 26 nVrms
(0.1–10 Hz) IRN with a 0.22 mm2 die area, and the CA
achieved a 25 aCrms (0.01–1 Hz) IRN with a 0.12 mm2
die area in 0.18 μm CMOS. In Section V, we describe the
multifunctional environmental sensor that was fabricated using
the AFE chip and its experimental results. The designed AFE
as in Fig. 3 includes the IA, CA, CT- ADC, a digital
block for signal conditioning and correction, and one-time-
programmable (OTP) memories for calibration, has a 4.5 mm2
die area as in Fig. 4, and accepts current, voltage, and charge
inputs. Section VI summarizes our conclusions.

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2254
Fig. 4. Die photograph of the fabricated AFE.
II. L OW-N OISE B IASING T ECHNIQUE
A. Selection of Chopping Frequency
Many techniques have been proposed to design an amplifier
with a high signal-to-noise ratio (SNR) in a low-frequency
band [6]. In recent years, the chopping technique has become
widely used [7]–[10]. The chopping technique is remarkably
effective in reducing the noise at low frequencies near DC.
However, there are some tradeoffs that must be kept in mind
when selecting the chopping frequency. Fig. 5 is a typical
example of a chopping amplifier system. Fig. 6 shows the
gain and the noise power spectral density (PSD) of each stage
in Fig. 5. If the selected chopping frequency (fchop) is in
the system band (i.e., DC ≤ 2π · fchop ≤ β · ω u ), the
signal gain becomes 1/β , as shown in Fig. 6(a). However,
if the amplifier noise is large, as in Fig. 6(a), the SNR
becomes poor. On the other hand, if the selected fchop is
outside the system band (i.e., β · ωu ≤ 2π · f chop ≤ ωu ),
the signal may avoid corruption by the amplifier noise, as
shown in Fig. 6(b). However, this will cause the signal gain
to decrease to ωu/ω = ωu/2π · f chop, which is smaller
than the desired value of 1/β . To avoid this situation, we
propose a design technique to reduce the amplifier noise in
the system band. This technique allows us to select fchop
in the system band without compromising the low in-band
noise requirement. When using this method, it is important to
reduce the amplifier noise in the band f chop/2 ≤ f ≤ f chop
considering the effects of aliasing caused by the chopping.
This will be described in the next subsection.
When selecting fchop, it is also important to consider the
input bias current. Fig. 7 shows the input portion of the
chopping circuit. To achieve a high SNR, it is important not
to attenuate the output signal from the transducer at the input
to the chopping system. For this reason, the input bias current
should be close to zero. The input bias current depends on the
charge injection of the chopping operation, and can be derived
according to
Iin j ect ion = 2 · f chop · W · L · C O X · (V gs − V th) .
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10, OCTOBER 2016
Fig. 5. Chopping amplifier system.
To reduce the input bias current, it is preferable to minimize
both the physical width and theVgs of the switch transistor.
However, reducing the size of the switch increases the dis-
tortion of the signal. A more effective method to reduce the
input bias current is to select fchop to be as low as possible.
Although clock feed through also generates input bias current,
if the parasitic capacitances of the switches have the same
value, the clock feed through currents of the differential input
pair will balance and be negligible. The input bias current of
the designed IA is calculated to be 0.63 nA where we assume
Cox = 8.5 mF/m2 , W = 10 μm, L = 0.18 μm, and Vgs–Vth
= 1 V. This bias current corresponds to the input impedance
of 1.6 G, which is sufficiently large for our application.
B. Weak-Inversion Biasing Technique
In order for the chopping system to reduce the noise in
the band near DC, it is important to design the amplifier
such that the noise in the band f chop/2 ≤ f ≤ f chop
is as low as possible. The flicker noise is the dominant
noise source and is distributed in the low frequency band.
To reduce the flicker noise in the amplifier, the gate area of the
transistor in the differential pair should be large; however, this
translates to a large die area. In addition, the trans-conductance
(Gm) of the differential pair should also be large in order to
reduce the flicker noise; however, this causes it to consume
a large bias current. Therefore, we propose an alternative
method to reduce the flicker noise while keeping the gate
area and the bias current as small as possible. To simplify
the situation, we consider a common source amplifier, as
shown in Fig. 8. Fig. 9 shows the simulated input referred
RMS noise, the DC gain, the gain–bandwidth product (GBW),
and the Gm of the common source amplifier, where the bias
current and the gate area are kept constant, and the W/L ratios
are varied. We evaluated those characteristics for different
bias conditions from weak-inversion to strong-inversion, by
modifying the W/L ratios. The values of the Y -axes of the
graphs in Fig. 9 are normalized by the values at Ve f f =
0.3 V. From Fig. 9(a), it can be seen that the low-frequency
noise (from 1 mHz to 100 Hz) for the amplifier in weak
inversion was lower than in strong inversion. This tendency
is greater in the PMOS amplifier than it is in the NMOS
amplifier. In terms of the mechanism whereby the amplifier
noise in weak inversion is reduced, we have qualitatively
concluded that this was due to the increase in the Gm value
for the amplifier [11], [12]. To the best of our knowledge,
the actual physical mechanism that causes this phenomenon
(1) is not known. Fig. 9(b) shows that the DC gain deteriorates
MARUYAMA et al.: AFE FOR A MULTIFUNCTION SENSOR EMPLOYING A WEAK-INVERSION BIASING TECHNIQUE 2255

Fig. 6. Gain and PSD of each stage in Fig. 5. (a) fchop is selected in the system band. (b) fchop is selected outside the system band.

TABLE I
A MPLIFIER C HARACTERISTICS S UMMARY

in weak inversion as an amplifier provides lower noise in

Fig. 7. Schematic of the input portion of a chopping circuit.
Fig. 8. Schematic of common source amplifiers.
slightly in weak inversion compared with strong inversion.
However, Fig. 9(c) shows that the GBW deteriorates strongly
in deep weak inversion. Fig. 9(d) shows that the Gm value
increases markedly in weak inversion versus strong inversion.
Further, this same effect is observed for both the differential
amplifier and the common source amplifier. We summarized
the relationship between the biasing types and the amplifier
characteristics in Table I. The use of PMOS transistors biased
the low-frequency band under the condition where the bias
current and the gate area are fixed. It should be noted that
this biasing strategy is not suitable for high-speed applications
due to the deterioration of GBW. However, in the case of
environmental sensing, the GBW deterioration is irrelevant
because the signals are low frequency near 0 Hz. In fact, the
small GBW at low frequency simplifies compensation of the
amplifier [13]. The weak-inversion biasing technique for lower
thermal noise was reported in [11]. However, the discussion
in [11] is mainly focused on thermal noises. Our approach
uses the weak-inversion biasing to reduce flicker noises as
well. Fig. 10 shows the OPAMP designed using the proposed
biasing technique, where the transistors that operates as an
amplifier are biased in weak-inversion and the transistors that
operate as a current source are biased in strong-inversion.
Fig. 11 shows the simulated characteristics of the designed
OPAMP. The flicker corner frequency is 1 kHz because of the
reduced noise. This leads to the flat noise shape in the√band of
f chop/ ≤ f ≤ f chop with the noise value 4.5 nV/ Hz, as
2
shown in Fig. 11(c), when fchop is selected √ to be 20.48 kHz.
Therefore, the noise after chopping is 4.5 nV/ Hz in the signal
band from 0 to 10 Hz, as shown in Fig. 11(d). The gain of

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2256 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10, OCTOBER 2016

Fig. 9. Simulated characteristics of common source amplifiers with varying W/L ratios. (a) Input-referred rms noise (rms band: 1 mHz–100 Hz). (b) DC
gain. (c) Gain–bandwidth product. (d) Gm.

Fig. 10. Schematic of the OPAMP using the proposed biasing technique.

the OPAMP is 55 dB at the chopping frequency of 20.48 kHz, III. D ESIGN OF THE S IGNAL PATH U SING A CT- ADC
the system gain is 40 dB, and the OPAMP consumes 650 μA A switched-capacitor delta–sigma (SC-) ADC is typi-
of current. cally used as the ADC in the signal path of an AFE that is

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MARUYAMA et al.: AFE FOR A MULTIFUNCTION SENSOR EMPLOYING A WEAK-INVERSION BIASING TECHNIQUE
Fig. 11. Simulated characteristics of the proposed OPAMP.
used for environmental sensors. In this case, the design of a
suitable clock generator is easy because an SC- ADC can
tolerate a clock with relatively large jitter. However, an SC-
 ADC requires an anti-aliasing-filter (AAF) to be placed in
front of it. In environmental sensing, the signal band of interest
is close to DC, and this requires an AAF that can accommodate
the low frequency; however, the corresponding AAF occupies
a large die area or requires an extremely high oversampling
ratio. For this reason, we adopt a CT- ADC because this
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2257
type of converter intrinsically incorporates an AAF. However,
a CT- ADC does not tolerate a large amount of clock
jitter. In a feedback DA converter with the CT- structure,
the relationship between the rms clock jitter σ j and the SNR
is derived as follows [14]:
 
S 1
= 10 · log (2)
N 16 · O S R · f b2 · σ j2
where f b is the signal bandwidth and OSR is the oversampling
ratio. If we assume that the clock frequency is 327.68 kHz, the
desired band f b is 10 Hz, the OSR is 32768, and the desired
SNR is 120 dB, the required clock jitter σ j is calculated
to be 138 ps using (2). We design the ring-oscillator that
satisfies the jitter requirement using a low noise LDO that
uses the proposed weak-inversion biasing technique described
in Section II-B. Fig. 12 shows the simplified schematic of the
designed and fabricated CT- ADC. The OPAMPs used in
the CT- ADC are also designed using the proposed weak-
inversion biasing technique. The reference voltages VREFP
and VREF are 1.55 V and 0 V, respectively. Fig. 13 shows the
measured FFT result without input. The effective resolution
(ER) is calculated using the following equation:
 
Full Scale Range
E R = log2 . (3)
r ms Noi se
The ER derived from the measured data using (3) is 20.3 bits
under the condition that the full-scale-range is 1.55 V, the
output data rate (ODR) is 20 sps, the CT- ADC consumes
360 μA, and the CT- ADC occupies 0.23 mm2 die area.
Fig. 3 shows the proposed signal path using the CT- ADC.
Note that the signal path does not include either an AAF in
front of the ADC or a ripple reduction loop (RRL) in the IA
as a result of using the CT- ADC.
IV. E XPERIMENTAL R ESULTS OF THE
D ESIGNED A MPLIFIERS
A. IA Design and Experimental Result
The IA is designed to make the noise level sufficiently low
to be able to sense 1 μV in the signal band from 0 to 10 Hz.
Fig. 14 shows the schematic of the proposed IA that uses
the conventional topology that consists of three OPAMPs.
The OPAMPs in the IA are designed using the proposed
weak-inversion biasing technique. Consequently, the chopping
frequency could be selected as low as 20.48 kHz because of the
small low-frequency noise of the OPAMPs. The gain of the IA
could be varied from 5 to 160 V/V with 144 steps. The IA does
not have an RRL because the CT- ADC in the signal path
does not require one, as mentioned in Section III. However, if
the IA is not properly designed, its output will saturate due to
its offset ripple. In this work, to avoid such a situation, the IA
is designed with careful layout, with an adequate size of input
differential pair, and with a fully differential topology. The
measured offset voltages of 250 pcs from plural production
lots were less than 100 μV. Fig. 15 shows √ the measurement
results for the IA. The IRN was 8.2 nV/ Hz and 26 nVrms
in the band from 0.1 to 10 Hz, as shown in Fig. 15(a). It is
clear from Fig. 15(b) that the IA sensed the 1 μV input step
that was generated using the built-in-self-test (BIST) circuit
2258 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10, OCTOBER 2016

Fig. 12. Schematic of the proposed CT-.

TABLE II
C OMPARISON OF THE IA WITH THE S TATE OF THE A RT

Fig. 13. Measured FFT result of the CT- ADC without input.
consisted of an 8 bit DAC and an attenuator. Table II shows the
comparison between the designed IA and a state-of-the-art IA.
The IRN of the proposed IA is the lowest of all IAs shown
in the table, and the die area is the second lowest. However,
the current consumption is the highest. We assume that this
is due to the selected topology of the IA. Our IA adopts the
conventional three OPAMP topology; however, all of the other
IAs use a current-feedback instrumentation-amplifier (CFIA)
topology. In contrast to our IA, the CFIA topology uses only
one OPAMP. Consequently, it is able to achieve lower current
consumption. For example, the IA in this work consumes
6.7 times more current than that of Akita [7], while our
input noise PSD is (8.2 nV/13.5 nV =) 0.6 times that. This
Fig. 14. Schematic of the proposed IA.
noise reduction requires (1/0.62 =) 2.8 times more current.
The residual (6.7/2.8 =) 2.4 times increase of the current
consumption could be reduced with a different topology.
As a figure of merit for the IA, the noise efficiency
factor (NEF) is defined as [15]

2 · Itot
N E F = Vrms,in . (4)
π · UT · 4kT · BW
In (4), Vrms,in , Itot , UT , and BW represent the INR, the current
consumption, the thermal voltage, and the measured frequency
bandwidth of the IA, respectively. Fig. 16 shows a comparison
between the input-referred low-frequency noise (LF-noise)

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MARUYAMA et al.: AFE FOR A MULTIFUNCTION SENSOR EMPLOYING A WEAK-INVERSION BIASING TECHNIQUE
Fig. 15. Measurement results of IA. (a) 0.1–10 Hz band IRN with gain of
160 [V/V]. (b) 1-μV step response with 10 Hz cutoff LPF and gain of 160
[V/V].
Fig. 16. LF-noise comparison of the IA with commercially available
products.
Fig. 17. Simplified schematic of the proposed CA.
in the band from 0.1 to 10 Hz for our IA and that for
commercially available products (the data was extracted from
publicly available data sheets). As can be seen from the figure,
our system shows the lowest noise with the exception of a
bipolar product.
B. CA Design and Experimental Result
The CA is designed to make the noise level sufficiently
low to be able to sense 1 fC and 1 pA in the signal band
from 0.01 to 1 Hz. Fig. 17 shows a simplified schematic of
the proposed CA with a switched-capacitor topology. The low
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2259
Fig. 18. Measurement results of the CA in charge sensing mode. (a) 0–1
Hz input-referred charge noise. (b) 1 fC step response with 1 Hz cutoff LPF.
frequency noise of the CA is reduced by using correlated
double sampling (CDS). The OPAMP in the CA is designed
using the proposed weak-inversion biasing technique. The
CDS frequency is selected to be as low as 20.48 kHz as
a result of the low noise levels of the OPAMP in the low
frequency band.
The CA is able to sense the charge format input when
the sampling capacitor is positioned in front of the CA. The
gain of the charge-to-voltage converter (CVC) is achieved
by transferring the sampled charge to the feedback capacitor.
The CVC gain is variable across 255 steps by changing the
feedback capacitor from 35.6 fF to 9.078 pF. The minimum
CVC gain is 1.1 × 1011 V/C with a 14-pC input range. The
maximum CVC gain is 2.8 × 1013 V/C with a 55 fC input
range. Any imbalance between the input sampling capacitors
is adjustable in the range of ±/4.5 pF by using the offset
compensation capacitors installed at the input to the CA.
On the other hand, the CA can sense the current format
input when the sampling capacitor is not connected at the input
portion of the CA. The current to voltage conversion (IVC)
is achieved by integrating the input current in the feedback
capacitor. The IVC gain is variable across 16 steps by changing
the integration time. The minimum gain is 2.7 M with a
±288.2-nA input range. The maximum gain is 88 G with a
±8.8-pA input range.
The CA has an input capacitor consisting of comb electrodes
in the top metal layer that can be used as a relative humidity
sensor. The comb electrodes are covered with a passivation
(SiN) layer and a polyimide layer. Since the polyimide layer
changes its dielectric constant depending on the humidity, this
comb electrodes capacitor serves as a relative humidity sensor.
Fig. 18 shows the experimental results of the CA in charge
sensing mode. The IRN was 25 aCrms in the band from
0.01 to 1 Hz, as shown in Fig. 18(a). It is clear from Fig. 18(b)
that the CA can sense the 1 fC input step generated by
the BIST circuit. Fig. 19 shows the experimental results of
the CA in current sensing mode. The IRN was 19 fArms in
the band from 0.01 to 1 Hz, as shown in Fig. 19(a). It is clear
from Fig. 19(b) that the CA can sense the 1 pA input step that
is generated by the BIST circuit. A comparison between this
CA and another commercially available CVC [16] is shown
in Table III.
V. M ULTIFUNCTION E NVIRONMENTAL S ENSOR AFE
The die photograph of the fabricated AFE is shown in Fig. 4.
The analog portion occupies a relatively smaller area than the
2260
Fig. 19. Measurement results of the CA in current sensing mode. (a) 0–1
Hz input-referred current noise. (b) 1 pA step response with 1 Hz cutoff LPF.
Fig. 20. Prototype of a multifunction environmental sensor.
TABLE III
C OMPARISON OF THE CA W ITH A C OMMERCIALLY AVAILABLE CVC
digital and memory portions as a result of the adoption of
the weak-inversion biasing technique. A prototype of a single
package multifunction environmental sensor is implemented
along with the fabricated AFE, as shown in Fig. 20. The pro-
totype is able to monitor humidity and temperature using the
on-chip humidity and temperature sensors, and atmospheric
pressure using a MEMS pressure sensor that is stacked on
the AFE die. The temperature dependence of the humidity
and pressure sensors is corrected by modifying the sensed
temperature data in the digital block using calibration data
that is stored in OTP memories. The current consumption is
2.5 mA in continuous operation mode and reduces to 2 μA
at 0.01 Hz ODR.
Fig. 21 shows the experimental results of the atmospheric
pressure measurements. The data shows that the fabricated
sensor is able to capture 15 cm differences in altitude. The
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 51, NO. 10, OCTOBER 2016
Fig. 21. Experimental results of atmospheric pressure measurements. (a)
Experimental image. (b) Step response to 15 cm height change.
Fig. 22. Experimental results of relative humidity measurements. (a) DC-1
Hz input-referred RH noise. (b) 0.6% RH step response with 1 Hz cutoff LPF.
measured RMS noise of the pressure sensor is equivalent
to 0.74 cm in altitude at 20 Hz ODR, where the current
consumption, measured as 183 μA including 33 μA of the
transducer, meets the target specification stated in Section I.
Fig. 22 shows the experimental results of the relative humidity
measurements. The data shows that the fabricated sensor is
able to capture 0.6% differences in relative humidity. The mea-
sured rms noise of the relative humidity sensor is equivalent
to 0.006% at 20 Hz ODR.
VI. C ONCLUSION
In this paper, we proposed a technique to reduce the
low-frequency noise of an amplifier by using weak-inversion
biasing while keeping its area and its bias current constant.
An AFE using a low-noise IA, CA, and CT- ADC was
designed using the proposed technique, and implemented in
standard 0.18 μm CMOS. The fabricated AFE was able to
sense 1 μV, 1 fC, and 1 pA level signals. A prototype of a mul-
tifunction (humidity, temperature, pressure) single-packaged
sensor was also successfully implemented that incorporated
the AFE. There is increasing demand for AFEs that simulta-
neously achieve lower noise, smaller power consumption, and
smaller die area. We believe that the proposed technique will
be prove useful when responding to these demands.
MARUYAMA et al.: AFE FOR A MULTIFUNCTION SENSOR EMPLOYING A WEAK-INVERSION BIASING TECHNIQUE
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Masahiko Maruyama received the B.S. and
M.S. degrees in electronic engineering from
Nagasaki University, Nagasaki, Japan, in 1994 and
1996, respectively.
In 1996, he joined Sharp Corporation, Nara, Japan,
where he has been working on designing of ana-
log/digital mixed-signal LSIs for wireless commu-
nications and sensing. His current research interests
are in sensor systems, low-noise amplifiers, and
analog front-end circuits.
Authorized licensed use limited to: Amorn Jiraseree-Amornkun. Downloaded on March 20,2023 at 02:13:49 UTC from IEEE Xplore. Restrictions apply.
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Shigenari Taguchi (M’00) received the B.S. and
M.S. degrees in electronic engineering from Osaka
University, Osaka, Japan, in 1994 and 1996,
respectively.
In 1996, he joined Sharp Corporation, Nara, Japan,
where he has been working on designing ana-
log/digital mixed-signal LSIs for wireless commu-
nications and sensing. His current research interests
are in sensing devices and their analog front-end
circuits.
engineering from Kyoto Institute of Technology,
Kyoto, Japan, in 1985.
Japan, where he has engaged in research and devel-
opment of RF analog and mixed-signal circuits,
mainly, phase-locked loops and wireless systems.
Currently, his research interests are in analysis and
design of sensor systems and CMOS analog circuits.
Kunihiko Iizuka (M’94) received the B.S. and
M.S. degrees in mathematics from Osaka University,
Osaka, Japan, in 1979 and 1981, respectively, and
the Ph.D. degree from Tokyo Institute of Technol-
ogy, Tokyo, Japan, in 2009. His dissertation was
on RF and analog integrated circuits for television
broadcast receivers.
He continued study of mathematics as a postgradu-
ate at Osaka University from 1981 to 1984. In 1984,
he joined Sharp Corporation, Japan, where he was
involved in the research of computer simulation
systems. From 1991 to 1993, he was at the Center for Adaptive Systems,
Boston University, Boston, MA, USA, as a Visiting Researcher, working on
neural network systems. He was a Visiting Professor with the Innovation
Center of Gunma University in 2007 and 2008. Since 1993, he has been
working on research and development of analog and mixed-signal LSI circuits
for vision systems, high-precision ADCs, wireless systems, and sensors.
Currently, he is working on the application of analog electronic circuits to
biomedical systems in Sharp. He has authored and coauthored more than 50
refereed journal and conference technical articles. He has been granted more
than 150 patents and has many more pending applications.
Dr. Iizuka was a corecipient of the International Solid-State Circuits Con-
ference (ISSCC) Outstanding Panel Award of 2002. He had been a member
of the ISSCC technical program committee from 2001 to 2008 and the Far
East regional subcommittee chair for ISSCC 2005 and 2006. He had been
a member of the Asian Solid-State Circuits Conference (A-SSCC) technical
program committee from 2006 to 2007 and the data converter subcommittee
chair for A-SSCC 2008 and 2009. He served as vice chair of IEEE SSCS
Kansai Chapter from 2010 to 2011 and chair from 2012 to 2013. He served as
chief editor of the IEICE Transactions on Electronics Special Section in 2009
and as associate editor of the IEEE J OURNAL OF S OLID -S TATE C IRCUITS
from 2009 to 2012.