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  • 01 131192 015 8146371931 15102020 102310pm

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    The objective of the lab was to design and test a 4-bit Memory Address Register (MAR) using a 74LS173 chip. Pins 1 and 2 were grounded to convert the three-state output to a two-state output so the MAR output would not be connected to the write bus. The MAR was tested by observing its response to different input patterns on the clock, clear, and data lines and verifying the expected output values. The task of implementing the 4-bit MAR was completed successfully.

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    01-131192-015-8146371931-15102020-102310pm

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    The objective of the lab was to design and test a 4-bit Memory Address Register (MAR) using a 74LS173 chip. Pins 1 and 2 were grounded to convert the three-state output to a two-state output so the MAR output would not be connected to the write bus. The MAR was tested by observing its response to different input patterns on the clock, clear, and data lines and verifying the expected output values. The task of implementing the 4-bit MAR was completed successfully.

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    4 views3 pages

    01 131192 015 8146371931 15102020 102310pm

    Uploaded by

    ahmedtasadduq6123
    The objective of the lab was to design and test a 4-bit Memory Address Register (MAR) using a 74LS173 chip. Pins 1 and 2 were grounded to convert the three-state output to a two-state output so the MAR output would not be connected to the write bus. The MAR was tested by observing its response to different input patterns on the clock, clear, and data lines and verifying the expected output values. The task of implementing the 4-bit MAR was completed successfully.

    Copyright:

    © All Rights Reserved
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    Download as docx, pdf, or txt
    of 3

    Computer Architecture &

    Organization Lab
    Lab # 3

    NAME: KAMRAN WAHAB

    ENROLLMENT NO.: 01-131192-015

    SUBMITTED TO: MA’AM RIDA KHALID

    Department of Software Engineering


    Lab 03

    Memory Address Register Implementation for SAP-1 Computer


    Architecture

    Objective:

    The objective of the lab is to make and test the working of Memory Address Register.

    Procedure:

    Chip C4, a 74LS173, is a 4-bit buffer register; it serves as the MAR. Notice that pins 1 and 2 are
    grounded; this converts the three-state output to a two-state output. In other words, the output of the MAR
    is not connected to the W bus, and so there is no need to use the three-state output.

    Observations:
    CLR CLK G1 G2 Dn (inputs) Qn (output)
    H X X X X L
    L L X X X (edge trigger)
    L (edge trigger) H X X (edge trigger)
    L (edge trigger) X H X (edge trigger)
    L (edge trigger) L L L L
    L (edge trigger) L L H H
    Diagram:
    Result:

    Conclusion:

    The task was performed successfully.

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