Past Paper Revision

Computer Architecture & Data

Made by: Kevper ( Kevin & Jasper) 2023.11.15

Computer Architecture
Q1-Q2
Q1 — CPU
A)
— accumulator (ACC)
— program counter (PC)
— memory address register (MAR)

B)
— It sends control signals
— It decodes an instruction
C)
I) To carry out a fetch-execute cycle
II)
— It can now process two instructions
simultaneously but lose some speed
— It can increase the performance
Q2 — CPU
A)
— Data fetched from RAM is stored in the MAR
— Data from MAR is sent to ALU to be executed
— ALU performs calculation on data
— After calculations, ALU sends data
to MDR
— Data is sent from MDR to be written to RAM

B)
— Embedded system is built into a device
— It runs on firmware

C)
— Laptops and calculators both need data that
should not be deleted
Data Compression
Q3
Q3 — DATA
i) Input
ii) Lossy compression
— It removes unnecessary data
— It removes the sound that can not be heard by
human ears
— The data is permanently removed
(Original file can not be founded)

iii)
— It will be quicker for users to download
— It will takes up less storage space
THANK YOU