Impact of Non-Rectangular Cross-Section on

Electrical Performances of GAA FETs

Tripty Kumari*, Jawar Singh, and Pramod Kumar Tiwari
Electrical Engineering Department
Indian Institute of Technology
Patna, India
2021 IEEE 18th India Council International Conference (INDICON) | 978-1-6654-4175-9/21/$31.00 ©2021 IEEE | DOI: 10.1109/INDICON52576.2021.9691574

*Email: 1821ee09@iitp.ac.in

Abstract—We investigate the short-channel immunity of var-

ious cross-section gate-all-around (GAA) field-effect transistors
(FETs): Square (Sq), Rectangular (Re), Trapezoidal (Tz), Cir-
cular (Cr), Elliptical (Ep), and triangular with rounded corners
(Tr) in terms of above-threshold inversion electron charge density,
drain induced barrier lowering (DIBL), subthreshold swing (SS)
degradation, gate capacitance (Cgg ), threshold voltage roll-off,
and ON-by-OFF ratio. These cross-sections are obtained by
varying one or the other key parameters viz. Fin top width
(Wtop ), Fin height (HF in ), inclination angle (θ), and radius of
curvature (R). The impact on electrical performances of these
parameters as dictated by the processing technology has been
analyzed. It is observed that at channel length, LG = 20 nm
the trapezoidal GAA (TzGAA) FET offers 30% reduction in
DIBL, 6.4% less degradation in SS, 57% reduction in threshold
voltage roll-off, and 22% higher gate capacitance compared to the
rectangular counterpart if their bottom widths are equal. Despite
ReGAA FET has slightly higher Cgg compared to EpGAA, the
later shows enhanced immunity to short-channel effects. The Fig. 1. Cross-sectional view of possible GAA FETs: Square (Sq), Rectangular
electron density of TzGAA FET has been observed to decrease (Re), Trapezoidal (Tz), Circular (Cr), Elliptical (Ep), and Triangular (Tr).
with an increase in θ, HF in , Wtop , and R. Besides, we calculated
the analog/RF parameter dependence on θ of TzGAA FET. We
believe our findings could represent guidelines for the design of trapezoidal and triangular cross-sections [10], [14] , circu-
high-performance GAA FETs.
Index Terms—Gate-all-around (GAA), multi-gate FET, non- lar cross-section GAA FETs [15]. However, reports on the
rectangular cross-section, trapezoidal, short-channel immunity trapezoidal cross-section GAA FETs along with the impact
analog/RF performance. of curvature at the corners, which are inevitable during the
fabrication process are negligible. Also, it is timely to compare
I. I NTRODUCTION the performances of all these contenders of FinFET. So,
Gate-all-around (GAA) field-effect transistors (FETs) are in this article, we report a comparative analysis of varied
extensively explored devices as a potential successor of current cross-section GAA FETs i.e., square, rectangular, trapezoidal,
industry-employed FinFET technology owing to its excellent circular, elliptical, and round-cornered triangular over FinFET
electrostatic controllability over the channel with the highest in terms of gate-channel integrity. Besides, we explored the
normalized ON-by-OFF ratio. Plenty of fabrication steps pro- dependence of analog/RF parameters on θ of TzGAA FET.
posed in the literature [1], [2] suggest that the cross-section
of finally fabricated device depends on numerous process II. TCAD C ALIBRATION AND S IMULATION SETUP
steps such as anisotropic dry etching with SiN hard mask Fig. 1 shows a cross-sectional view of different geometries
[3], oxidation temperature [4], time, dopant concentration, of GAA FETs that have been numerically simulated and
ambiance (dry or wet), smoothing technologies to remove analyzed. These are square (Sq), rectangular (Re), Trapezoidal
line edge roughness (LER) such as hydrogen annealing [5], (Tz), circular (Cr), Elliptical (Ep), and round-cornered trian-
hydrogen thermal etching [6]. This result in a number of cross- gular (Tr). It can be noted that these geometries are obtained
sectional shapes of GAA FETs other than rectangular such as by varying one or other of the four key parameters viz. height
square, [7] circular [8], triangular, elliptical [9], and trapezoidal of the Fin (HF in ), inclination angle (θ), top width of the Fin
[10]. (Wtop ), and the radius of curvature (R), depicted in Fig. 2 (a).
It is observed that a plethora of work has been done on the For example, rectangular GAA FET is obtained by increasing
digital and analog performances of trapezoidal cross-section the height of square GAA FET. Radius of curvature can be
FinFETs [11], [12], [13], semi gate-around structures with defined as the perpendicular distance from the angle bisector

978-1-6654-4175-9/21/$31.00 © 2021 IEEE

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 7
X 10 9
4.0 H =10 nm W =10 nm
Fin
H =10 nm top

)
Fin
W =10 nm

mA)
-3
-7
top 8 H =15 nm
10

mm
L =10 mm H =15 nm Fin
G
3.5 Fin
H =20 nm

(
D= 5 nm
Fin
7 H =20 nm

Electron Density (
Fin

DS
-8

Drain Current (A)

10 H = 25 nm
Fin H =25 nm

ON Current, I
3.0 Sq Fin
6
-9
10 Re
2.5 5
V =0.05V
DS
-10
10 V =0.1 V
DS 4
2.0
V =0.2 V Re
-11 DS
10 3
Symbol: Experiment Sq
1.5

-12
Line : Simulation 2
10
0 5 10 15 20 25 30 0 5 10 15 20 25 30
0.0 0.2 0.4 0.6 0.8 1.0

(b) Gate Voltage, V (V)

(a)
Inclination Angle, q ( °) (b)
Inclination Angle, q ( °)
GS

Fig. 2. (a) Trapezoidal cross-section depicting the key parameters that can be Fig. 3. (a) Electron density and (b) Saturation current of the TzGAA FET
varied to get other cross-sections shown in Fig. 1. (b) Calibration of model with different Fin height and angle of inclination at VGS =1 V and VDS =0.05
parameters to match the transfer characteristics of experimental nanowire FET V.
[2], with diameter, D=5 nm, gate length=10 µm, and effective width=16 nm.

spatial distribution of electron density over the entire channel

of any corner to its edges, shown in Fig. 2 (a). For convenience,
a normalized radius of curvature is defined as r = 2R/Wtop so
that a square cross-section at r = 0 emerges as circular cross-
section at r = 1. Similarly, an elliptical GAA FET is obtained
from a ReGAA FET by applying appropriate curvature at the
corners. A TzGAA FET is obtained by inclining the sidewalls
of ReGAA FETs. The bottom width of trapezoidal cross-
section (Wbot ) can be related to its top width and inclination
angle as:
Wbot = Wtop + 2HF in tan θ (1)
A TzGAA FET with Wtop =2 nm and θ=30◦ and r=1 results
in round-cornered triangular geometry as depicted in th Fig.
1 (Tr). Unless stated otherwise the value of the parameters
used in the simulation are: gate length, LG =20 nm, HF in =20
nm, Wtop =10 nm, θ=7◦ for trapezoidal cross-sections, and
high-k gate stack with effective oxide thickness, EOT=1.5
nm. The source and drain regions are N-type doped silicon
with a concentration of 5×1019 cm−3 and the channel re-
gion is lightly doped P-type silicon with a concentration of
1016 cm−3 . A metal with workfunction of 4.5 eV is used
as the gate electrode. 3D numerical simulations have been
carried out in Synopsys Sentaurus [16] TCAD tool. Doping
and temperature-dependent SRH recombination model, Philips
unified mobility model, Lombardi high-k degradation model,
and density-gradient quantization model were used to match
the experimental results of [2], shown in Fig. 2 (b). We have
not taken orientation dependent mobility model into account.
III. R ESULTS AND DISCUSSION
In this section, we analyzed the electrostatic control of
square, rectangular, trapezoidal, circular, elliptical, and round-
cornered triangular GAA FETs that are shown in Fig. 1. One
of the ways to analyze better electrostatic controllability is the
measure of electron inversion charge density in the channel
region of the device in above threshold region of operation.
Since we have chosen the same lightly doped P-type silicon for
the channel region in all the FETs, a higher electron inversion
charge density in the channel region in the ON state would
imply better inversion capability of the gate. We calculated
the electron density in each device by integrating the uneven
region and dividing it by its volume in TCAD.
A common feature of all multi-gate devices is that the
inversion charge in subthreshold region is proportional to
device cross-sectional area while it is proportional to the
gated perimeter of the device above threshold region [17].
Fig. 3 (a) shows the electron density of TzGAA FET with
varying inclination angle for different Fin height in above
threshold region of operation. It can be noted that when
inclination angle approaches 0◦ , the trapezoidal Fin becomes
rectangular Fin and for a particular case of HF in = Wtop
and θ=0◦ , the trapezoidal Fin is square. The figure shows
that the electron inversion charge density decreases for both
square and rectangular Fins with increasing inclination angle
indicating degradation of gate control over the channel. This
can be attributed to the fact that increasing the inclination
angle increases the bottom width of the channel and thus gate
loses its controllability. Besides, we see that square cross-
section Fin shows the largest electron density and thus the
best electrostatics control among trapezoidal and rectangular
geometries. It should be noted that the actual ON current (with-
out normalization), increases with increasing inclination angle,
as shown in Fig. 3 (b) for both square and rectangular Fins,
but this increase is due to an increase in the gated perimeter
of the device with increase in θ. Besides, increasing the Fin
height also decreases the electron density and increases the ON
current. The increased ON current of inclined geometries and
larger HF in is penalized with degraded gate controllability,
as shown in terms of inversion charge density in Fig. 3 (a).
While an inclination from 0◦ to 30◦ for HF in =10 nm decreases
the electron density by 17.2% , the ON current increases by
47.9% and for HF in =25 nm the same decreases by 36% and
increases by 82% respectively.
Unlike planar FETs where charges are evenly distributed
along the width, the charges in multi-gate FETs are not evenly
distributed along the width due to the presence of corners and
non-vertical sidewalls. It leads to non-linear dependence of
charge density on the width and inclination of GAA FETs.
Fig. 4 (a) shows the electron density variation with θ for
different Wtop . It is seen that at θ=0◦ , for a constant rate
of decrease in Wtop has a non-constant rate of increase in

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 7
X 10 7 7
4 X 10
10
W =5 nm W = 20 nm L =20 nm

)
g

mA)
)

top top

-3
-3

mA)
Re 9
2.5
mm

W =10 nm

mm
top
W
top
= 15 nm L =30 nm
g
8 6

(
(
W =15 nm
Electron Density (

DS

DS
Electron Density (
top
3
7

ON Current, I
W =20 nm

ON Current, I
top

5
5
2 2.0
4

3 W = 10 nm
Sq
top
4
H =20 nm 2 W = 5 nm
Fin top
1
0 5 10 15 20 25 30 0 5 10 15 20 25 30
(a)
Inclination Angle, q °
(b)
Inclination Angle, q ( °) 1.5
3
0 5 10 15 20 25 30

Inclination Angle, q (°)

Fig. 4. (a) Electron density and (b) Saturation current of TzGAA FET with
different top width (Wtop ) and varying degree of inclination at VGS =1 V and
VDS =0.05 V. Fig. 6. Electron density and ON current with respect to inclination angle for
different Lg at VGS =1 V and VDS =0.05 V.

in presence of quantum, the electron density shifts away from

the interface into the bulk (Fig. 5 (a)). The saturation current
on the other hand increases with increase in θ and Wtop due
to overall increase in the gated perimeter of the device, shown
in Fig. 4 (b).
The electron density and saturation current dependence on
inclination angle, θ and Lg is shown in Fig. 6. The electron
density reduces, albeit, small with reduction in Lg indicating
loss of gate controllability at short-channel lengths, while
the ON current increases due to enhanced field at shorter
length. The impact of the radius of curvature at corners of
Fig. 5. Contour plot of electron density of TzGAA FET with (a) θ=0◦ and
ReGAA FETs is investigated in Fig. 7 (a). Although mild,
Wtop =5 nm, (b) θ=15◦ and Wtop =5 nm, (c) θ=30◦ and Wtop =5 nm, (d) but curvature at the corners of rectangular Fin reduces the
θ=0◦ and Wtop =10 nm, (e) θ=0◦ and Wtop =15 nm, (f) θ=0◦ and Wtop =20 electron density in absence of corner effect. Only in a special
nm, and (g) θ=0◦ and Wtop =5 nm without quantum model at VGS =1 V
VDS =0.05 V.
case when HF in = Wtop and r > 0.5, the square Fins take the
circular shape and the electron density of the device increases
indicating better electrostatic controllability. Fig. 7 (b) shows
the charge density, indicating the charge density non-linearity the impact of curvature at the corners of the trapezoidal and
with Wtop attributing to the presence of corners and quantum the rectangular cross-section GAA FET. The rectangular cross-
effect (at Wtop =5 nm). In addition, it can be noted that a larger section turns out to be elliptical at r=1. It is observed that a
Wtop Fin (20 nm) is almost independent of θ, while smaller rectangular cross section holds 4.8% higher electron density
Wtop Fin (5 nm) has nonlinear dependence on θ attributing compared to elliptical cross-section while other trapezoidal
to quantum effects. Fig. 5 (a), (b), and (c) shows the contour cross-section holds 8% higher electron density compared to
plot of electron density of TzGAA FET with Wtop =5 nm and the round-cornered trapezoidal cross-sections.
θ=0◦ , 15◦ and 30◦ respectively in above-threshold region of Gate capacitance (Cgg ) is one of the pragmatic parameters to
operation. The contour plot shows that the inversion charge examine the gate controllability and immunity of the device to
is proportional to gated perimeter of the device, however, short-channel effects. Fig. 8 shows the gate capacitance plot of
the presence of corners introduces extra inversion charges. all the possible cross-sections of GAA FETs shown in Fig. 1.
At θ=0◦ and Wtop =5 nm, the inversion charges are present We have taken two instances of TzGAA FET for comparison;
in the bulk rather at the interfaces due to quantum effects, one with Wtop =5 nm denoted by TzGAA (A) and the othe
adding nonlinearity in the plot observed in Fig. 4 (a). Similarly with Wtop =10 nm denoted as TzGAA (B) with θ=7◦ for both.
Fig. 5 (d), (e) and (f) shows the contour plot electron density We have also considered a trapezoidal FinFET with all the
of TzGAA FET with θ=0◦ and Wtop =10 nm, Wtop =15 nm parameters same as TzGAA (B) FET for evaluation of its
and Wtop =20 nm respectively in the above-threshold region of performance against various cross-sections of GAA FET. Since
operation. With large Wtop , the corners are weakly connected, all the mentioned FETs have different cross-sectional area, we
while as Wtop decreases the interaction among the corners divided the capacitance with area to calculate the effective
increases, resulting in non-linear electron density of Fig. 4 (a). capacitance of the devices. Compared to the SqGAA FET, the
Fig. 5 (g) shows the elctron density contour plot by switching CrGAA FET (with diameter equal to the width of the SqGAA
off the quantum model. As can be seen, in absence of quantum FET) has 7% higher gate capacitance and thus enhanced gate-
effect, the electron density is distributed at the perimeter, while channel controllability. TzGAA FET (A) has 22% higher Cgg

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 7
X10 7
X 10 5.0 TzGAA (A)
2.6
3.6 H = 10 nm W =10 nm W =10 nm q=0°
)

Fin top Re

)
-3

top
Cr 4.5 TzGAA (B)

-3
Ep
q=7°
mm

mA)
H = 15 nm

mm
3.4 H =20 nm
q=0° 2.4
Fin
Fin

4.0
Electron Density (

TzFinFET

Electron Density (
3.2
Sq
Tz q=15°

Drain Current (
H = 20 nm 2.2
3.5 Tr
q=21°
Fin
3.0
Re H = 25 nm
2.8
Fin Ep
2.0 3.0 Re
2.6 q=30°
2.5 Ep
2.4 1.8

2.0 Sq
2.2
1.6
2.0 1.5 Cr
(a) (b)
0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.2 0.4 0.6 0.8 1.0
1.0
Normalized Radius of Curvature (2R/W ) Normalized Radius of Curvature (2R/W)
top

0.5
V =0.05
DS

Fig. 7. Electron density of ReGAA FET with different Fin heights (HF in ) 0.0
0.0 0.2 0.4 0.6 0.8 1.0
and varying radius of curvature at the corners (VGS =1 V and VDS =0.05 V).
(b) Electron density of TzGAA FET (Wtop ̸= HF in ) cross-section with Gate Voltage, V
GS
(V)

different angle of inclination and varying radius of curvature at the corners

(VGS =1 V and VDS =0.05 V). Fig. 9. Transfer characteristics of various structures shown in Fig. 1.
mm )2

200 Cr 4.5
TzFinFET
Sq
(fF/

4.0

OFF Current (nA)

TzGAA (A)
3.5
gg

TzGAA (B)
150
Re
Gate Capacitance, C

3.0
Ep

TzGAA (B) 2.5

TzGAA (A)
100
Tr Tr
2.0
TzFinFET
1.5

50 1.0 Re
H =20 nm Ep
fin
0.5 Sq
Cr
-0.5 0.0 0.5 1.0 0.0
Gate Voltage, V (V) Different cross-section GAA FET
GS

Fig. 8. Gate capacitance of various structures shown in Fig. 1 at VDS =0 V. Fig. 10. OFF current of different cross-section GAA FETs.

and thus better short-channel immunity compared to ReGAA circuit operation, but least leakage density (shown in Fig. 10)
FET. However, TzGAA FET (B) has 13% less Cgg compared and short channel immunity, while a larger driving current FET
to the ReGAA FET. Elliptical shape with rounded corners has results in faster circuit operation with a cost of higher leak-
∼3% less Cgg compared to rectangular counterpart as had age current and inferior short channel immunity (investigated
become evident from the electron density plot in Fig. 7 (b). later). ON-by-OFF ratio basically shows the switching ability
This is attributed to the sharp corners of rectangular cross- of FETs. Fig. 11 shows the ON-by-OFF ratio of different cross-
section absent in elliptical and thus less coupling between the section GAA FETs. CrGAA FET shows the highest ratio and
adjacent gates. The Cgg of TzFinFET is observed to be 24.8% TzFinFET the least. Although ReGAA FET showed higher ON
less compared to TzGAA (B) owing to partial wrapping of gate current compared to EpGAA FET in Fig. 9, the ON-by-OFF
around the channel. TrGAA FET exhibits the least Cgg among ratio of later is higher because of slightly higher OFF current
all the GAA FETs because of larger bottom width.
Fig. 9 shows the transfer characteristics of all the cross-
section GAA FETs at VDS =0.05 V. It is seen that the CrGAA X 10
4

2.5
FET with highest electron density and Cgg has the least driving Cr
TzGAA (A)

current attributing to the fact that it has the least cross-sectional

2.0
area. TrGAA FET with least Cgg among all GAA FETs has Sq
ON/OFF Ratio

the highest driving current due to largest cross-section area.

1.5
ReGAA FET with larger electron density and Cgg (due to
TzGAA (B)

corner effects) compared to EpGAA FET and larger cross-

1.0
TzFinFET

section area has higher driving current compared to EpGAA Ep

Re
FET. TzFinFET with cross-section area same as TzGAA (B)
0.5
Tr
FET has smaller driving current compared to TzGAA (B)
FET owing to semi-wrapping of gate which contributes less 0.0
inversion charge density and Cgg . Thus we conclude that Different cross-section GAA FET

there is trade-off between driving current and electrostatic

controllability. A smaller driving current FET results in slower Fig. 11. ON-by-OFF ratio of different cross-section GAA FETs.

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 210 160

Cq Cr
180
Sq
DIBL (mV/V) 140 Sq

SS (mV/dec)
150 TzGAA (A) TzGAA (A)

Ep Ep

120 Re 120 Re

TzGAA (B) TzGAA (B)

90 Tr Tr
100
TzFinFET TzFinFET
60

30 80

0
60
20 30 40 50 60
20 30 40 50 60
Gate Length, L (nm)
G
Gate Length, L (nm)
G

Fig. 12. Drain induced barrier lowering (DIBL) variation of different cross-
section GAA FETs with respect to gate length (LG ). Fig. 14. Subthreshold swing (SS) variation of different cross-section GAA
FETs with respect to gate length (LG ).

0.30

0.25

roll-off is concerned. TzFinFET exhibits the largest threshold

(V)

0.20

Cr voltage roll-off compared to GAA FETs. Fig. 14 shows the

ti
V

0.15 Sq
subthreshold swing (SS) variation with respect to channel
TzGAA (A)

0.10
Ep
length of different cross-section GAA FETs. Circular gate FET
Re shows the least degradation of 27.4% in the SS when LG is
TzGAA (B)
0.05
Tr
reduced from 60 nm to 20nm. Square, TzGAA (A), elliptical,
TzFinFET rectangular, TzGAA (B), triangular, and TzFinFET exhibit SS
0.00
20 30 40 50 60
degradation of 28.7%, 31%, 31.3%, 33.7%, 38.5%, 41.9%, and
Gate Length, L (nm)
52.8% respectively with decrease in LG from 60 nm to 20 nm.
G

Fig. 13. Threshold voltage variation of different cross-section GAA FETs

with respect to gate length (LG ).
in ReGAA FET due to the presence of corners.
Fig. 12 shows the short-channel immunity of all the different
cross-sections of GAA FETs in terms of drain-induced barrier
lowering (DIBL). As concluded earlier, the CrGAA FET has
the least DIBL of 49.3 mV/V at LG of 20 nm compared
to the other cross-section GAA FETs and TzFinFET. It can
be interestingly noted that although the gate capacitance of
EpGAA FET observed earlier was less compared to rectan-
gular counterpart, DIBL of EpGAA FET is 6% less than that
of ReGAA FET. This can be attributed to the corner effect
and coupling of adjacent gates in the case of ReGAA FET,
which contributes to more charge density and hence the Cgg
and slightly higher leakage current compared to EpGAA FET.
TzFinFET shows severe degradation at short-channel lengths
compared to GAA FETs.
Fig. 13 shows the threshold voltage roll-off of different
cross-sectional GAA FETs. It is observed that threshold volt-
age roll-off of CrGAA FET from LG =60 nm to LG =20 nm
is 31.2% compared to 37%, 44.6%, 58.6%, 62.7%, 84%,
91%, and 187% respectively of square, TzGAA (A), el-
liptical, rectangular, TzGAA (B), triangular, and TzFinFET
counterpart. The EpGAA FET proves to be better than the
rectangular counterpart as far as DIBL and threshold voltage
Table I shows the effect of inclination angle (θ) of Tz-
GAA FET on analog/RF parameters for a gate length of
20 nm and VGS = VDS = 1 V . Transconductance (gm )
is defined as the rate of change of drain current with gate
∂IDS
voltage (gm = ∂V GS
). The maximum transconductance value,
gm (max) of TzGAA FET increases by 60% with an increase in
inclination angle from 0◦ to 30◦ due to increment in effective
width of the channel. However, as mentioned earlier, this
increase in gm (max) is afflicted with short-channel effects.
Output resistance (Ro ), which determines the intrinsic gain
(Av =gm Ro ) of the transistor is extracted as the inverse slope
of the output characteristic of the device in saturation regime.
With the increase in θ from 0◦ to 30◦ , the output resistance
decreases by 48.4%, and as a result Av decreases by 15%.
Transconductance generation factor (TGF=gm /IDS ) defined as
available gain per unit value of power dissipation decreases
by 42% with the increase in θ from 0◦ to 30◦ . Unity gain
gm
frequency or transition frequency (fT = 2πC gg
) is defined as
the frequency at which short circuit current gain falls to unity.
The maximum frequency of oscillation (fmax ) is the frequency
at which power gain falls to unity. The value of fmax has
been extracted using the ”unit-gain-point” method in Sentaurus
Visual. Both the transistor figure of merits fT and fmax has
non-linear dependence on θ. The value of fT as well as fmax
first increases with θ and then decreases. Gain bandwidth
gm
product (GBW= 2π10C gd
) decreases by 7% with increase in
◦ ◦
θ from 0 to 30 .

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2825–2828, 1997.
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IV. C ONCLUSION [6] T. Tezuka, E. Toyoda, S. Nakaharai, T. Irisawa, N. Hirashita,
Y. Moriyama, N. Sugiyama, N. Taoka, Y. Yamashita, O. Kiso et al.,
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K. S. Oh, and W.-S. Lee, “Sub-10 nm gate-all-around cmos nanowire

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