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Bidirectional Wide Range and High Voltage Gain Buck-Boost DC-DC Converter For EV Chargers Empowering V2G-G2V Applications
Bidirectional Wide Range and High Voltage Gain Buck-Boost DC-DC Converter For EV Chargers Empowering V2G-G2V Applications
Bidirectional Wide Range and High Voltage Gain Buck-Boost DC-DC Converter For EV Chargers Empowering V2G-G2V Applications
DOI: 10.1049/pel2.12630
ORIGINAL RESEARCH
1
Department of Electrical Engineering, Hakim Abstract
Sabzeveri University, Sabzever, Iran
This paper proposes a new wide range bidirectional buck-boost dc-dc converter with
2
School of Electrical and Electronic Engineering, improved voltage gain in either forward (discharging) or backward (charging) direction
University College Dublin, Dublin, Ireland
for electric vehicle (EV) applications. The converter has high-voltage gain ratio with no
3
Faculty of Science and Engineering, Swansea theoretical limits in the output voltage in both directions, and presents a good balance
University, Swansea, U.K.
between the component count, number of conducting components, semiconductor device
Correspondence
ratings, having direct connection between input and output terminals, and efficiency which
Rahim Ildarabadi, Department of Electrical makes it a practical solution for the EV charger levels 1, 2, and 3 power converter unit. The
Engineering, Hakim Sabzeveri University, Sabzever, operating principle, steady-state characteristics including the current and voltage stress of
Iran.
Email: r.ildar@hsu.ac.ir
the switches, and comparison with other state of the art dc-dc bidirectional converters are
explained in detail. In order to validate the theoretical analysis, a 500 W, 200 V or 40 V to
Funding information 180 V laboratory prototype is implemented. The obtained results confirm the applicability
Science Foundation Ireland, Grant/Award Number: of this structure and demonstrate a peak efficiency of 97.2% in the forward and 97.6% in
SFI/21/SPP/3756
the backward direction modes of operation.
This is an open access article under the terms of the Creative Commons Attribution-NonCommercial-NoDerivs License, which permits use and distribution in any medium, provided the
original work is properly cited, the use is non-commercial and no modifications or adaptations are made.
© 2023 The Authors. IET Power Electronics published by John Wiley & Sons Ltd on behalf of The Institution of Engineering and Technology.
FIGURE 3 Equivalent circuit of the proposed converter in forward mode (a) state 1, (b) state 2, (c) state 3 and backward mode (d) state 1, (e) state 2, (f) state 3.
2.1 Forward direction operation mode associated with CCM and four states associated with DCM
operation as defined in the following.
In the forward direction operation or the discharging mode, the State 1 of CCM and DCM [0-t1 ]: During 0 ≤ t < DTs or
power flows from V1 to V2 . There are two states of operation the state-1 of the forward direction mode and according to
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GHOLAMI ET AL. 233
FIGURE 4 Typical waveforms of CCM: (a) forward and (b) backward modes.
Figure 3(a), S1 and S3 are turned on, while S2 and S4 are turned ⎧ v = L dL1 = v
off. In this state, L2 is charged by the input dc source. Thus, ⎪ L1 dt C3
FIGURE 5 Typical waveforms of DCM: (a) forward and (b) backward modes.
State 2 of CCM [t1 -Ts ] and DCM [t1 -t2 ]: Contrary to state
1, during this interval, as shown in Figure 3(b), S1 and S3 are D (V1 ) + (1 − D ) (V1 − vC 3 ) = 0 (4)
turned off whereas the body diodes of S2 and S4 are conduct-
ing. The inductor L1 releases its energy into the secondary side
D (−iL1 ) + (1 − D ) (iL2 − iL1 ) = 0 (5)
through the body diode of S2 . Similarly, L2 and the primary side
source release energy into C3 through the body diode of S4 .
Therefore, we have: where D represents the duty cycle of S1 and S3 .
By using (4), the average voltage across C3 can be determined
⎧ v = L dL1 = −V − V + v as
⎪ L1 dt 2 1 C3
⎪ dL2
⎨ vL2 = L = V1 − vC 3 (2) 1
⎪
dt vC 3 = V (6)
dv 1−D 1
⎪ iC 3 = C3 C 3 = iL2 − iL1
⎩ dt
From (3) and (6), the voltage conversion ratio of the pro-
By applying volt-second and amp-second balances to L1 , L2 , posed converter during the forward direction mode can be
and C3 , we have calculated as follow
V2 D (D − 2 )
MCCM { forward } = = (7)
D (vC 3 ) + (1 − D ) (−V2 − V1 + vC 3 ) = 0 (3) V1 (1 − D )2
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GHOLAMI ET AL. 235
TABLE 1 (Continued)
†
S: switch, D: diode, SD: series body diode, L: inductor, C: capacitor.
‡
F: forward direction, B: backward direction.
∗
Bidirectional version.
FIGURE 6 Voltage gain ratio in: (a) forward and (b) backward directions.
State 2 of CCM [t1 -Ts ] and DCM [t1 -t2 ]: Contrary to state ⎧ v = L dL1
= −vC 3
1, during this interval, as shown in Figure 3(e), S2 and S4 are ⎪ L1 dt
turned off whereas the body diodes of S1 and S3 are conducting. ⎪ dL2
⎨ vL2 = L dt
= −V1 (14)
The inductor L2 releases its energy into the primary side voltage ⎪ dvC 3
through the body diode of S3 . Similarly, L1 releases energy into ⎪ iC 3 = C3 = iL1
C3 through the body diode of S1 . Therefore, we have: ⎩ dt
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238 GHOLAMI ET AL.
By applying volt-second and amp-second balances to L1 , L2 , current through L2 meets zero at time t3 , both before the end
and C3 , we have of the switching period.
State 4 of DCM [t3 -Ts ]: In this mode, all of the power
D (V1 + V2 − vC 3 ) + (1 − D ) (−vC 3 ) = 0 (15) switches are turned off. The current through inductors meets
zero. At the end of this interval, a complete period Ts has been
D (−V1 + vC 3 ) + (1 − D ) (−V1 − vC 3 ) = 0 (16) passed.
Considering these intervals, one can define D1 and D2 as duty
cycles where the current of L1 and L2 becomes zero, respec-
D (−iL1 ) + (1 − D ) (iL2 − iL1 ) = 0 (17) tively. In this regard, according to a typical DCM waveform in
By using (16), the average voltage across C3 can be Figure 5(b), the voltage across the inductors can be defined as
determined as
1 ⎧V1 + V2 − vC 3 0 ≤ t < DTs
vC 3 = V (18) ⎪
D 1 vL1 =⎨ −vC 3 DTs ≤ t < (D + D1 ) Ts (21)
From (15) and (18), in the backward direction mode the volt- ⎪ (D + D1 ) Ts ≤ t < Ts
⎩ 0
age conversion ratio of the proposed converter can be calculated
as follow ⎧−V1 + vC 3 0 ≤ t < DTs
⎪
vL2 = ⎨ −V1 DTs ≤ t < (D + D2 ) Ts (22)
V1 −D 2
MCCM {backward } = = (19) ⎪ (D + D2 ) Ts ≤ t < Ts
V2 1 − D2 ⎩ 0
As a result, the DCM voltage gain transfer ratio during the Moreover, the minimum value of inductor currents must be
backward direction mode can be obtained as positive for CCM, and the critical value of L1 and L2 can be
expressed as
V1 D2
MDCM {backward } = = (24)
V2 DD1 + DD2 + D1 D2 ⎧L ≥ (2−D )D 2V1
⎪ 1 (1−D )2 i1 fs
Forward ∶ ⎨ (2−D )D 2V1
(27)
⎪L2 ≥
3 DESIGN CONSIDERATIONS ⎩ i1 fs
FIGURE 9 (A) dc-dc stage control loop, (B) battery current variations during CC and CV modes, and (C) dc-ac stage control loop.
Ref.: Pros (✓) and Cons (×) Ref.: Pros (✓) and Cons (×)
Proposed ✓ High voltage gain ratio [20]* ✓ Boundless buck-boost voltage gain ratio
✓ Boundless buck-boost voltage gain ratio ✓ Direct connection of input and output terminals
✓ Direct connection of input and output terminals ✓ Low EMI issues
✓ Low EMI issues × Higher TVS
✓ Low TVS × Higher TCS
✓ Low TCS × High number of semiconductor devices
× High number of semiconductor devices [25] ✓ Higher voltage gain ratio
[11] × Lower voltage gain ratio × limited voltage gain ratio
✓ Boundless buck-boost voltage gain ratio ✓ Direct connection of input and output terminals
✓ Direct connection of input and output terminals ✓ Low EMI issues
✓ Low EMI issues × Higher TVS
✓ Lower TVS ✓ Lower TCS
× Higher TCS × Higher number of semiconductor devices
× High number of semiconductor devices
∗
Bidirectional version
[18] × Lower voltage gain ratio
✓ Boundless buck-boost voltage gain ratio
× No direct connection of input and output terminals
× High EMI issues (√ √ )
⎧ 2−D
✓ Lower TVS ⎪ TV Srms = D + 1 − D V
(1−D )2 1
Forward ∶ ⎨ (√ √ ) (33)
✓ Lower TCS ⎪ TC Srms = D+ 1−D
1
i
⎩ D 1,rms
✓ Lower number of semiconductor devices
(√ √ )
[23] × Lower voltage gain ratio ⎧ 1+D
⎪ TV Srms = D + 1 − D V
✓ Boundless buck-boost voltage gain ratio D2 1
Backward ∶ ⎨ (√ √ ) (34)
1
✓ Direct connection of input and output terminals ⎪TC Srms = D+ 1−D i
⎩ 1−D 1,rms
✓ Low EMI issues
× Higher TVS
✓ Lower TCS 4 COMPARISON OF THE PROPOSED
× High number of semiconductor devices DC-DC CONVERTER TO THE STATE OF
[16] × Lower voltage gain ratio THE ART
[15] × limited voltage gain ratio
The main achievements and the characteristics of the EV bidi-
✓ Direct connection of input and output terminals
rectional dc-dc converters and the proposed converter are
✓ Low EMI issues summarized in Table 1.
✓ Lower TVS The main point of Table 1 is that among all the buck-boost
✓ Lower TCS bidirectional converters which do not have a gain limitation the
× Higher number of semiconductor devices proposed converter has the highest boundless voltage gain ratio.
The converters with higher gain ratios all have a limitation on
[24] × Lower voltage gain ratio
their gain in both directions. The proposed bidirectional dc-dc
× limited voltage gain ratio
converter has four semiconductor devices and adopts two of
× No direct connection of input and output terminals them during each state of operation.
× High EMI issues The total semiconductor device count of buck-boost bidirec-
✓ Lower TVS tional dc-dc converters i.e. the converters in [11, 18, 23, 19, 21,
✓ Lower TCS and 20] is 4, 3, 4, 8, 4, and 6, respectively and for the proposed
converter it is 4. Although the total semiconductor device count
× Higher number of semiconductor devices
of converter in [18] is lower than the proposed converter, the
[21] × Lower voltage gain ratio
voltage gain ratio of [18] is lower than the proposed converter
(Continues)
in both directions. Furthermore, unlike the proposed converter,
there is no direct connection between input and output ter-
minals in the converter of [18] which leads to increased EMI
issues.
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242 GHOLAMI ET AL.
ib [5A/div]
5 PROPOSED CONTROL SYSTEM
DESIGN
ib = 11A Vb [20V/div]
The control system of the proposed EV charger includes the
control loop of the battery side current and the grid side current
Vb = 40V during both forward and backward directions. In this paper for
[50ms/div]
both stages we have adopted two dead-beat control loops [26,
27] to regulate both battery side voltage and current in dc-dc
stage and dc-link voltage and ac grid current in dc-ac stage.
V2 [100V/div] [50ms/div]
When S1 and S3 are off and the body diodes of S2 and S4 are
ib [5A/div] conducting, the inductor voltage is
diL2
vL2 = L2 = V1 − vC 3 (38)
iL2 [10A/div] dt
and the OFF-state slope of iL2 (i.e. when S1,3 is OFF) (δF,OFF )
Vb [20V/div]
can be expressed as
diL2 (t ) V − vC 3
𝛿F ,OFF = = 2 (39)
dt L2
[100ms/div]
diL2
vg [200V/div] vL2 = L2 = V1 (41)
dt
The current slope of L2 during S2,4 con-state (δB,ON ) and
coff-state (δB,OFF ) can be expressed as
FIGURE 19 Proposed bidirectional dc-dc converter efficiency curve versus output power levels.
5.2 dc-ac stage control system −𝛿inv,ON tinv,ON − 𝛿inv,OFF tinv,OFF = 0 (53)
The control of the inverter used to interface with the ac grid is Then, tinv,ON and consequently the optimal modulation index
set up to regulate its dc-side voltage V2 with an outer PI-based can be determined as
dc-voltage control loop and an inner current control loop based ( )
on dead-beat control [28, 29]. Lg ig∗ − ig [k] + vg [k] Ts
minv = (54)
The grid side current controller aims to shape the current V2 Ts
through Lg , denoted as ig , as a pure sinusoid in phase with the
voltage [30]. As shown in Figure 9(c) a digital dead-beat current
controller [31–33] is again developed for this goal. In the dc-ac 6 EXPERIMENTAL VERIFICATION
stage circuit, when SA and SB are on, the voltage across Lg can
be determined as To verify the analytical analysis and proper operation of the pro-
posed EV converter, a laboratory hardware prototype shown
dig in Figure 10 has been developed. The test conditions and the
vLg = Lg = V2 − vg (49)
dt parameters of the proposed converter are reported in Table 4.
where vg is grid voltage. The prototype consists of two stages, the proposed dc-dc con-
When SA and SB are off, the inductor voltage is verter and a conventional dc-ac converter. The control system
of the proposed EV charger includes the control loop of the
dig battery side current and the grid side current during both for-
vLg = Lg = −vg (50) ward and backward directions. For both stages we have adopted
dt
two dead-beat control loops to regulate both battery side volt-
The slope of ig during SA,B on-state (δinv,ON ) and off-state age and current in dc-dc stage and dc-link voltage and ac grid
(δinv,OFF ) can be written as current in the dc-ac stage which are similar to the methods
dig V2 − vg dig −vg described in reference [25].
𝛿inv,ON = = , 𝛿inv,OFF = = (51) Figure 11 illustrates the steady-state step-up of the for-
dt Lg dt Lg ward direction performance of the proposed bidirectional
Now one can predict the inductor current at the next sam- dc-dc converter under open loop operation mode and with
pling period (ig [k+1]) from its current value (ig [k]), by using the output load of 162 W and duty cycle of 0.5736. It can
slopes already determined, i.e. be seen that the primary (secondary) side voltage is 40 V
(180 V), the battery and load current is 4.05 A and 0.9 A,
ig [k + 1] = ig [k] + 𝛿inv,ON tinv,ON + 𝛿inv,OFF tinv,OFF (52) respectively.
Similarly, Figure 12 shows the performance of the converter
where tinv,ON and tinv,OFF are the SA,B on and off state dwell in the backward direction and step-down mode under steady
times, respectively. state operation and under the primary side current of 4.05 A.
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248 GHOLAMI ET AL.
FIGURE 20 Bidirectional dc-dc converters calculated efficiency curve versus output power levels.
In this case, the input secondary side voltage is 180 V and since The measured outputs from the converter in response to a
the battery is connected to the primary side, the output voltage step change in the primary (battery) side current from 11 A to
is regulated to 40 V by the duty cycle of 0.4264. 16 A is shown in Figure 17(a and b) for V2G and G2V mode,
The step-down operation mode at the forward direction and respectively. As shown in this figure, the current of L2 changes
step-up mode at the backward direction is shown in Figure 13. from 13.44 A to 19.55 A as the battery side current changes and
In this figure, V1 and V2 is 200 V and 180 V, respectively. In the rms value of ac side current changes from 4 A to 5.64 A,
the forward mode with respect to D = 0.274 and i2 = 0.9 while the primary and the secondary dc voltage level is fixed to
A, vC3 , iL1 , iL2 , and ib is 275.7 V, 1.24 A, 1.71 A, and 0.81 40 V and 180 V, respectively.
A, respectively. Similarly, in the backward mode D = 0.725, Furthermore, the output of the proposed bidirectional con-
i2 = 2.22 A, vC3 = 275.7 V, iL1 = 3.1 A, iL2 = 4.2 A, and verter in response to a change from G2V (charging) to V2G
ib = 2 A. (discharging) operation mode by a step change in current direc-
The DCM operation of the proposed bidirectional dc-dc con- tion is shown in Figure 18. As illustrated in this figure, the
verter during forward and backward direction modes are shown primary (battery) side reference current changes from −16 A
in Figures 14 and 15, respectively. The values of V1 and V2 with (charging) to +16 A (discharging), as a reaction of which, the
respect to D, D1 and D2 confirm the DCM voltage gains. In current of L2 changes from −19.55 to +19.55 A. In this test, a
the DCM operation of forward direction mode, the duty cycle current rate limiter for iL2 is employed to ramp up the reference
of switches is 0.2, while from Figure 14 D1 and D2 are 0.5769 current.
and 0.6704, respectively. Therefore considering V1 = 40 V, from The efficiency versus the output power curves for different
(11) and (12) the voltages of C3 and secondary side is 51.9 V and direction modes are depicted in Figure 19. In the back-
29.9 V, respectively. Similarly, in the DCM operation of back- ward (charging or G2V) and forward (discharging or V2G)
ward direction mode, D is 0.25, while from Figure 15 D1 and modes, the peak efficiencies of 97.6% and 97.2% are achieved,
D2 are 0.16 and 0.5836, respectively. Considering V2 = 180 V, respectively.
from (23) and (24) the voltages of C3 and primary side is 134.3 Figure 20 displays the calculated efficiency for the proposed
V and 40.28 V, respectively. converter, as well as the converters from the references, all
The steady state experimental results of the proposed bidirec- under identical conditions, i.e. same component parameters,
tional EV converter for the grid tied mode in terms of G2V and voltages, and switching frequency. As shown in Figure 20, the
V2G operation is shown in Figure 16. The primary side current proposed converter demonstrates a satisfactory level of effi-
(or the battery current ib ) and the dc-link side voltage reference ciency when compared to other bidirectional dc-dc converters
is 16 A and 180 V, respectively. with identical parameters.
17554543, 2024, 2, Downloaded from https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/pel2.12630, Wiley Online Library on [06/02/2024]. See the Terms and Conditions (https://onlinelibrary.wiley.com/terms-and-conditions) on Wiley Online Library for rules of use; OA articles are governed by the applicable Creative Commons License
GHOLAMI ET AL. 249
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ORCID https://doi.org/10.1109/TPEL.2019.2921585
Zahra Gholami https://orcid.org/0000-0002-6611-8058 18. Elsayad, N., Moradisizkoohi, H., Mohammed, O.A.: Design and imple-
Rahim Ildarabadi https://orcid.org/0000-0002-5213-089X mentation of a new transformerless bidirectional dc-dc converter with
Mohammad Monfared https://orcid.org/0000-0002-8987- wide conversion ratios. IEEE Trans. Ind. Electron. 66(9), 7067–7077
0883 (2019). https://doi.org/10.1109/TIE.2018.2878126
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