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Chapter 4 - Central Processing Unit
Chapter 4 - Central Processing Unit
Chapter 4 - Central Processing Unit
Definition of CPU
The CPU is made up from THREE (3) major parts which is:
• register set
• arithmetic-logic unit (ALU)
• control unit
Step 4 – Store
→CU stores the result of the operation in memory or in a register
Internal Interrupt (also called TRAPS) are generated by the CPU itself to
indicate that some error or condition occured for which assistance from
the operating system is needed. Example; register overflow, attempt to divide
byzero, invalidoperation, stack overflow.
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Computer System Architecture
Understand STACK organization
• Auseful feature that is included in the CPU of most computers is a stackor last- in,
first-out (LIFO) list.
• Stack is a storage device that store information in such a manner that the item
stored (in) last, is the first item retrieved (out).
• The register that holds the address for the stack is called a stack
pointer (SP) because its value always point at the top item in
the stack.
Note!
The operation of the stack can be compared to a stack of tray.
The last tray placed on the top is the first taken off.
I. Register Stack
Astack can be placed in a portion of a large memory or it can be
organized as a collection of a finite number of memory words or
registers. The stack pointer register (SP) contains a binary number
whose value is equal to the address of the word/register that is
currently on top of the stack.
The stack limits can be check using two processor register; one to
hold the upper limit, and the other to hold the lower limit.
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Describe the use of Reverse PolishNotation
(A + B)(D + E)C * F+ *
→ RPN : 8 2 5 x + 1 3 2 x + 4 - /
→ RPN : 12 3 + 9 6 - * 6 7 * 3 + / 62 +
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Show Stack Organization
To Complete
Reverse Polish Notation
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Computer System Architecture
Illustrate the stack of RPN to solve the problem in
exercise 1:
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Illustrate the stack of RPN to solve the problem in
exercise 2:
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ILLUSTRATE
BINARY TREE
TO PRODUCE
REVERSE POLISH NOTATION
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Question: Find the reverse polish notation from the node of tree.
+
359+2*+
3 *
+ 2
5 9
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Architecture
Instruction Sets
CISCTechnology
Complex Instruction Set Computing
Conventional computers
Many of the instructions are not used
RISCTechnology
Reduced Instruction Set Computing
Small subset of instructions
Increases speed
Programs with few complex instructions
Graphics
Engineering
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Reduced Instruction Set Computer (RISC)
In the early 1980s, a number of computerdesignerrecommended that
computers uses fewer instructions with simple constructs, so they can be
executed much faster within the CPU without having to use memory
often.This type of computer is classified as reduced instruction set
computer or RISC
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Types of Processing
A typical modern computer runs dozens to
hundreds of tasks at any given time; however,
each core is only working on one process at
once. The processor constantly jumps between
the different processing "threads" or "instruction
streams" to run several concurrent programs
under a real-time illusion called concurrency. The
computer ends up wasting processor cycles while
switching between jobs and doesn't run at
optimal efficiency when multitasking.
Computer System Architecture
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Serial processing
Execute one instruction at a time
Fetch, decode, execute,store
Parallel Processing
Multiple processors used at the same time
Can perform trillions of floating-point instructions per second
(teraflops)
Ex: network servers, supercomputers
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Types of Processing
Pipelining
Instruction’s action need not be complete before the next
begins
Fetch instruction 1, begin to decode and fetch instruction 2
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