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RTL Design of SPI (Serial Peripheral Interface)

SPI (Serial Peripheral Interface) is a Multi-Master or Multi-Slave, Full Duplex, synchronous serial communication
protocol that transmit data simultaneously over short distance.
SPI uses a select line to choose the device to communicate with, separate clock and data lines.
E.g.: In Computers and Embedded systems to communicate between a microcontroller and peripheral ICs such
as sensors, ADCs, DACs, shift registers, SRAM and others.

Single Master Slave Interface

In Single Master & Single Slave Interface, there is only one master device communicating with one slave device.
The master device controls the timing and data transfer of the communication, while the slave device only
responds to the commands and data sent by master.
The communication usually starts with the master device sending a clock signal to the slave devices. The clock
signal synchronizes the data transfer between the two devices. The master device also sends a command to the
slave device, indicating what operation it wants to perform.

SPI Master
clk cs
rst SPI Master mosi
newd sclk
din [11:0]

Signal Description
Name Description
clk Clock signal controls the timing of the SPI operations, both the read and write operation will
perform on rising edge of clock.
newd This signal is used to indicate when user have a new data, which it needs to transmit to the
device through an SPI transaction.
din Din is user defined data that it needs to communicate to the device connected with an interface.
cs Chip Select is used to enable our slave device and active low, on this, pin will start a transaction.
mosi mosi is the pin used to transmit the data serially from master to slave.
sclk sclk is the serial clock which will be going to slave for synchronization.

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SPI Master Operation

Start

No

newd
== 1

Yes
Start tx

Send data serially

No
all bit
send

Yes

End tx

• SPI master operation is very simple, we have to wait till user have a new data. As soon as user make newd
high, we will start sampling the data that we have on the bus and start transmitting it to the slave device.
• First, we start a transaction, usually the ideal value of chip select is high, so when user wish to start
transaction, it conveys to slave by making chip select low.
• Onwards, from the next clock tick, we will start sending data serially one after another.
• As soon as we complete sending all the bits, we will end our transaction

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SPI Slave

cs done
mosi SPI Slave
sclk dout[11:0]

Operation
SPI slave operation is also very simple, it just needs to understand the SPI transaction required clock, chip select
and mosi, it will give the output and once the process of data generation is carried, that mean once it converts 12-
bit of serial data into 12-bit number, we will make done signal as high, which indicate our transaction is completed.

Simulation Result=>

RTL Schematic =>

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Check my previous post : “RTL Design of AMBA AHB Protocol”.

“RTL Design of AXI Stream Protocol”.
“RTL Design of UART Protocol”.

✔️ For source code ping me on LinkedIn.