DMS Manual

Brilliance CT TM
Brilliance 40/64-Channel
DMS Service Manual
4550 193 04191

Revision H
This docu ment and the information contained in it is proprietary and confidential inf ormation of Philip s Health care ("Philip s") and may not be
reproduced, copied in whole or in part, adapted, modified, disclosed to others, or disseminated without the prior written permission of the Philips
Legal Department. Use of this document and the information contained in it is strictly reserved for current Philips personnel and Philips customers
who have a current and valid license from Philips for use by th e customer’s designated in-house service employee on equipment located at the
customer’s designated site. Use of this documen t by un authorized persons is strictly proh ibited. Report violation of these requ irements to the
Philips Legal Department. This document must be returned to Philips when the user is no longer licensed and in an y event upon Philips’ first
written request.
© 2012 Koninklijke Philips Electronics N.V. All Rights Reserved.

CSIP Level 1
BrillianceTM CT Brilliance 40/64-Channel DMS Service Manual Rev H
Philips Healthcare
© 2012 KONINKLIJKE PHILIPS ELECTRONICS N. V. ALL RIGHTS RESERVED.
Warranty Disclaimer
PHILIPS PROVIDES THIS DOCUMENT WITHOUT WARRANTY OF ANY KIND, IMPLIED OR EXPRESSED,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE.
Limitation of Liability
PHILIPS HAS TAKEN CARE TO ENSURE THE ACCURACY OF THIS DOCUMENT. HOWEVER, PHILIPS
ASSUMES NO LIABILITY FOR ERRORS OR OMISSIONS AND RESERVES THE RIGHT TO MAKE CHANGES
WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR
DESIGN. PHILIPS MAY MAKE IMPROVEMENTS OR CHANGES IN THE PRODUCT(S) OR PROGRAM(S)
DESCRIBED IN THIS DOCUMENT AT ANY TIME.
Password Notice
THE PASSWORD IS THE PROPERTY OF PHILIPS HEALTHCARE AND IS PROVIDED FOR THE EXCLUSIVE
PURPOSE OF PROVIDING ACCESS TO SELECTED SERVICE UTILITIES WHICH ARE DESCRIBED IN THIS
SERVICE MANUAL AS BEING ASSOCIATED WITH THE PASSWORD. USE OF THIS PASSWORD FOR ANY
PURPOSE OTHER THAN FOR THE ACCESS TO THE SELECTED SERVICES UTILITIES IS STRICTLY
PROHIBITED.
4550 193 04191 © 2012 Koninklijke Philips Electronics N.V All Rights Reserved CSIP Level 1 ii
Attention: This page contains copyrighted materials that are confidential and/or proprietary. Any release or distribution of this material, without permission, is a violation of law.
Symbol Descriptions
! Attention symbol Radiation warning symbol
Laser warning symbol Biohazard warning symbol
Magnetism warning symbol Projectile warning symbol
Electrical warning symbol Do not touch
Crush warning symbol
4550 193 04191 © 2012 Koninklijke Philips Electronics N.V All Rights Reserved CSIP Level 1 iii
Safety Information
To the User of This Manual
The user of this manual is directed to read and carefully review the instructions, warnings and cautions contained herein prior to beginning installation or service activities.
While you may have previously installed or serviced equipment similar to that described in this manual, changes in design, manufacture or procedure may have occurred
which significantly affect the present installation or service.
!
WARNING In addition to the warnings listed above, make sure to follow all safety guidelines as
described in the Safety Manual. Failure to do so can result in severe personal injury.
Installation and Environment
Except for installations requiring certification by the manufacturer per federal standards, see that a radiation protection survey is made by a qualified expert in accordance
with NCRP 102, section 7, as revised or replaced in the future. Perform a survey after every change in equipment, workload, or operating conditions which might
significantly increase the probability of persons receiving more than the maximum permissible dose equivalent.
Diagnostic Imaging Systems - Mechanical-electrical Warning

All of the moveable assemblies and parts of this equipment should be operated with care and routinely inspected in accordance with the manufacturer’s recommendations
contained in the equipment manuals.
Only properly trained and qualified personnel should be permitted access to any internal parts. Live electrical terminals are deadly; be sure line disconnects are opened and
other appropriate precautions are taken before opening access doors, removing enclosure panels, or attaching accessories.
Do not under any circumstances, remove the flexible high tension cables from the x-ray tube housing or high tension generator and/or the access covers from the generator
until the main and auxiliary power supplies have been disconnected. Failure to comply with the above may result in serious or fatal bodily injuries to the operator or those
in the area.
Prior to any service and maintenance activities inside components:
Switch off the system at the main power supply (useing the on-site On-Off switch), and the internal/external uninterruptible power supply (UPS).
Make sure that no other person can switch on power or switch off the security measures, when installation, maintenance or service work on the system is performed.
Always use an ESD protection wrist strap when servicing any component in the system.
Electrical-grounding Instructions
The equipment must be grounded to an earth ground by a separate conductor. The neutral side of the line is not to be considered the earth ground. On equipment
provided with a line cord, the equipment must be connected to properly grounded, three-pin receptacle. Do not use a three-to-two pin adapter.
4550 193 04191 © 2012 Koninklijke Philips Electronics N.V All Rights Reserved CSIP Level 1 iv
Diagnostic Imaging Systems - Radiation Warning

X-ray and Gamma-rays are dangerous to both operator and others in the vicinity unless established safe exposure procedures are strictly observed.
The useful and scattered beams can produce serious or fatal bodily injuries to any persons in the surrounding area if used by an unskilled operator. Adequate precautions
must always be taken to avoid exposure to the useful beam, as well as to leakage radiation from within the source housing or to scattered radiation resulting from the
passage of radiation through matter.
Those authorized to operate, participate in or supervise the operation of the equipment must be thoroughly familiar and comply completely with the current established
safe exposure factors and procedures described in publications, such as: Subchapter J of Title 21 of the Code of Federal Regulations, "Diagnostic X-ray Systems and Their
Major Components", and the national council on radiation protection (NCRP) no. 102, "Medical X-ray And Gamma-ray Protection For Energies Up To 10 Mev-
equipment Design and Use", as revised or replaced in the future.
Those responsible for planning of x-ray and gamma-ray equipment installations must be thoroughly familiar and comply completely with NCRP no. 49, "Structural
Shielding Design and Evaluation For Medical Of X-rays and Gamma-rays of Energies Up to 10 Mev", as revised and replaced in the future. Failure to observe these
warnings may cause serious or fatal bodily injuries to the operator or those in the area.
Add additional safety information as needed.
4550 193 04191 © 2012 Koninklijke Philips Electronics N.V All Rights Reserved CSIP Level 1 v
Revision History
Revision History
ECO # Revision Date Comments
R61020044 A September 2004 New Release
E61050002 B January 2005 RCOM troubleshooting added
Updated for Brilliance 64

DPU LEDs updated page 55
H2011333 C July 2005
Data Samplling Figure (Figure 5) updated for BR64
Basic Slice Width on page 19 update for BR64
Corrections in Operating Temperature Overview on page 15

Added DMS Power Supply Distribution on page 7
H3001498 D April 2008
Modified DMS Input Power Supply Measurement on page 37
Modified diagrams in Basic Slice Width on page 19
Updated for V2.6

E-003804 E November 2009 Operating Temperature Overview on page 15
Temperature Control on page 29
T-001121 F Documentation Control release
E-016422 G December 2011 Added references to new DMC16 on page 65 and CDMP on page 88
In DMS Cables on page 101, replaced diagrams of individual cables with a

E- H April 24, 2012
reference to the eSPF.
This document was prepared by the CT BU Service Innovation Department.

For any additions, corrections, or suggestions, contact CT BU Customer Support Department.
4550 193 04191 © 2012 Koninklijke Philips Electronics N.V All Rights Reserved CSIP Level 1 vi
TM
Brilliance CT Brilliance 40/64-Channel DMS Service Manual Rev H
Contents
Revision History ............................................................................................................................. vi
Preface ............................................................................................................................................ 1
Glossary ................................................................................................................................................................. 1
CT Terms.......................................................................................................................................................... 1
CT Sub-assemblies .......................................................................................................................................... 2
DMS (Data Measurement System) ................................................................................................... 5

Overview ................................................................................................................................................................ 5
DMS Functional Description................................................................................................................................... 6
DMS Power Supply Distribution........................................................................................................................ 7
DMS Block Diagram............................................................................................................................................... 8
Main Subassembly Outline ............................................................................................................................... 9
Data Sampling and Scan Modes.......................................................................................................................... 13
Operating Temperature Overview........................................................................................................................ 15
Old Cover........................................................................................................................................................ 15
New 7-Fans Cover.......................................................................................................................................... 15
DMS Main Subassemblies ................................................................................................................................... 16
ADM (Array Detector Module) ........................................................................................................................ 17
DMS Motherboard (DMB) ............................................................................................................................... 24
RCOM............................................................................................................................................................. 41
DPU (Data Processing Unit) ........................................................................................................................... 59
UHR (Ultra High Resolution Collimator) ......................................................................................................... 60
Reference Detector and Converter................................................................................................................. 62
Cradle ............................................................................................................................................................. 64
DMC16............................................................................................................................................................ 65
CDMP ............................................................................................................................................................. 88
DMS Cables .................................................................................................................................. 101
4550 193 04191 © 2012 Koninklijke Philips Electronics N.V All Rights Reserved CSIP Level 1 vii
Preface
Preface
This DMS Service manual applies to both the Brilliance 40 and 64 channel CT scanners. Any variation between the two
modalities will be clearly listed.
Glossary
The following abbreviations are used in this manual:
CT Terms
ASIC Application Specific Integrated Circuit
DFS Dynamic Focal Spot
FEE Front End Electronics
FFS Flying Focal Spot
PREP Pre-processed raw data—a step in the reconstruction
Sample A single measurement by one detector element during an integration period
Sampling Density A parameter describing the number of fans per rotation
Subfan/Reading A set of samples measured in one integration period by one detectors row
View/Frame A set of samples describing the attenuation data of one detector row for a given rotation angle
4550 193 04191 © 2012 Koninklijke Philips Electronics N.V All Rights Reserved CSIP Level 1 1
Preface
CT Sub-assemblies
ACQ Acquisition card in the CIRS (Common Image Reconstruction System) receives measurement data (FEE
data) from the DMS
ADM Applause detector module – contains the ADMC and the PDA
ADMC PCB with ASICs and electronic components, excluding PDA, connecting to BIP PDA
20 ASICs—Brilliance 40-channel
32 ASICs—Brilliance 64-channel
AS Anti-Scatter collimator
BIP Back Illuminated Photo diode
CHP Couch Horizontal Position
CHPI Couch Horizontal Position Interrupt position programmable by the DMS processor.
The DMS processor uses the combination of CHPI and SOF for x-rays on and integration start timing
coordination. The DMS processor programs CHPI to a couch position where the processor will be
interrupted.
CIRS Common Image Reconstruction System—receives the FEE data and reconstructs it to image
Component This term is used in two possible ways. First, it may refer to a component in the hardware such as a
register. Secondly, it may be used in the sense of “Component Technology.” A component, of
“Component Technology”, is a software object (instance of a class) that has a well-defined interface and
encapsulates or contains a set of functions or behavior.
CPM Common Processor Module. To be added to baseboard to function as the processor for that board.
Data Path Data Path is the travel of scanned data from the ADM module’s ASICs through the RCOM and DPUs to
the CIRS via optical communication. The travel of Data Path is ending with the return of COMM_OK
signal from the GHOST to the DMC16 and then to the RCOM board.
DIF DMS Interface - made of two boards – DMC16 and CDMP. The DMC16 board contains a CPM, which
serves as the DMS processor. The CDMP functions as power supply, which converts incoming +24VDC
into various voltage levels among others functional modules.
DMB (MB) DMS motherboard—consisting of the MBL (Left) and MBR (Right)
DMC16 Component of the Data Measurement System. It is the main logic controller of the DMS system.
It contains a CPM, which functions as the DMS processor also.
Preface
CDMP Component of the Data Measurement System. Its main purpose is to handle and control collimator
drives, temperature heater, fans, etc. and to track excess power supply to the DMS
DMS Data Measurement System
EDSI End of Data Sequence Interrupt
EOF The End Of Field position programmable by the DMS processor. EOF informs the DMS hardware where
the end of the last integration period is. The value can be either a couch CHP position or an angular NSP
position. Valid couch positions are 0 to 65535 and valid angular positions are 0 to 4639.
FEE DMS Front end electronics
FRU Field replaceable units
GHOST Gantry Host is the main controller of the Gantry. It is the external interface into the gantry for all external
entities: Host, Injector, Pulmonary, ECG, and CCT pedal.
HDIR Couch horizontal direction. A “1” indicates motion toward the gantry and a “0” indicates motion away
from the Gantry.
HTP Couch horizontal transport pulse. HTP is one per 0.1mm couch motion.
IP Integration Period
MBL Left motherboard
NSP Main drive angular position. Valid range is 0 to 4639, and each value is equal to 1/4640 of a revolution.
NSPI Main Drive Position Interrupt position programmable by the DMS processor. The DMS processor uses
the combination of NSPI and SOF for x-rays on and integration start timing coordination.
The DMS processor programs NSPI to a main drive position where the processor will be interrupted.
PDA Photo diode Array (silicon segmented array + MUX + Ceramics + Connector)
R2D Resolver to digital board. A board to convert resolver signals to digital quadrate signals
RCOM Rotational Communication and Control card in the DMS
Ref_Conv Reference Converter, a unit that converts the reference detector analog readings to digital
RHOST Rotation Host is an internal agent of the gantry that is responsible for controlling the generator and X-ray
tube. It communicates via CAN bus and with a few special signals to the DMS.
MBR Right Motherboard
Preface
SOF The Start Of Field position programmable by the DMS processor. SOF informs the DMS hardware
where the beginning of the first integration period is. When the gantry or couch reaches this position, the
DMS hardware would automatically start the integration.
The value can be either a couch CHP position or an angular NSP position.
Valid couch positions are 0 to 65535 and valid angular positions are 0 to 4639.
UHR Ultra-High Resolution Collimator
XRS X-Ray System
XRT X-Ray Tube
DMS (Data Measurement System)
Overview
The DMS Service Manual includes service and engineering information for both Brilliance 40 and 64-channel
configuration. The major differences between the two systems are:
• Brilliance 40 ADM: 40 slices (20 ASICs)
Brilliance 64 ADM: 64 slices (32 ASICs)
• Motherboard—each system has specific motherboards to support its type of ADMs.
The DMS (Data Measurement System), located in the Gantry Rotating unit, provides the following functions:
• Converts X-ray radiation passed through the patient’s body into digital data.
• Preprocesses the digital data (compress the data).
• Transfers preprocessed data to the Common Image Reconstruction System (CIRS) in the Operating Console via
the Optical Link with a bandwidth of up to 5Gbit/sec baud rate.
• Scan Control and Sequencing.
• Controls pre-patient collimation (A-Plane).
• Control Ultra-high Collimator (UHR)
• Controls the Laser Marker
• Internal temperature stabilization by automatic/manual control in a closed loop
• Controls the Reference Converter.
• Transfers RAW data to the CIRS (ACQ card) for the reconstruction process.
• Interfaces with other subsystems in the scanner (GHost, RHost) using the Control Link interface inherited from the
scanner.
• Communicates with other controllers (CPUs) and the Host computer using the CAN bus.
DMS Functional Description
Workspace CIRS
Galaxy
Patient Table GHost
Couch
Ghost
Slip Ring
High Voltage
Generator
Optical Link
X-ray Tube
Rhost
Detectors
DMS
Figure 1: System Block Diagram
DMS Power Supply Distribution

The following table lists the power supply to the DMS components.
Table 1:
Name Volts (V) ADM 1-21 ADM22-42 RCOM DPU1 DPU4 DMP Fans
PS1 +3.6 ✔
+5 ✔
-5 ✔
PS2 +3.6 ✔
+5 ✔
-5 ✔
PS3 +3.7 ✔ ✔ ✔
+24 ✔ ✔
NOTE The output voltage of each Power Supply unit (PS1, PS2, and PS3) is not identical to the input voltage of each
consumer component. Therefore, the power supply output voltage should be measured on the power supply unit
terminals only.
DMS Block Diagram
Brilliance 40/64 Slice Configuration DMS & DIF
DMC-16
Slip Ring
Slip Ring MUX
Right Mother Board

RHOST
RHOST Interface
X-Control
Fan
Control UARTs DPU

Link
CPM
Slip Ring 42
E Stop I/F
Data Path
X
Control Fiber optic
Slip Ring CAN I/F
RCOM 5GB Baud
Main Drive
A ACQ
Position D rate
R2D
Data
Main Drive
Zero Gate Position
M through the
Slip Ring
Marker
Lasers Control
DPU
A-Plane
Filter
Control
Fan Left Mother Board
A-Plane
UHR
Z-position
Control
Control
A-Plane
DMS
Opening
Control
DMS Power Supplies
X-
Detectors
DIF Power Service Diagnostics Converter Box
LEDs & Display
Supplies Switches Serial Port
Reference
Detector
+24VDC +3.4VDC, +5.00VDC, -5.00VDC
Figure 2: DMS Block Diagram
Main Subassembly Outline
ADM
42 ADMs that convert X-ray radiation passed through the patient’s body into digital data, which can be measured and
manipulated
RCOM with Two DPUs

Performs pre-calculation (PREP) on the RCOM and the two DPUs and finally (from the RCOM) transfers the data in the
correct format to the ACQ board and the CIRS via the Optical Slip Ring with a baud rate of 5.28Gbit/sec.
DMC16
Communicates with the rest of the controllers via the CAN bus using the Control Link interface with the GHost and the
RHost, it controls the A-Plane, UHR, and laser markers.
CDMP
Provides regulated voltage to the DMC16, provides shutdown and protection of the voltages to the ADMs, and drives
the A-Plane and UHR motors and the laser markers.
Vicor Power Supply

Provides regulated DC power supply to the DMS (except to the DMC16).
DMS Cover Fans

7-Fans Cover provides constant high air flow supporting V2.6 TCOR Calibration
2-Fans Cover provides a basic temperaure control inside the DMS
PS2 DMC16 CDMP PS1 PS3
DPU 4 (Right) ADM UHR RCOM DPU 1 (Left)

Figure 3: DMS Overview - old type with Vicor P.S. adjacent to the DMS
DMC16 CDMP
DPU 4 (Right) UHR ADM RCOM DPU 1 (Left)
Figure 4: DMS Overview - new type
There are two parts of the Data system:

• The DMS cradle (Figure 3 on page 10), attached to the rotor with 4 screws and 2 pins and the DMS external
devices (CDMP, DMC16, Reference Detector, and Reference Converter).
• The DMS cover shields all the detection and electronics equipment in the DMS. The detection unit is connected to
the motherboard assembly. The DMS cover performs the following:
• Protects the Detector Arrays
• Protects the electronic cards from EMI (electromagnetic interference) leakage
• Stabilizes the temperature in the DMS
The DMS cradle does not host the DMS external devices. However, since the relationship among the DMS cradle and
the DMS external devices is logically connected, they are considered to be part of the DMS.
The DMS cradle consists of the following mechanical sub-assemblies:
• Cradle—a massive metal construction fixed to the rotor that carries all the DMS parts (except CDMP, DMC16 and
Reference Converter)
• 42 ADMs precisely attached to the cradle
• UHR (Ultra-High-Resolution) collimator and its motion mechanism, fixed to the cradle “above” the ADMs
• Motherboards (Left and Right)—interface connection between the ADMs and RCOM and includes the DMS
Temperature stabilization and shutdown circuit.
• DMS cover—the cover protects the DMS, helps to stabilize the temperature, and shields the DMS internal
components from EMI (electromagnetic interference) leakage
• Fan Assemblies—assembled on the DMS cover
• Mylar cover
• RCOM assembly
• DPU assembly-two units (one or both 1/2MB)
The DMS external devices:

• Reference Converter
• Reference Detector
• DMC16-DMS Control Board
• CDMP - Power and Collimator Control Board
Data Sampling and Scan Modes

Operation Modes
Coverage, Slice Thickness, Slices
Coverage 0.625mm 1.25mm 2.5mm
40mm 64 * 32 16
25mm 40
22.5mm 18
15mm 12
10mm 16
7.5mm 12
* for Brilliance 64-channel configuration only
The main features of the BrillianceTM CT scanner X
affecting the DMS are: Y
• Simultaneous acquisition of up to 40 channels for
Brilliance 40 and up to 64 channels for Brilliance
64 6 x 1.25 mm 40 x 0.625 mm(BR40) - Symmetric 6 x 1.25 mm
• FOV (Field of View) coverage of up to 500 mm

(UHR-250mm)
64 x 0.625 mm(BR64) - Symmetric
• Z coverage of up to 40 mm
Figure 5:
• Thinnest slice width is 0.625 mm
• Shortest rotation time of 0.42 sec/360o, leading to centrifugal mechanical forces of 22G on certain DMS
components
• Maximum data transfer rate to the Gantry is 5.28 Gbit/second
• Internal temperature stabilization by automatic temperature control—0.125°C/60 sec of maximum scan length
• Maximum power consumption (without the Vicor Power Supply’s self power dissipation) is less than 450W.
See Figure 6 on page 14 for the geometries of the detection array and the X-ray beam.
Figure 6: Geometries of Detection Array and the X-ray Beam
Operating Temperature Overview
Old Cover
The typical working CT system’s inner temperature is 24° – 30°C in a room kept at 18° – 24°C. Under these conditions
the DMS controls its temperature to a typical DMS working temperature of approximatly 34±2°C sensed on the
Motherboard.
New 7-Fans Cover

There is no temperature control. The fans keep the internal DMS temperature the same as room temperature.
DMS Main Subassemblies

The DMS main subassemblies are as follows:
• ADM (Array Detector Module) on page 17
• DMS Motherboard (DMB) on page 24
• RCOM on page 41
• DPU (Data Processing Unit) on page 59
• UHR (Ultra High Resolution Collimator) on page 60
• Reference Detector and Converter on page 62
• Cradle on page 64
• DMC16 on page 65
• CDMP on page 88
ADM (Array Detector Module)

• The detectors are on an axial fan, 500 mm diameter, in the center of rotation of the Gantry.
• The detection array consists of scintillating crystal arrays with high X-ray stopping power and high light yield.
• The detection array is mounted on correspondingly segmented Photo diode Arrays (PD), which convert the
scintillating light into electrical current.
• The PD is mounted on a highly accurate base that transfers the detector signals to the RCOM via a connector.
Each one of the 42 Array Detector Modules (ADM) (see Figure 7 on page 17 and Figure 8 on page 17) includes the
following:
• A Detector Array
• A highly mechanically-accurate ADM module. The ADM carries voltage regulators to supply the voltages needed
by the components and reference voltage. The detector array is connected mechanically and electrically to the
ADMC via a high-density connector and leading mechanical supports.
• An Anti-Scatter (AS) cassette, which minimizes the amount of detected scattered radiation, is mounted on top of the
ADM in a very precise manner.
• Mechanical Handle and sliding part—Brilliance 40 only
• Connector to DMS motherboard (part of ADM card)
Figure 7: ADM Assembly—Brilliance 40 Figure 8: ADM Assembly—Brilliance 64
ADM Functional Description

The Detection Array detects the intensity of the radiation transmitted through the patient and converts it to current. The
Detector Array is a third generation type, covered by an axial fan beam, with a diameter of 500 mm in the center of
rotation of the gantry. The BrillianceTM CT detector array is two-dimensional, consisting of 672 detector “columns” on 42
Array Detector Modules, 16 columns per module.
To obtain two-dimensional coverage, each detector column is divided into sub-segments or “pixels”, that cover the
equivalent of 40 x 0.625 mm for Brilliance 40, 64 x 0.625 for Brilliance 64 and 32 x 1.25 mm slices in the center of
rotation. The 40 x 1.25 mm mode is obtained by multiplexing pairs of the 40 x 0.625 mm internal section, and other 2
external sections of 6 x 1.25 mm.
The Detection Array consists of scintillating crystal arrays with high X-ray stopping power and high light yield, mounted
on correspondingly segmented Photo diode Arrays (PD), that convert the scintillating light into electrical current.
The PD is mounted on a highly accurate base, that also carries on-board multiplexes. A connector transfers the
detector signals to the FEE ASICS, that are mounted on the ADMC.
Basic Slice Width
Figure 9: Brilliance 40-channel 40 x 0.625 mm

Slice width selection done by Select 0 and 1 signals.
Array Detector Module Card (ADMC)

• The ADMC carries:
• 20 FEE 32 channels ASICS on Brilliance 40
• 32 FEE 64 channels ASICS on Brilliance 64.
The ASIC is a mixed analog and digital signal technology.
• The ASIC has an internal offset current injector to provide a minimum output signal in case of a very low signal.
• The conversion rate as a function of Input-Current is variable and is set according to the expected current range
during a specific clinical protocol.
• Each ASIC input channel receives the current of 32 detector segments, and converts each current into digital data.
• The data transfer from the ASICs to the FPGA located on each ADM can be described as follows:
• Brilliance 40 (Figure 15 on page 23): 20 ASICS are divided into six groups of three ASICs and an additional
group of two ASIS. The data is transferred from one ASIC to another and from the last ASIC to the FPGA.
• Brilliance 64: Each of the 32 ASICs transfer data directly to the FPGA.
• Digital data transfer from the FPGA on the ADM via DMS left/right motherboard to the RCOM and two DPUs for
analysis and final transfer to the Reconstruction system
• Power Supply: ±3.4V - Digital components; ±5V - Analog components
DETECTOR
TEMPERATURE
SENSORS
FPGA PROGRAMMING
MOTHER BOARD
CONNECTOR
CONNECTOR
DATA+CLOCK+CONTROL
POWER
ANALOG+DIGIAL SUPPLY
SUPPLY
Figure 15: Brilliance 40 ADM Block Diagram
DETECTOR
16 ASICs 16 ASICs
ASIC ASIC ASIC ASIC
TEMPERATURE
SENSORS
FPGA PROGRAMMING
CONNECTOR
MOTHER BOARD
CONNECTOR
DATA+CLOCK+CONTROL
POWER
ANALOG+DIGIAL SUPPLY
SUPPLY
Figure 16: Brilliance 64 ADM Block Diagram
DMS Motherboard (DMB)

The DMS motherboard, is composed of two connection boards, Left Motherboard (MBL) and Right Motherboard (MBR).
• Figure 18 on page 27 and Figure 19 on page 27 show the Brilliance 40 motherboards.
• Figure 20 on page 28 and Figure 21 on page 28 show the Brilliance 64 motherboards.
The DMB is an interface between the DMS components and the external devices on the Gantry as follows:
DMS Components
• 42 ADMs—connect with a fixed connector (part of the ADM board)
• Two DPU units
• RCOM board—one connector on each DMS motherboard
• Fan Assembly
External Devices
• Reference Detector and Reference Converter
• CDMP
• DMC16
• Three VICOR power supplies
The DPU1 (Left) unit (left connection)—receives digital data from the ADMs 1–10.
The RCOM with internal DPU2 and 3) receives digital data from the ADMs 11–32.
The DPU 4 (Right) unit (right connection)—receives digital data from the ADMs 33–42.
NOTE FPGA on the ADMs are flashed directly on Brilliance 40. On Brilliance 64 the ADMCs connect to the
motherboard by means of a 60-pin connector that includes JTAG signals for remote flash programming (in
addition to the signals on Brilliance 40).
DMC16 connection—for signals and control data communication with RCOM and as signal interface to the RHost.
CDMP and VICOR power supply—power supply to DMB
The RCOM is plugged into the DMB with one connector to each one of the DMB boards (DMBL, DMBR). The DMS
motherboards contain active components for delivering control data and clock to the Detector Modules, and serial data
from the detector modules connection to the RCOM (see Figure 17 on page 26).
The DMB, DPU units, and the RCOM are located in a board cage for EMI shielding.
Temperature sensors, temperature cutoff switch, Driver Buffers, Voltage Regulators, power supply test points, and the
shutdown unit are the only active components on the DMB.
ADMC 1-10 ADMC 11-21 ADMC 22-32 ADMC 33-42

Connections Connections Connections Connections
ADMC 33-42 - Serial Outs

A DMC 11-21 - Serial Outs

Controls
Controls
Clock
Clock
DPU1 RCOM DPU4
Left Right
Connections
Connections Connections
Reference Converter
- Serial Out
DMC
Controls
Clock
Temperature Connection
Monitoring &
Temperature
Fan Control +
Monitoring &
Power Monitor
Power Supplies Power Supplies Fan Control +
Reference Connections Connections Power Monitor
Converter Analog + Analog +
Connections Analog - Analog -
MBL Digital +
24V for Fans
Digital +
24V for Fans
MBR
Figure 17: DMB Block Diagram
NOTE The figures below display the Left and Right Motherboards when the DMS is in the 6 o’clock position.
Motherboard Layouts
NOTE The major difference between the Brilliance 40 and the Brilliance 64 motherboards is the connection to the
ADMs (connectors and drivers).
Brilliance 40
Figure 18: Left Motherboard (MBL) Figure 19: Right Motherboard (MBR)
Brilliance 64
Figure 20: Left Motherboard (MBL) Figure 21: Right Motherboard (MBR)
Operating Humidity
The operating humidity shall be 15%–75%.
Temperature Control
The DMS shall operate when the Gantry internal temperature is 24ºC–30ºC (75.2°F–86°F).
The DMS has an internal temperature stabilizing system to keep its FEE and detection system at an operating
temperature of 34ºC ± 2ºC.
The DMS temperature control is done by a closed loop control (Figure 23 on page 30). The Temperature Control
functions are:
• Reading the Temperature sensors
• Fan speed control
Temperature sensors read the DMB air temperature, and activates the fans according to the defined closed loop
control. The temperature information is passed through the RCOM via the DMC16 to the Common Console.
The Temperature sense resolution is 0.125 ºC.
Figure 22 shows the Temperature Sensor on the left motherboard.
Figure 22: Temperature Sensor
2-Fans Cover
Right MB
Temp .
Sensor
Right Fan
Communication
Fan
Speed
Control
24V
Temperature FET
PWM CDMP
reading Signal
24V 24V Vicor
DMC16 RCOM FUSE
Power Supply
FAN speed PWM
command Signal FET
24V
Fan
Speed
Control
Communication
Temp .
Left Fan
Sensor
Left MB
Figure 23: Temperature Control Block Diagram
7-Fans Cover
Figure 24:
Temperature sensors read the DMB air temperature and

activate the fans according to h
t e defined closed loop control. Fan
Temperature information is passed through the RCOM to the
Host. Air Out
Figure 25 shows a cutaway view of the DMS with the airflow Air In
path.
ADM
Figure 25: DMS Airflow Path
DMS Power Cutoff

The DMS has a temperature switch (Figure 26 on page 33) that cuts off all power to the DMS in the case the DMS
temperature exceeds 50 ± 4oC (limit). The power to the DMS is resumed at a temperature of 32±2.8 oC (decreasing
temperature).
DMS
Temperature
Switch
CDMP
/DMC
Figure 27:
Figure 26: Cutoff Temperature Switch
Motherboard Connections
DMS Left & Right MB
Left - DMS PS1
DMS PS-1 DC Power Cable 4535-670-38841 C Left MB- DC Power
Power Ter.
Shut Down PL1 24W7 Male
Sense
Right - DMS PS2 DMS PS-2 DC Power Cable 4535-670-38851 C Right MB- DC Power
Power Ter.
Shut Down PR1 24W7 Male
Sense
DMS PS3
Right MB- DC Power
+3.4VDC Ter.1
DMS PS-3 DC Power Cable 4535-670-38861 PR2 7W2 Male
Left MB- DC Power

Sense DMS PS-3 DC Power Cable 4535-670-38861 PL2 7W2 Male
CDMP Card
+24VDC Ter.2
24V DC Power Cable 4535-670-38871 P10 D_Type 9W4 Male
DMS - Left MB Ref. Converter
C D25F JL1
Ref. Converter Cable 4535-670-25711
ShutDown PS2 Cable 4550-123-04391 C P1 D25M
P38 AmpModu
AmpModu P36
Power Enable Cable 4550-123-04371 PL3 AmpModu
ShutDown PS1 Cable 4550-123-04381 C
P37 AmpModu
Left & Right DMS Fans
PL4 AmpModu3
D_Type9 Male P11 Left & Right Fans 4535-670-38901
PR4 AmpModu3
A-Pl.Coll. Motors
P2
A-PL.Coll. Motors 4535-670-25721. D_Type 9 Fe. J20
R-Com Card
DMS Bracket
DMS UHR Coll. UHR P-15 SerDes ( Fiber Op.) DPU 4 Card
P1
UHR Coll. Cable 4550-123-04081 UHR Ext. Cable 4535-670-37181 D_Type 9 Fe. J15 OC0708 4550-123-04171
Rx-1 Blue TX-1 Blue
D15 H.D Female J32 Rx-2 Red TX-2 Red
Markers
P1
Marker Cable 4535-670-25751. P14 D_Type 9 Male
DPU 1 Card
Rx-3 Yellow OC0709 4550-123-04161 TX-3 Yellow
P17 P16 +5V
5VP Rx-4 White TX-4 White
Signals DC Power Tx. Boxs

4535-670-38881 4535-670-38891 Tx-1 Blue TX-1 Blue
Rx-2 Red OC0730 4550-123-04181 TX-2 Red
P17 P16
Optical Sip Ring Rx-3 Yellow TX-3 Yellow
P1
Aux. Optical SlipRing Cable 775-6100-0080 J23 D25 Female Rx-4 White TX-1 White
A-Pl.Coll.
A-PL.Sense Coll. 4535-670-25731. Right MB Rcom Cont.
J1 P19 D25 Male Rcom Control Cable 4535-670-38921
P18 D25 Male JR1 D_25 Female
RPM - Rot Enc.

R 2 D Cable 4535-670-25781. Jtag Rcom Cable 4550-123-03051
P1 P24 D15 Male D9 Male P22 Jtag Rcom
RPM - Gate
RPM-Gate Cable 4535-670-25761.
P1 J28 D9 Female E/ Stop
SlipRing E-Stop 4535-670-38921.
D15 Male P25 P1
Jtag Progra.
Jtag Programming 775-7195-0100
Header 10 Male P27
S/R Can Bus

Can Bus 4535-670-25801.
P1 D9 Male P26
P29 D9 Male Diagnostic RS232
R/ Host R - Host 4535-670-25791.

P1 D44H.D Female J21
DMC/ Conn. Board
Figure 28: DMS Cable Layout
CDMP PS3 Vicor PS1 Vicor PS2 Vicor PS3 Vicor CDMP
(24V) (24V)
Left Fan CDMP Reference DMC Interface Right Fan
Thermal Switch Converter
Figure 29: Connections on Left Motherboard Figure 30: Connections on Right Motherboard
+3.4VD1 +3.4VD1
+3.4VD1 +3.4VD1_RET EMI FILTER DGND
+5VA +5VA
ADMC
+5VA +5VA_RET
EMI & RA
FILTER AGND 1-21
-5VA
-5VA
EMI & RA
-5VA -5VA_RET FILTER
24V
24V_RET MBL
+3.4VD2
EMI FILTER DGND DPU
+3.4VD2 +3.4VD2
+3.4VD2_RET EMI FILTER DGND
R/C R/C
24V
DMP 24V_RET
24V
+3.4VD
2 RCOM
R/C R/C
+3.4VD2_RET DGND
+3.4VD2 EMI FILTER +3.4VD2
DGND
EMI FILTER +3.4VD2 DPU
24V_RET
24V
MBR
-5VA_RET
EMI & RA
-5VA -5VA
FILTER
-5VA
+5VA_RET AGND
EMI & RA
+5VA +5VA FILTER +5VA
ADMC
+3.4VD1_RET DGND 22-42
+3.4VD1 +3.4VD1 EMI FILTER +3.4VD1
Figure 31: Power Supply Delivery
DMS Input Power Supply Measurement

Each motherboard contains test points and a measurement list for checking input DC power from the Vicor Power
Supplies and the CDMP to the DMS motherboard.
NOTE The measured voltage on the MB test points, is not identical to the Power Supply output voltage. Refer to
Figure 33 on page 38 and Figure 34 on page 39 for the expected voltage on each test point.
NOTE To reach the voltage test point, you need to remove the RCOM from the motherboard.
1 10 11 21 22 32 33 42
A B B A
D2POS_A D2POS_B
DPU1 DPU4
RCOM
(Left) (Right)
MBL MBR
Figure 32: DMB Map
Motherboard Test Points
RCOM—3.4V (PS3)
ADM 22–32—3.4V (PS1)
ADM 33–42—3.4V (PS1)
DPU1 (Left)—3.4V (PS3)
ADM 33–42— +5V (PS1)
ADM 33–42— -5V (PS1)
ADM 22–32— -5V (PS1)
ADM 22–32— +5V (PS1)
Left Fan—24V (PS3)
Test Points Measurement List

Figure 33: Left Motherboard Test Points
RCOM—3.4V (PS3)
ADM 11–21—3.4V (PS2)
ADM 1–10—3.4V (PS2)
DPU4 (Right)—3.4V (PS3)
ADM 1–10—+5V (PS2)
ADM 1–10— -5V (PS2)
ADM 11–21— -5V (PS2)
ADM 11–21— +5V (PS2)
Right Fan—24V (PS3)
Measurement List Test Points
Figure 34: Right Motherboard Test Points
Motherboard LEDs
D2POS +5V -5V 3.4V 24V 3.4V +5V -5V 3.4V 24V
IN (PS1) (PS1) (PS1) (CDMP) (PS3) (PS2) (PS2) (PS2) (CDMP)
3.4V (P3)
Figure 35: Left Motherboard LEDs Figure 36: Right Motherboard LEDs
RCOM
Overview
The RCOM (Rotor Communication) board is a part of the DMS system. It connects to both motherboards (MBL and
MBR) by means of two connectors. The RCOM board’s main tasks are:
• Receive the scan parameters and operation modes from the DMC16 board.
• Generate the ADMs control lines timing and working modes (including the data collected by the two DPU units).
• Receive 26880 detectors values (40/64 Slices of 672 detectors each) from 42 ADMs, during each IP (Integration
Period).
• Organize the detectors values in one structure (Reading). In each Reading the order of the detectors values is the
same as the order of the detectors on the scanner.
• Add a Header and Footer to each Reading with relevant data.
• The Reading’s data is serialized, encoded, and transmitted through an optical transmitter by four optic cables, to
the CIRS system (Acquisitor Board), at 5.28 Gbits/sec.
• Implement the Resend mechanism with the Acquisitor board.
• Perform the pre-dose modulation algorithm.
The RCOM board interfaces are:

• Connection to 42 ADMs directly to 22 ADMs (11–32) via the motherboard and 20 additional ADMs (1–10, 33–42)
via the DPU units
• Connection to the DMC16 board via the JR1 connector on the MBR using discrete and multiplexed lines to receive
from DMC16 scan parameters for scan sequences
• Connection to two DPU units for sending scan parameters (derived from DMC16), control and sync. signals, and
gathering the Prep data via the DMB
• Connection to the Acquisitor board via the Optical Slip Ring with four fiber-optic cables (harness)
• Connection to temperature controllers located on DMB and ADMS
• Connection to Reference Detector and Reference Converter via the JL1 connector on MBL
Reference Converter
ADMC &Reference Converter Controls
ADMC_1 ADMC_10 APDMC_11

ADMC_11 ADMC_21 ADMC_22 ADMC_32 ADMC_33 ADMC_42
DPU_1 DPU_2 DPU_3 DPU_4

Control Control
RCOM
Optical Sectors to Slices converter Optical
O C
P O Discrete
T N And
Diagnostic
I T Multiplexed Optical Out
C R Control lines
Optical Outputs Communication
A O
L L
Comm _OK
DMC_16
ROTOR
Optical Link Slip Ring
STATOR
Quad Channel ACQ GHOST Single Channel ACQ
Figure 37: RCOM Overview
RCOM Data Path Collection
Signal Types Legend

LVDS Detectors Data
10 X ADMs 11 X ADMs LVTTL Control Signals 11 X ADMs 10 X ADMs
Isolated Control
Mu Data Flow
Fiber Optic
LVDS Reference Converter Control
DPU_1 Control
DMBL DMBR Control DPU_4
Signals Signals
Reference Splitters Splitters
Converter DMC_16
360 Pins 360 Pins

ADMC
PD_2 Buffers PD_3
Ref. Conv
Buffers
Main Optocouplers
and Drivers
Control P7
DPU_2B DPU_2A HotLink DPU_3A DPU_3B

SerDes
S S S S SerDes
CIMT
F F F F
P P P P Data Data
Link Link
Agilent
Mictor
Slip
Ring JTag
Quad Slip Ring
Figure 38: RCOM Data Path Collection
Transferring Scan Parameters for scan sequences to the DPU Units and ADMC cards
The RCOM receives the scan parameters for scan sequences and scan control signal from the DMC16 card using
discrete multiplexed control lines via Opto couplers and Drivers on board. The scan parameters are first loaded from the
DMC16 to the Main Control on RCOM.
From the Main Control the scan parameters distribute as a scan control signals for operation modes and timing to two
external DPU Units (1 and 4) and two internal DPU Units (2 and 3) for ADM data analysis and also to all ADMs.
The Control signals transfer parallel from two Control Signal Splitters on RCOM to all ADMs. The control signals
determine how the ASICs going to work (I Bias,Vref.).
The integration period is derived from two signals, AP_ 0 and AP_ 90 that come from the Gantry. During one rotation of
the rotor there are 4640 AP pulses in each signal. The RCOM generates the three options of Reading per revolution
(1160, 2320 and 4640). A PLL (Phase Lock Loop) is used to generate 2320 and 4640 integration pulses per revolution
using AP pulses as input.
When taking bias readings (OFFSET), the RCOM generates the timing to the ADMs from the fixed internal clock.
RCOM is also selects the combination of the detector slices, according to the required slice width.
Loading and Analyzing ADMs MU data

The ADMs (11 – 32) transfer digital MU data to DPU-2 and DPU-3 on RCOM for analysis.
The received data convert from the Serial to Parallel, compress and store in the Resend Buffer.
Addition to the value data from the ADMs, the DPU-2 on RCOM receives the data from the Reference Converter.
Same processes of Internal DPU Units perform also in the External DPU Units for ADMs 1-10 and 33 – 42.
Loading data from External and Internal DPU Units and transferring to the ACQ via Optical Link
All the MU data transfer from the resend buffers (from each one of the four DPU units), to the Main Controller (sector to
slices). Data from the External DPU units transfer via two fiber optics (per each) cables to the RCOM.
The Main Controller organizes the data from sectors to slices, and transfers it to the ACQ card on the CIRS via the
Optical Link, using four fiber optic, 1.32G Baud rate each (total- 5.28G Baud rate). This data is one Reading, taken
during one integration period (IP) (Figure 39 on page 45).
CIRS
I/O Pannel Machine LEG
B DS2 DS2
A DS1 DS1
ACQ D DS4 DS4
Transmitter
C
Receiver
DS3 DS3
C D A B
TX TX TX TX
RX RX RX RX
Slip Ring
TX TX TX TX
C D A B
RX RX RX RX
3 4 1 2
3 2
4 1
RCOM
PU_4 DPU
D _1
Figure 39:
Reading Header
The MU slice Reading Header includes the following information:
Table 2: Reading Header
Parameter Name Parameter Name Parameter Name
DMS Type DAS_cnt 1 Scan Counter
DMS Status DAS_cnt 2 Physical Slice Number=0
DMS Error Vertical Table Position Logical Slice Number=0
Integration time Horizontal Table Position Stamp
Reference Detector Gantry tilt
Detectors Temperature 1 Rotation Angle
Detectors Temperature 2 Reconstruction angle
Fan speed HW lines
Reading No. Low Vertical Table Position
Reading No. High Time Stamp low
ASIC mode low Time Stamp high
ASIC mode high UID unique identifier
Block Footer
The MU slice Block Footer includes the following information:
Table 3: Block Footer
Description
Reading number low
Reading number high
Physical Slice Number=0
Logical Slice Number=0
Resend Mechanism
The Resend mechanism is implemented on two terminals:
• RCOM as a transmitter
• ACQUISITOR as a receiver
• The Readings are transmitted on the serial line all the time, without intermission.
• No sub-Readings are sent; only complete Readings.
• The comm_ok line is used by the ACQ board to inform the transmitter circuit (on the RCOM board via the GHost
and DMC-16) of good reception of the last transmitted Reading.
• The acknowledgement is done by the transition of the comm_ok signal levels, high to low transition or low to high
transition.
Serial Data
RCOM Board ACQ Board
(on Rotor) (on CIRS)
Comm_ok
Figure 40: Schematic Connection of Resend Mechanism
Description of the Resend Mechanism
Reading #1 Reading #2 Reading #3 Reading #4 *Confirm cm Reading #3 Reading #4 Reading #5
comm_ok
*Ack fr. #1 Ack fr. #2 No Ack Resend fr. #3 Send fr. #4
Figure 41: Relations Between Readings and the comm_ok Line

* Ack fr. #1 = acknowledge of the reception of Readings no. 1.
* confirm cm = Confirm Commands.
* Reading #3 & 4 are sent with Header Resend and Slice Resend commands.
In case of no transition of comm_ok (no Ack), the RCOM (transmitter) sends the CONFIRM commands
(CONFIRM_CM), until the receiver (Acquisitor) acknowledges the Confirm commands by a comm_ok level transition.
This way, the system verifies that both sides (Tx and Rx) “know” that a resend frame is going to be sent.
Each Reading that the RCOM sends again after the Confirm commands are accompanied with Header Resend and
Slice Resend commands (in Figure 41 on page 48 they are Resend Readings #3 & 4). The following Reading (#5)
starts with a normal Header Start command (HEADER_CMND).
Interfacing with DMC16

This interface is used to receive the scan parameters and control lines (e.g. reset, couch position, scan angle etc.) and
to return the current status.
The signals connecting the DMC16 with RCOM are sorted into two groups:
• Real Time signals (see Table 4)
• Multiplexed signals (see Table 5, Table 6 and Table 7)
Real Time Signals

Table 4: Real Time Signals—10 Dedicated Signals: Default Activity is High
Signal Name Direction Function

Rcom_reset DMC to RCOM HW reset to RCOM. (active low)
make_data DMC to RCOM data measurements (scan) command (during scan)
Ap_0 DMC to RCOM Angular pulses.
Ap_90 DMC to RCOM Angular pulses with 900 phase shift.
Rot_index DMC to RCOM Rotation Index pulse (Zero Gate pulse once during rotation)
Com_ok DMC to RCOM Acknowledge signal from Acquisitor board, indicating good reception of
last frame.
DMC_On DMC to RCOM Determines which system the RCOM is connected to
Even_rea RCOM to DMC Selecting one of the 2 focal spots, low=0 for first reading
Rea_clk RCOM to DMC one pulse per reading, Tp> 10s (after reading counting)
Multiplexed Signals
All multiplexed signals are packed into two serial lines, one from DMC16 to RCOM (DMC2rcom) (see Table 6), another
one from RCOM to DMC16 (rcom2dmc) (see Table 7).
Table 5: Multiplexed Signals
Signal Name Direction Function
DMC2RCOM DMC to RCOM Serial interface from DMC to RCOM
RCOM2DMC RCOM to DMC Serial interface from RCOM to DMC
The multiplexed signals on the serial lines are as listed in Table 6.
Table 6: DMC16 to RCOM Signals
Signal Name Part of Function
htp dmc2rcom horizontal table pulses.
XC dmc2rcom enable signal for x-ray
x-ray dmc2rcom x-ray on indication
Hv_drop dmc2rcom HV drop
strobe dmc2rcom handshake signal - data and address are valid
Read/_Write dmc2rcom handshake signal - read/write from/to RCOM Reg.
htp_up dmc2rcom htp count direction
Ecg_trg dmc2rcom ECG trigger
Pulmo Trg dmc2rcom Pulmo trigger
RPD Error dmc2rcom Indicates error with angular pulses
Make Bias dmc2rcom start bias
Table 7: RCOM to DMC16 Signals
Signal Name Part of Function
rcom_ok rcom2dmc RCOM board is functioning.
Ack rcom2dmc handshake signal - acknowledge to strobe signal
Offset_Ready rcom2dmc The OFFSET measurements are ready
Valid data rcom2dmc handshake acknowledge to good data
Strobe rcom2dmc handshake signal - data and address are valid
Read/Write rcom2dmc handshake signal - read/write from/to RCOM Reg.
RCOM_Error_Int rcom2dmc Interrupt problem with RCOM
RCOM_General_Int rcom2dmc Normal interrupt
The DMC16 can access the RCOM’s registers, using dmc2rcom and rcom2dmc lines.
Temperature measurements
Two temperature controllers, each connected to a temperature sensor, are located on the DMS MB. The value of the
sensor is sent through the Reading’s Header, to the ACQ.
The data is read from each Temperature Controller via a 2-wire serial interface (open drain I/O lines). The control of the
Temperature Controller is done through the same serial interface. The RCOM is used to transfer the temperature
control parameters to the Temperature Controllers and to read the temperature of the sensors.
RCOM LEDs
11 10 9 8 7 6 5 4 3 2 1 0
DS_30 DS_27 DS_28 DS_29 DS_25 DS_26 DS_22 DS_23 DS_17 DS_16 DS_14 DS_15
Normal operation mode - Leds blink at different pace. Normal operation mode - Single Green led “running” from side to side at IP pace.
Bad DMC Communication - Leds blink at same pace. Rcom is in Test Mode - Single Red led “running” from side to side at IP pace.
DMS_Error <> 0 - All Red leds blink at the same time repeatedly.
Figure 42: RCOM LED Indication
There are four groups of LEDs on the RCOM board:

• RCOM Front Panel LEDs DS-14 to DS-17, DS-22, DS-23, DS-25, DS-26 on page 53
• RCOM Center LEDs (front panel)- from the DS-27 to DS-30 on page 54
• LEDs on DPU1 and DPU4 on page 55
• Optical link communication LEDs DS-10 to DS-13 on page 58
RCOM Front Panel LEDs DS-14 to DS-17, DS-22, DS-23, DS-25, DS-26
As the RCOM/ DMS Assembly receives power from the CDMP (Vicor Power Supplies), or after “RESTART” button/
command, it performs a BIST (Built In Self Test). During the BIST, the LEDs will light one after another and at the end of
the test, it will display the status of the DMS.
If single, Green LED light “running “ from side to side (according to Gantry Rotation speed), the RCOM (DMS) pass the
BIST.
If single, Red LED light “running “ from side to side, the RCOM is in the Test mode.
If Red LED light “blinks “, there is an error/ problem with the RCOM (DMS). Troubleshoot the problem on the RCOM/
DMS according to the Red light location.
Figure 43:
Examples:
1. If the DS-17, “ADM Error” LED blinks there is a problem with one or more ADMs. Refer to the LEDs located near by
the internal DPUs, to locate the bad ADM.
2. If the DS-15 and DS-25, “Fan Error” LEDs blink/ constantly light ON there is a problem with the DMS Fans. They
are stuck or disconnected.
NOTE If the Red LED blinks, means there is a “Normal” problem. If the Red LED stuck ON, means there is a “Critical”
problem.
RCOM Center LEDs (front panel)- from the DS-27 to DS-30

These LEDs display the status of the RCOM to DMC-16 Communication.
If a Green LED light as a counter from Right to Left then the RCOM operates properly.
If all LEDs blink together in the same frequency there is a problem with the communication between the RCOM and the
DMC-16.
Figure 44:
LEDs on DPU1 and DPU4

In case the “ADM Error” LED (DS-17) indicates problem with one or more of the ADMs, analysis the faulty ADM by the
Figure 45: DPU 4 LEDs Figure 46: DPU 1 LEDs
LEDs near the internal DPUs (DPU 2A, DPU 2B, DPU 3A, DPU 3B)
In case the “ADM Error” LED (DS-17) indicates problem with one or more of the ADMs, analysis the faulty ADM by the
LEDs near by the internal DPUs (DPU 2A/ 2B or DPU 3A/ 3B).
The Auto ADM test performs by the RCOM during “Start-up” and also during normal operation. It tests the following:
• Data Path
• Mode states
• Control signal line/ path
DPU 3 DPU 2
Figure 47: DPU 3 and DPU 2 LEDs
The numbering of the bad ADMs (using LEDs) is in the binary. When each set of the LEDs near by the DPU display
status of different group of ADMs as follows:
• LEDs near by the DPU 2B - ADM No. 11 to ADM No.15
• LEDs near by the DPU 2A - ADM No. 16 to ADM No.21
• LEDs near by the DPU 3A - ADM No. 22 to ADM No.26
• LEDs near by the DPU 3B - ADM No. 37 to ADM No.32
Main
Control
U5
SRAM
Hot SRAM SRAM

DPU
SRAM
DPU Link Mictor DPU DPU
SRAM 2B SRAM 2A 3A
SRAM
3B
SRAM P7
SRAM
Mictor SerDes Mictor Mictor
Mictor
924
Mictor Mictor CIMT Mictor Mictor
Data Data
Link Link
Agilent
Figure 48:
Optical link communication LEDs DS-10 to DS-13

All four LEDS are Green indicates Communication—OK.
One Red LED indicates that the fiber optic cable is disconnected/broken.
Two alternating blinking Red LEDs indicate swapped fiber optic cables—incorrect installation.
NOTE The above conditions are correct for both transmit and receive signals.
Transmit (to ACQ via Optical Link)
Receive (from DPU)
DS_13 DS_12 DS_11 DS_10
Figure 49:
DPU (Data Processing Unit)

The DPU board is part of the DMS.
There are two DPU boards on the DMS, one on each of the MB sides (Left and Right).
The DPU board (controlled by RCOM) acquires detectors data, produce MU data and send the data via optical
transmitters to the RCOM- Main Controller.
There are external DPU boards and internal DPU units. The internal DPUs are implemented inside the RCOM board.
The external DPUs are separate entities, which are located on the MBL and MBR. This section pertains to the external
DPUs.
The DPU board has several interfaces to other subassemblies:

1. RCOM board—discrete scan control lines and communication for Registers/ Memory access. Receiving Operation
Modes for Mu calculation.
2. Ten ADM modules (for each DPU)—for detectors data collection, processing and generating MU data for RCOM
3. Two optical output channels—connected to RCOM for transferring the collected scan data in 1.25G Baud rate
4. LED Indicators—in case of an Error during power up test/ BIST (Built In Self Test)/ nominal operation, relative RED
LED will be displayed and Error signal will be send to the RCOM
The DPU includes a self-reset mechanism—to set the DPU back to its default values.
UHR (Ultra High Resolution Collimator)

The UHR collimator:
• includes slit holes in the Z direction, to mask some of the detector-effective areas, and to convert the detectors
effectively to resemble thinner detectors (see Figure 50).
• may be inserted IN or OUT of the beam in front of the detectors.
• is normally OUT and it is IN only in the UHR Mode.
• covers a Field Of View only up to 250mm. The UH mode is used only up to slice width of 20 x 0.625 or alternately
10 x 1.25 with coverage up to 12.5mm.
• has a slit in the center of the X-ray Y-plane that allows a scan of 2 x 0.5.
A DC motor, connected directly from the CDMP, drives the UHR. It has two limit switches that indicate the IN and OUT
positions.
It is also possible to move the UHR with service keys at the front panel of the DMC16.
Figure 50: Ultra High Collimator—General View
UHR-control
A high-resolution collimator (comb) is implemented for ultra-high resolution scanning at the detector array system.
The DMC16 supports this collimator. There are two limit switches that indicate the IN and OUT position of each
collimator and the DC motor (see Figure 51 on page 61).
It is also possible to move the UHR with service keys at the front panel of the DMC16.
IN
Front Panel
Limit Switch In
CDMP Limit Switch Out

OUT
Driver
Cont Cont
UHR motor
DCM16 UHR
Figure 51: UHR-control Functional Overview
Reference Detector and Converter

The Reference Detector is external to the DMS. Its data is routed into the RCOM via the Reference Converter, so that
its data is part of the RCOM data header. It is therefore included as part of the DMS.
• The Ref. Converter in the BrillianceTM CT is located on the external side of the Tube Collimator aperture. In this
position, the radiation on the detector is proportional to the Tube Collimator opening (see Figure 52).
• The Ref. Det. is connected by a coaxial cable to the converter (see Figure 53). The converter is connected by a
shielded cable to the DMB. From the DMB, it is connected directly to the RCOM.
P4 (to Ref Det) To DMS Left Motherboard
Ref Converter Ref Detector
Figure 52: Reference Converter Figure 53: Reference Detector
Ref Detector and Converter Connection

The Ref Detector compensates for variations of the X-ray during the scan. These variations can be as a result of
instability of the H.V system or of the X-ray Tube.
The Ref Detector is located behind the Beam collimator.
Figure 54 on page 63 illustrates the data path of the REF detector.
Left
REF Detector REF Converter Motherboard RCOMM
P4 P1 JL1 J1 P1
Figure 54: REF Detector Data Path
Cradle
The cradle is a massive precision-machined casting, that carries the 42 Array Detector Modules (ADM), the UHR
Collimator, the main electrical boards (MB, RCOM, two DPUs), and the DMS cover (see Figure 55 on page 64).
The cradle is fixed to the Rotor in such a manner that it provides high rigidity and good alignment of the detection
system, relative to the fan beam of the X-ray (see Figure 56).
The cradle and the DMS cover are equipped with movable weights to balance the required total weight and center of
mass.
Figure 55: DMS Cover
Figure 56: Cradle
DMC16
Overview
The main purpose of the DMC16 board is to interface between the Gantry Stator and the Gantry Rotor (DMS and
RHost).
Figure 57 shows the DMC16 board.
ECOMASS
DMC16
Figure 57: DMC View

The CPM board mounted on top of the DMC16 board performs all the management processes of the scan control. The
DMC16 baseboard hardware supplies the CPM all the information needed to control the scan sequencing and other
functions the CPM performs.
NOTES • The new DMC16 assembly design includes a protective ECOMASS cover that protects the assembly from X-
ray damage.
• The upgraded DMC16 assembly is completely compatible with all Brilliance Air systems and has no changes in
functionality from previous versions.
• The visual difference between the old and upgraded DMC16 is the protective ECOMASS cover on the top of
the DMC16 cover.
The DMC16 board provides the following functions:

• Communicates with the GHost (on the Gantry Stator) via the Control Link
• Communicates with the other Gantry components (CPMs) via CAN bus
• Scan control synchronization and sequencing
• Interfacing and Controlling the RCOM board
• Controls the system collimation drives (UHR, A-Plane motors)
• Controls the Laser Markers on the Rotor
• Processing Rotational Information
• Monitors and controls the E_STOP signal
• Enables diagnostic of the DMC16 board using LEDs, 7-Segment, push buttons and rockers
• Monitors statuses of the DMC16 board for malfunction board behavior sensing
• Allows flashing of the DMC16 and the RCOM from the Host computer
• Verify correct behavior of 7-fan cover
• Provides fan failure alerts
• Allows access to Fan diagnostics
Functional Description
Clock Gen.
E-STOP & Power
and
CAN BUS Supply
JTAG
Connectors
and
Analog Interface
CPM Data DSC

and SDRAM
Mezzanine Control RCOM Int.
HotLink
Front
Control RPD
Panel Peripherals
Link
Figure 58:
The CAN BUS port runs through the CT scanner system and enters the DMC16 board for connection with other sub-
systems on the scanner. The CAN BUS is connected directly to the CPM CAN BUS port.
The HOT LINK (SERDES), capable of transferring data at rates between 50-200 MHz, is mounted for future use.
The Micron 256 Mbits SDRAM is for future use (pin compatible up to 512 Mbits).
The DSC and RCOM FPGA controls both the SDRAM and the SERDES devices in order to enable maximum flexibility.
The Connectors and Analog interface is the actual ports coming and going from/to external sub systems.
All inputs are optically isolated (except for several exceptions) and all outputs are transmitted differentially (except for
several exceptions).
The front panel contains the LED diodes, rockers push buttons as well as the JTAG connector and 7-segment displays.
CPM Board
CPM Main Functions

The CPM main functions are:
• Control and drive the system’s collimation system including the A-Plane and UHR
• Scan synchronization and sequencing
• Manage the Detector Modules and FEE temperature control
• Synchronize data acquisition timing with the RHost and the X-rays
• Control X-ray operation and safety
• Assist in the Z-Correction process
• Support X-tracking and control
• Control other DMS peripherals such as laser markers, 7-segment display, and communication with the Stator
components
• Support Diagnostics, debug, and POST tasks
• Support download capability to the RCOM, CDMP, and DMC16 boards
Inputs to the CPM
The inputs to the CPM are:

• Clock, Power
• Monitors power lines from the FPGAs power regulators
• Monitors power lines of the DMC16 digital 5V, analog 5V and digital 3.3V
• SINE and COSINE inputs from the collimators motors (A-Plane only)
• Motors Sense Lines
• Baseboard ID input pins
• E-STOP Sense signals
• CAN BUS signals
• Control signals:
• XRAY ON
• GDC OK
• E-STOP Sense
CPM Outputs
The outputs from the CPM are:

• Motors PWM output signals
• RCOM RESET
• E-STOP control signals
• Reset signal to FPGAs
• Hardware reset signal to the CPM itself
The CPM operates with 3.3V, which it generates from 5V received from the baseboard.
The CPM software and the hardware monitors the items listed below in order to validate proper operation of the board:
• RCOM OK
• PLL lock lost
• Communication loss error between DMC16 and the RCOM
• Involuntary collimator movement or no movement under command
• Control Link Successive error
• CAN communication Lost with RHOST or GHOST
• RCOM and Acquisitor communication error
• E-Stop sensed
Controlling of the X-ray is one of the CPM goals. The control is achieved using hardware signals (SYNC, XRAY_ON)
monitored and controlled by the CPM.
The CPM supports two serial ports. One is used for development (VxWorks port) and the other for diagnostics (Diag
port).
Connectors and Analog Interfaces

The Connectors and Analog Interface block contains the board connectors to / from the “outside world” of the DMC16
board and includes all the analog and digital interfaces to the incoming and outgoing signals.
The interface is divided into 4 groups of signals:
• Output control to the CDMP – controls the collimators and laser marker, the DMS power supply ON/OFF operation,
and reset to the CDMP board
• Motors differential sense inputs (Sine and Cosine signals), motors fault indications, and switch limits indications.
• CDMP FPGA version signals and spare signals
• JTAG port signals
This block also contains the buffers and opto-couplers for all input signals coming from other boards on the DMS and
the Gantry.
The buffers and opto-couplers are needed in order to give some protection to the incoming signals to the board devices.
This block is divided into several sub blocks:
• Power supply interface producing 3.3V from the digital 5V input
• CDMP Control interface to the CDMP board
• RCOM interface
• RHOST control
• RPM and Encoder
• Auxiliary interface to the MUX Slip Ring
Connector Description
Refer to Figure 59 on page 72.
• P16—power connector to the DMC16 board. It contains digital 5V with digital ground and analog 5V with analog
ground.
• P17—60 pins flat cable connector, transmitting all the control signals to the system devices of the CDMP. The
connector inputs to the DMC16 board contains the CDMP FPGA ID bits, fault signals from the motors, motors
sense lines, spare lines and JTAG pins.
• P18—RCOM interface connector. It is a D-TYPE 25 male connector.
• P19—an A-PLANE connector. It is a 25 pin male D-TYPE connector.
• J21—RHOST connector interface. It is a 44 D-TYPE female connector, with a real time operation signals
• P22—is the JTAG interface to the RCOM board
• P24—a 15 pin male D-TYPE connector used to connect to the Rotor Encoder
• P25—an E-STOP and Ctrl Link interface connector. It is a 9 pin male D-TYPE connector.
• P26—a CAN BUS connector uses 9 pin male D-TYPE connector.
• P27—JTAG HEADER is a 10 bits header connecting to an external JTAG programmer device. The location of this
connector is on the front panel to ease the use of the cable.
• J28—a 9 pin female D-TYPE connector used to connect the RPM_GATE input signal
• P29—a 9 pin male D-TYPE connector for serial CPM two ports
• J23—a 25 D-type female connector - interface to the MUX Slip Ring
Figure 59: DMC16 Connectors
DMC16 in the E-STOP Chain

The E-STOP chain in the Gantry Rotor includes the GHOST, DMC16, and the RHOST board.
Figure 60 on page 73 describes the connections and routing of the E-STOP chain in the system between the GHOST,
DMC16 and RHOST boards.
The Control Link interface is performed using an RS422 driver/buffer device.
ICHAIN > 110 mA +24V P/J28-1

TB303-5
E-STOP POSITIVE P/J4-4
E-STOP RETURN P/J4-11 (GHost)
P25-4 P25-11
DMC16
J21-44 J21-43
P/JYX-44 P/JYX-43
RHost
Figure 60:
Clock Generator and JTAG

The clock generator block is comprised of a 40 MHz SMD clock oscillator, Cypress high-speed multi-phase PLL.
The purpose of this block is to distribute the clocks to all of the DMC16 board.
Several clocks are used:
• 40 MHz
• 20 MHz
• 8 MHz
The 40 MHz clock oscillator is used as the reference clock for the main device that divides the clock and produces the
necessary clock rates.
The 40 MHz is used for the CPM Mezzanine card and to all of the FPGAs.
The 20 MHz clock is used for the SERDES device, RPD and the DSC and RCOM FPGAs internal use.
The 8 MHz clock is produced for DSC and RCOM FPGA for future use.
The JTAG chain on the DMC16 board includes the on-board FPGAs and PROMs, the RCOM JTAG chain and the
CDMP JTAG chain.
The CPM, using I/O pins, can control which of the above JTAG parts is currently connected to the global JTAG chain
(TDI, TDO). It is therefore possible to have only one of the JTAG chains, two of them or all of them on the global JTAG
chain.
The control signals are:
• CPM_JTAG_ENABLE – this signal determines which is the JTAG controller on board (the CPM or external
controller using JTAG cable)
• DMC16_JTAG_Exist – this signal determines whether the DMC16 JTAG devices are included on the JTAG chain or
if it is passed to the RCOM TDI pin (if the DMC16 JTAG devices are on the JTAG chain then the TDO output of the
last device on the DMC16 JTAG chain, RPD FPGA, is passed to the RCOM TDI).
• RCOM_JTAG_EXIST – This signal indicates if the RCOM JTAG devices are incorporated on the global JTAG chain
or the RCOM TDI is passed directly to the CDMP TDI input (if the RCOM is on the global JTAG chain then the
DMP16 TDI is the RCOM TDO signal).
• CDMP_JTAG_EXIST – This signal operates the same as the RCOM_JTAG_EXIST signal does except for the
CDMP JTAG chain.
NOTE The RCOM JTAG interface is differential and the RCOM_TDO input signal is optically isolated.
DSC and RCOM Interface Block

The DSC and RCOM Interface FPGA is used for several purposes:
• Scan sequencing
• Interfacing the RCOM board
• Operating the SERDES
• Using the SDRAM device
In order to do all the FPGAtasks, the DSC and RCOM Interface FPGA is downloaded with data on reset as Serial Slave
and has an interface to the CPM.
The inputs to the FPGA are:
• CPM address, data and control signals
• DMP16_ID signals
• Control Link discrete signals (like HTP, HDIR etc.)
• RCOM interface input signals
• Rotation signals (NSP signals)
• Scan sequence control signals
• Spare signals from the RHOST interface
The DSC and RCOM Interface FPGA outputs are:

• RCOM output interface signals
• Make_Data and Make_Offset signals
SDRAM Block
The SDRAM device is Micron 256 Mbits SDRAM organized as 4M X 16 bits X 4 banks. The SDRAM control and data
signals are connected to the DSC and RCOM Interface FPGA and is used as temporary data storage during normal
process of the FPGAs.
CTRL (Control Link) Functional Block

The CTRL LINK FPGA is loaded from a PROM device common to the RPD and CTRL LINK FPGAs.
This block contains the CTRL LINK FPGA for the following Control Link functions:
• Communicating with the GHost
• E-STOP control
• Quad-UART control
RHOST
DMC16
ARC_DETECT
ESTOP 1
ESTOP 2
GHOST
RPULSE
D15
XON XRAY_ON
AP0
AP90
0DEG_INDEX INDEX
PULMONARY R S232 R X
EKG R S232 R X Control Link
DMS D IAGNOSTIC RS232 R X DMC16 t o GH ost
RHOST_TX RHOST D IAGNOSTIC RS232 R X
GDC_OK GDC_OK
MAKE_DATA
SPARE1
RH2DMC_SPARE1 SPARE2
EVEN_CLK SPARE3
SYNC SPARE4
SPARE5
D0
RES_EXC_REF_IN
SYNC
RH2DMC_SPARE0 EVEN_CLK
Digital Signal [2:0] Serial Link R Host t o D MC16
Digital Signal [2:0]
Message F ield [ 23:0] Message F ield [ 23:0]
Message F ield [ 23:0] Serial Link D MC16 t o R Host Message F ield [ 23:0]
HDIR
Digital Signal [2:0] D15
XRAY_EN
HTP HTP
HDIR
PULMONARY R S232 T X
EKG R S232 T X
DMS DIAGNOSTIC RS232 TX
RHOST_RX RHOST DIAGNOSTIC RS232 TX Control Link
ECG_R_PULSE GHost to DMC16
PULMONARY_R_PULSE
DOSE_MIN DOSE_MIN
SRVC_MODE
COM_OK
Digital Signal [ 0]
SPARE1
Digital Signal [1] ZERO GATE
SPARE2 D0
RES_EXC_REF_OUT(SPARE)
Digital Signal [ 2]
Figure 61: GHost Connection to DMC 16
The inputs to this block are:

• CPM address, data and control signals
• RPD signals output
• Serial port signals to download to the GHOST
• Control signals on the board (XRAY_ON, GDC_OK, etc.)
The outputs of this block are:

• CTRL LINK signals (HDIR, HTP, EKG_GATE, Pulmo_Gate, etc.)
• Seven-Segment data
• FPGAs interconnect signals
Peripheral Functions
The Peripherals block contains the Peripherals FPGA and the Peripherals PROM device (also used to download DSC
& RCOM Interface FPGA).
The main functions of the Peripherals FPGA are:
• Managing of the Collimators (enable movement and direction signals)
• Control of the Laser Marker
• Control of the Front Panel LED diode, push buttons and rockers
• Help in serial port operation mode (through cable or CTRL LINK)
RPD Function Block

The RPD monitoring the rotation of the Rotor (QUAD A, QUAD B, NORTHMARK145, ZERO GATE) and supply:
• To the RCOM the AP_0, AP_90 and INDEX signals
• To the RHOST the R_PULSE and 0_INDEX signals
• To the DSC&RCOM FPGA the NSP_PULSE, NSP_ZERO and NSP_DIR signals
The RPD also monitoring the Patient Table’s position and provide it to the DSC & RCOM FPGA.
Figure 62: Marker and R2D connection to DIF and DMP
Driver Control by the DMC16 via CDMP

The DMC16 controls the following via the drivers on CDMP:
• A-Plane Collimator
• Laser markers
A-Plane Collimator
The A-plane collimator has two blades that move in parallel at Z direction. The movement performs, using three
independent control DC motors:
• Collimator Slice Width opening
• Collimator Z-position
• Collimator filter
Blade 1
Z Position Opening
Blade 2
Figure 63:
A-Plane Connection to DMC16 and CDMP
Optical Limit SWitches

Limit switches In Out
Analog Sin
Analog Cos Encoder
Fine/Course
Direction
Enable Power M
PWM (Speed)
Slice Width Control
Analog current sense Slice Width
Fault
Optical Limit SWitches
Limit switch In Out
Analog Sin
Analog Cos
Encoder
Fine/Course
Direction
D.M.C Enable Power
M
16 PWM (Speed)
Analog current sense
Z_Position Control
Fault
Z Position
Limit switch Optical Limit SWitches
In Out
Analog Sin
Analog Cos
Fine/Course Encoder
Direction
Enable Power
M
PWM (Speed)
Filter Control
Analog current sense
Filter
Fault
CDMP APlane
Figure 64:
A-Plane Control
After the DMC16 receives a command to bring the collimator to a desired opening and position (according to the
protocol parameters), the CPM calculates the corresponding encoder’s positions (for each of the two motors) and
supplies the control signals to the collimator drivers (at the CDMP):
• PWM pulses for speed
• Direction
• Motor enable
The motors receives current from the motor drivers located on the CDMP board. The CPM generates the following
signals to control the motor drivers; all the control and sense signals are opt-couplers insulated.
• 3 X PWM signal to set the motor speed and torque
• 3 X Direction signal to determine the motor direction (open or close, in or out)
• 3 X Enable signal to enable/disable motor movement, and to catch the motor in place
Laser Marker
The Laser Marker circuit is controlled by DMC16 “MRK_ON” signal and supplies 5V_drive power to the laser markers.
The CDMP senses the laser marker current and provide the marker fault status (Red LED “MRK_FLT”).
Front Panel Block

The front panel contains LED diodes (bi-color - red and green), rockers, push buttons, JTAG connector for flashing, and
7-segment displays.
SLICE JTAG
IN UHR FILTER Z DIR MARKER RESET
WIDTH
OUT
NSP ZERO
DIAG MODE
NSP PULSE
UHR CLOSE
E-STOP
DFS
MAKE DATA
SERDES
PLL LOCK
FPGA OK
CPU OK
A5V
D5V
FRAM
CTRL
2V5
3V3
LFI
UHR OPEN
CTRL CRC
CAN ERR
XRAY ON
MAKE OFF
Figure 65: Front Panel
Table 8: DMC16 Front Panel LEDs (from right to left)
LED Description
D5V Digital 5V indication (Green - Valid)
3V3 Digital 3.3V indication (Green - Valid)
2V5 Digital 2.5V indication (Green - Valid) - Composed as wired OR of four voltage regulators
A5V Analog 5V indication (Green - Valid)
CPU_OK CPU internal POST (Green - passed; Red - Failed)
FPGA_OK All four FPGAs are loaded (Green - Successfully; Red - Failed to load)
PLL_LOCK RoboClock PLL is locked (Green - Locked; Red - out of lock)
SERDES_LFI Serial fiber communication framing (Green - O.K; Red - Lost frame)
MAKE_OFF Make offset active (Green - Active)
MAKE_DATA Make Data active (Green - Active)
Table 8: DMC16 Front Panel LEDs (from right to left)
LED Description
XRAY_ON X-ray is active (Green - Active)
DFS DFS is active (Green - Active)
CAN_ERR CAN BUS error (Green - No errors, Red - errors occurred)
E-STOP E-STOP is open (Green - no E-STOP sensed; Red - E-STOP is open)
CTRL_CRC Control link CRC error (Green - no errors; Red - CRC errors where found)
CTRL_FRAM Control link Frame error (Green - no errors; Red - Frame errors where found)
UHR_CLOSE UHR is open (Green - UHR in Open position)
UHR_OPEN UHR is closed (Green - UHR in Close position)
NSP_ZERO NSP zero pulse occur (Green - pulse received)
NSP_PULSE NSP pulse occur (Green - received pulse)
DIAG_MODE In diagnostics mode (Green - in diagnostic mode)
Table 9: DMC16 Seven-Segment Codes
Code Description Code Description
33 After a successful reset and system initialization 47 Scan Initialization State
40 Idle: you may see this state after shots 48 No frames generated by DMC
44 & 37 Scan: during data acquisition process 26 Communication Collapse (no communication to Acquisitor)
46 Scan timeout: a shot did not end correctly
The push buttons are:

• Reset enabling the reset of the CPM and the FPGAs state machines
• Laser Marker
The FPGAs state machines reset is done using a power monitor device, which enforces reset when the input voltages
exceeds 10% from the 5V and 3.3V or the reset Push Button is pressed. The device waits for 350ms after the
voltages are within the expected range and the Push Button is not pressed and then removes the reset signal to the
FPGAs.
The rockers are:
• AP open/Close SW
• AP open/Close Z
• Filter in/out
• UHR in/out
Jtag 10p connector
Four Toggle Switches Indicator LEDs
Push button Switch Seven Segment Display

Figure 66:
DMC16 Reset Mechanism and FPGAs Reloading

The DMC16 board reset mechanism is divided into two categories:
• CPM reset
• Base board FPGAs state machines reset
The CPM reset line is called RST and is connected to the CPM hard reset line.
The baseboard FPGAs state machines reset line is called BB_nRESET and is connected to all FPGAs.
The CPM can be reset by:
• Power up
• The Reset Push Button
• CPM I/O signal called CPM_RESET, which causes the CPM to reset itself
• FPGAs DONE signal
All four reset options enter the power
monitor device, which sense the 3.3V and CPM_RST
D5V and pulls the BB_nRESET signal low Power U p CPM Reset
300 ms after the power is valid and the RST
nPBRST is not active. Reset P.B

Mechanism
The nPBRST input to the power monitor
device is the logical AND between all
BB_nRESET sources hence the
BB_nRESET is active as long as the power
is not stable or push button is pressed or
FPGAs haven’t loaded yet or the CPM
resets the baseboard FPGAs. CPM_BB_nReset
BaseBoard Reset BB_nRESET
Figure 67 on page 86 illustrates the reset CPM_BB_nReset

W/Anti- Bouncing
mechanism of the DMC16 board.
PERIPH_DONE
Power-Up_Reset
CTRL_LINK_DONE
Figure 67: Base Board Reset Mechanism
Power Supply Block

The DMC16 receives Digital 5V / 5A and Analog 5V / 5A power direct from the CDMP.
On board voltages used are:
• Digital 5V
• Analog 5V
• Digital 3.3V
• Four digital 2.5V supplies – one for each FPGA
• Special linear regulator 5V-3.3V is used for the SDRAM device.
• CAN BUS and CTRL LINK interface uses isolated supplies using unregulated DC2DC converters.
The input power lines are isolated from the CDMP inputs using filters.
Table 10 shows the different power supply notations.
D5V is marked on the schematics, as a blank triangle while the P5VAN is black color filled triangle.
Table 10: Power Supplies to DMC16 board
Power Name Before PI filter After PI filter
Digital 5V 5V D5V
Digital ground 5V_GND DGND
Analog 5V 5VP P5VAN
Analog ground 5VP_GND AGND
The 3.3V is produced using a DC2DC converter directly from the D5V.
The DC2DC converter maximum efficiency is 95%.
The FPGAs internal operation 2.5V is produced on board using linear regulators directly from the D5V supply.
Each FPGA has its own regulator (there is some redundancy but the system is quieter).
CDMP
CDMP Overview
The CDMP receives a 24V Power Supply from the P3 and provides power to the DMC16 board, Gantry Rotor Markers,
A-Plane and the UHR.
Figure 58 shows the CDMP board.
ECOMASS
CDMP
Figure 68: DMC View and Position in System

The center of the CDMP board is the FPGA. The FPGA controls all of the board functions and manages the board’s
operation. The FPGA communicates with the DMC16 using the peripherals interface. The FPGA also controls the
drivers and diagnostic LEDs.
The CDMP board contains JTAG support for on-board programming of the PROM from the JTAG connector or from the
Host Computer via DMC16.
NOTES • The new CDMP assembly design includes a protective ECOMASS cover that protects the assembly from X-
ray damage.
• The upgraded CDMP assembly is completely compatible with all Brilliance Air systems and has no changes in
functionality from previous versions.
• The visual difference between the old and upgraded CDMP is the protective ECOMASS cover on the top of
the CDMP cover.
The CDMP board provides the following main functions (see Figure 72):
• Supplies the regulated voltages +5.0VA, -5.0VA, 3.3VD to the DMS
• Monitors the regulated voltages +5.0VA, -5.0VA, 3.3VD to the DMS
• Provides shutdown and protection for the above voltages for P1 and P2 Power Supplies
• Supplies and monitors 5VA and 5VD voltages to DMC16
• Interfaces control signals between CDMP and DMC16
• Interfaces analog signals between CDMP and DMC16
• Drives the A-Plane motors
• Drives the UHR motor
• Drives the laser markers on the Gantry Rotor
• Supplies 24VDC voltage to DMS Fans
• Enables diagnostics and debugging of the CDMP board using LEDs and DMC-16 control/status interface.
CDMP Functional Description
Stator Rotor
Regulated +VAN, -VAN, 3.3V, UHR PWR
110V
Power
110V
DMS
Power MARKER
Power
Supply 24V
CDMP
Power
PWR CTRL A_Plane

X
E_Stop S E_Stop
l Position P
GHost Control Link S
iS Control Link O
S
l
pl
i
i
Rotation R2D
p
Rp
i
R
nR D.M.C Ref.
CTRL Motion i
gi Det.
Analog Ref. Conv.
16
Control
n
n
g CTRL PWR
g
CTRL/Comm DMS_IDT
Couch UHR
Control
CTRL
D.I.F
HOST RHost
CAN BUS CAN BUS
Figure 69: CDMP Overview
The CDMP to DMC16 board interface uses a 60 pin flat cable connector.
The interface is divided into 4 groups of signals:
• Input control to the CDMP – controlling the collimators and laser marker, controlling the DMS power supply ON/OFF
operation, and reset to the CDMP board
• Motors differential sense outputs, motors fault indications and switch limits indications
• CDMP FPGA version signals and spare signals

• JTAG port signals
All inputs to the CDMP board are optically isolated using opto-couplers.
All outputs to the DMC16 board are driven by the buffers and isolated using opto-couplers on the DMC16 board.
The analog power is transferred through the CDMP 60 pins flat cable while the analog ground is transferred using the
CDMP power connector.
The D5V_GND power line is transferred to the CDMP board in order to enable the CDMP to optically isolate the single
ended control lines from the CDMP board.
In order to follow up the CDMP board hardware revision, the board hardware ID was introduced for reading by FPGA.
The FPGA firmware revision can be read by the DMC16.
Clock Gen. &

JTAG
Power IN
Power Control
Sense Supplies Data
Feedback Control PROM
Power OUT FPGA
Connectors
A/D
DRIVERS Peripherals
Front
Panel
Figure 70: CDMP Board Block diagram

This block is divided into several sub-blocks (see Figure 70):

• Power – power supply interface, filtering the incoming power lines
• DMC16 – Control interface to the CDMP board
The Connectors Interface

The Connectors are interfaces to the “outside world” (external sub systems) of the CDMP board, and includes all the
analog and digital interfaces to the incoming and outgoing signals. All inputs are optically isolated (except for several
exceptions), and all outputs are transmitted differentially (except for several exceptions) using a protection diode in
differential combination.
• P17—DMC SIGNALS: 60 pin flat cable connector transmitting to the CDMP board all the control signals to the
system devices controlled by the CDMP board. The connector inputs to the CDMP board contains the CDMP
FPGA ID lines, fault signals from the motors, motors sense lines, spare lines and JTAG pins.
• P10—connector 24V_IN power connector contains the input power 24V from the P3 Power Supply and its sense
signals.
• J12—connector N/A
• J13—connector N/A
• J15—UHR: a 9 pin D-TYPE female connector for driving the power to UHR motor. It also reads the UHR limit
switches status for use in DMC16.
• J20—A-PLANE: a 9 pin D-TYPE female connector for driving the power to 3 A-Plane motors: Slice Width, Z-
direction and Filter.
• P14—MARKERS: a 9 pin D-TYPE male connector for driving the power to the laser markers on the rotor.
• P11—FANS: a 9 pin D-TYPE male connector for driving the 24V power to DMS Fans. It also includes DMS thermal
switch signals.
• P37—a 3 pin AMPMODU male connector for external power supply PS1 shutdown.
• P38—a 3 pin AMPMODU male connector for external power supply PS2 shutdown.
• P39—N/A
• P40—N/A
• P36—a 3 pin AMPMODU male connector for DMS thermal switch monitoring.
• P33—JTAG HEADER a 10 bits header connecting to an external JTAG programmer device. The location of this
connector is on the front panel to ease the use of the programming cable.
• P16—DMC POWER power connector from the CDMP board to DMC16. It contains digital 5V with digital ground
and analog 5V with analog ground.
Figure 71: CDMP Connectors Panel
Figure 72 on page 94 describes CDMP board Power distribution:
CDMP
5V
analog
5V DMC16
digital
Feedback
Control
PS3 F
24V I
Power L
T
supply
Safety
E
DMB
R
3.3V
digital
5.75V A-PLANE
analog -Opening
-Z direction
-Filters
24V Motor
Drivers
- UHR
5.75V
analog
Laser
DIF - Fans
Figure 72: CDMP Power Supply Block Diagram

Power Sub Block Description

The CDMP is powered by 24V voltage from the P3 power supply.
The board distributes the 24V to the CDMP power regulators and to Motor drives.
On-board fuses Figure 73 on page 95:
• F1—24VDRV (signal) - 24V for the drivers
• F2—24VIN (signal) - Main 24V into the CDMP after
internal filter and stabilization
• F3—24VFAN - 24V Power Supply to the DMS fan
Figure 73: CDMP Fuses

The CDMP board power regulators produce the following voltages:
• Floating digital 5V to DMC16
• Floating analog 5V to DMC16
• Internal +5V, 3.3V, 2.5V voltages for use in CDMP
• P5V voltage for laser markers
The isolation between the DMC16 analog and digital grounds is accomplished by using separate floating regulators.
The board contains a bulk of capacitors for filtering and voltage stability.
Test points are distributed throughout the board for power diagnostics.
A/D Sub Block Description

The A/D consists of 8 input channels analog to digital converter with serial output and 8 voltage dividers for measured
input voltages adaptation.
The measured voltages are:
• +3.4VD, +5.7VA, -5.7VA – digital and analog voltages supplied to ADMs
• DMP_D5V, DMP_5VP – digital and analog voltages supplied to DMC16
• +5V, 24V_IN, 24V_DRV – CDMP internal voltages
FPGA Block
This block contains the FPGA and the buffer devices.
The inputs to the FPGA are:
• Motor drivers control signals (En, DIR, PWM)
• Motor drivers over-current signals
• Power supplies feedback and protection signals
• A/D diagnostics
• Control signals on the board (MRK_ON, OVTMP, etc.)
The outputs of this block are:

• Motor drivers control signals
• LED diagnostics
• Motor drivers fault signals
The FPGA is loaded from a PROM device. The loading process is serial.
The FPGA has its own debug port connector using a 10 bit header connected to dedicated JTAG pins. The JTAG chain
on the CDMP board includes the on-board FPGA and PROM and can be configured to be the part of DMC16 JTAG
chain.
Peripherals Block
The main functions of the Peripherals block component is to support the operation of the FPGA, to set polarity and
levels of FPGA controlled signals. The Peripherals FPGA also controls the collimators output enable and direction
signals.
Drivers Block
The Drivers block contains four independent motor drives and laser marker drive.
Each motor drive is controlled by FPGA signals EN, DIR, Brake.
The motor drive also includes integrated current feedback read by optic-amplifier in order to isolate analog sense to
DMC16.
There is Motor Drive over-current fault signal included for each motor drive and for laser marker drive.
The fault signal generated at over–current condition must stop the Motor drive control signals from FPGA.
Front Panel
This block contains the LED diodes for on-line status

indication and JTAG connector for direct on-board CDMP
FPGA programming. The signals connected to
24 DVR
READY
JTAG
24 VIN
LED’s are shown in Table 11. FAULT DMS
DMS PS
SHTDN
MRK
UHR
ON
APSW
APF
APZ
S VD
SVA
P33
Figure 74: CDMP Front Panel
Table 11: Diagnostic Indicators by LEDs
# LED Color Comments
1 D5V Green 5V digital is O.K
2 5VP Green 5V analog (5VP) is O.K
Green/Red DMS voltage is O.K-green, DMS voltage is low- OFF, DMS voltage is
3 DMS_ON
over - red
4 DMS_PS_SHTDN Red External PS OFF
6 24V_IN Green Input 24VDC is OK
7 24V_DR Green 24VDC Drive voltage is OK
8 AP_SW_FLT Red A-Plane SW driver fault
Table 11: Diagnostic Indicators by LEDs
# LED Color Comments
9 AP_Z_FLT Red A-Plane Z driver fault
10 AP_FIL_FLT Red A-Plane Filter driver fault
11 UHR_FLT Red P-Plane UHR driver fault
12 MRK_FLT Red Laser marker driver fault
13 Ready Green FPGA Ready State - toggle
The CDMP board contains reset mechanism that appears at the end of successful FPGA reloading procedure.
The CDMP FPGA reload can be done in three ways:
• At power up
• At initiating the “DMP_RESET” from DMC-16
• At “DMP_RELOAD_CLK” freeze from some reason for more than 300msec
Troubleshooting
Power Fault Indication

The CDMP shuts down P1 and P2 VICOR external power supply (provide analog and digital voltages to ADMs on the
DMS) in case of any out of limits voltage detection/ over current in the next order:
The “over” problem detected in one of the DMS power voltages shuts down all the DMS power voltages (and not D5V,
5VP to DMC16), except for the voltage provide to DMS Fans, RCOM and thermal switch.
The “over” problem in DMC-16 voltages shuts down the failed voltage only.
The CDMP provides a Power ready signal “DMP_PS_OK” to indicate a stable power.
All the DMS power (P5.7VA, N5.7VA, 3.3VDD) may be switched off by a signal “DM_POWER_ON” from the DMC16 or
may be switched by CDMP.
CDMP troubleshooting is currently performed using the CDMP front panel indicators.
The LED diodes are divided into several groups:
• Power indicators – seven green LED diodes

• Ready state – one green LED diode
• Fault indicators – five red LED diodes
Upgrade
Programmable devices are FPGA and PROM.
The FPGA and PROM firmware can be upgraded from the HOST computer via the CDMP JTAG connectors or through
DMC-16 JTAG lines.
Safety and Regulatory

List of applicable standards the board complies to:
• UL94—Flammability
• IEEE1149.1 for JTAG programming and BSCAN
• IPC-D-317—PCB High speed design
• IPC-2221—Generic PCB
• EN 60601-1—Medical Electrical Equipment – General requirements for safety
• EN 60601-1-2—Medical Electrical Equipment – Electromagnetic Compatibility – Requirements and Tests
• IEC 60721-3-2—Transportation Class 2-M-2
DMS Cables
DMS Cables
This block diagram shows the DMS cable connections. All cable drawings can be found in eSPF.
DMS Left & Right MB
Left - DMS PS1
DMS PS-1 DC Power Cable
Right - DMS PS2 DMS PS-2 DC Power Cable
DMS PS3

CDMP Card
24V DC Power Cable
Ref. Converter
Ref. Converter Cable
ShutDown PS2 Cable
Power Enable Cable
ShutDown PS1 Cable
A-Pl.Coll. Motors Left & Right Fans

A-PL.Coll. Motors
DMS Bracket
DMS UHR Coll. UHR P-15 DPU 4 Card
UHR Coll. Cable UHR Ext. Cable OC0708
Markers
Marker Cable DPU 1 Card
OC0709
Tx. Boxs
Signals DC Power
OC0730
Optical Silp Ring
Aux. Optical SlipRing Cable
A-Pl.Coll.
A-PL.Sense Coll. RCOM Control Cable
RPM - Rot Enc.

R 2 D Cable Jtag Rcom Cable
RPM - Gate
RPM-Gate Cable
E/ Stop
SlipRing E-Stop
Jtag Progra.
Jtag Programming
S/R Can Bus

Can Bus
R/ Host R - Host
DMC/ C B d

DMS Manual

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

DMS Manual

Uploaded by

Copyright:

Available Formats

Brilliance CT TM

DMS Service Manual

4550 193 04191

© 2012 Koninklijke Philips Electronics N.V. All Rights Reserved.

! Attention symbol Radiation warning symbol

Laser warning symbol Biohazard warning symbol

Magnetism warning symbol Projectile warning symbol

Electrical warning symbol Do not touch

Crush warning symbol

Diagnostic Imaging Systems - Mechanical-electrical Warning

Diagnostic Imaging Systems - Radiation Warning

ECO # Revision Date Comments

R61020044 A September 2004 New Release

E61050002 B January 2005 RCOM troubleshooting added

Updated for Brilliance 64

Corrections in Operating Temperature Overview on page 15

Updated for V2.6

T-001121 F Documentation Control release

In DMS Cables on page 101, replaced diagrams of individual cables with a

This document was prepared by the CT BU Service Innovation Department.

DMS (Data Measurement System) ................................................................................................... 5

DMS Cables .................................................................................................................................. 101

ASIC Application Specific Integrated Circuit

DFS Dynamic Focal Spot

FEE Front End Electronics

FFS Flying Focal Spot

PREP Pre-processed raw data—a step in the reconstruction

Sample A single measurement by one detector element during an integration period

Sampling Density A parameter describing the number of fans per rotation

BIP Back Illuminated Photo diode

CHP Couch Horizontal Position

DMS Data Measurement System

EDSI End of Data Sequence Interrupt

FEE DMS Front end electronics

FRU Field replaceable units

MBL Left motherboard

RCOM Rotational Communication and Control card in the DMS

MBR Right Motherboard

UHR Ultra-High Resolution Collimator

XRS X-Ray System

XRT X-Ray Tube

DMS (Data Measurement System)

DMS Functional Description

Figure 1: System Block Diagram

DMS Power Supply Distribution

DMS Block Diagram

Brilliance 40/64 Slice Configuration DMS & DIF

Right Mother Board

Control UARTs DPU

+24VDC +3.4VDC, +5.00VDC, -5.00VDC

Figure 2: DMS Block Diagram

Main Subassembly Outline

RCOM with Two DPUs

Vicor Power Supply

DMS Cover Fans

PS2 DMC16 CDMP PS1 PS3

DPU 4 (Right) ADM UHR RCOM DPU 1 (Left)

DPU 4 (Right) UHR ADM RCOM DPU 1 (Left)

Figure 4: DMS Overview - new type

There are two parts of the Data system:

The DMS external devices:

Data Sampling and Scan Modes