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메모리설계
메모리설계
메모리설계
MEMORY MAP / 주소 할당
Address (H) Address (Binary) ` Size
600000 0110/0000/0000/0000/0000/0000 1Mb x 8 ROM ROM
6FFFFF 0110/1111/1111/1111/1111/1111 (2MB)
700000 0111/0000/0000/0000/0000/0000 1Mb x 8 ROM
7FFFFF 0111/1111/1111/1111/1111/1111
800000 1000/0000/0000/0000/0000/0000 1Mb x 8 DRAM DRAM
8FFFFF 1000/1111/1111/1111/1111/1111 (3MB)
900000 1001/0000/0000/0000/0000/0000 1Mb x 8 DRAM
9FFFFF 1001/1111/1111/1111/1111/1111
A00000 1010/0000/0000/0000/0000/0000 1Mb x 8 DRAM
AFFFFF 1010/1111/1111/1111/1111/1111
B00000 1011/0000/0000/0000/0000/0000 256Kb x 8 DRAM DRAM
B3FFFF 1011/0011/1111/1111/1111/1111 (0.75MB)
B40000 1011/0100/0000/0000/0000/0000 256Kb x 8 DRAM
B7FFFF 1011/0111/1111/1111/1111/1111
B80000 1011/1000/0000/0000/0000/0000 256Kb x 8 DRAM
BBFFFF 1011/1011/1111/1111/1111/1111
BC0000 1011/1100/0000/0000/0000/0000 128Kb x 4 SRAM SRAM
BCFFFF 1011/1100/1111/1111/1111/1111 (0.25MB)
BD0000 1011/1101/0000/0000/0000/0000 128Kb x 4 SRAM
BDFFFF 1011/1101/1111/1111/1111/1111
BE0000 1011/1110/0000/0000/0000/0000 128Kb x 4 SRAM
BEFFFF 1011/1110/1111/1111/1111/1111
BF0000 1011/1111/0000/0000/0000/0000 128Kb x 4 SRAM
BFFFFF 0011/1111/1111/1111/1111/1111
2.전체 회로도
파란선 : DATA BUS
3. 메로리 선택 / DECODER1, 2, 3
DECODER 1, 2, 3 를 통해 각각 어디의 주소로 선택되는지 파악한다. 컨트롤 신호가 액티브
되면 주소가 ADDRESS 버스에 입력되고 먼저 A22, A21, A20 이 DECODER1 에서 DECODING
된다.
DECODER 1
DECODER 2
3. 회로설명
1) 주소영역 600000 ~ 7FFFFF(H)