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Module 3: Basic Structure of Computers

Basic Concepts:
 Computer Architecture: Structure and behaviour of the computer. It
includes the information formats, instruction set and techniques for
addressing memory.
Computer Hardware
(displays, storage media,etc)

Instruction Set Architecture


Computer Architecture (instruction set, registers, memory
organization)

Computer Organization
(includes memory system, bus
structure & design of internal Cpu)

 Instruction Set Architecture (ISA) types:


o CISC : Complex Instruction Set Computer
o RISC : Reduced Instruction Set Computer
 Computer Organization:
o It refers to the operational units and their interconnections that
realize the architectural specification.
Functional units:
 Five main components of computer:
o Input
o Output
o Memory
o Arithmetic and Logical Unit (ALU)
o Control Units
Basic Operational Concepts:
1. An instruction consists of 2 parts:
OPCODE OPERANDS

2. The data are stored in memory.


3. Individual instructions are brought from memory to the processor.
4. Then processor performs specified operation.
Example: Let’s consider an addition operation.
ADD LOCA, R0
Steps to execute the instruction:
i. Fetch instruction from main-memory into processor.
ii. Fetch operand at location LOCA from main-memory into
processor.
iii. Add memory operand to contents of register R0.
iv. Store the sum (result) in R0.
Alternately, it can also be executed as follows.
Load LOCA, R1
Add R1, R0
Steps to execute the instruction:
i. Fetch instruction from main-memory into processor.
ii. Fetch operand at location LOCA from main-memory into
register R1.
iii. Add content of register R1 to contents of register R0.
iv. Store the sum (result) in R0.
Main Parts of Processor:
1. Processor contains ALU, control unit and many registers.
2. R0 to Rn-1 are ‘n’ general-purpose registers.
3. Instruction register (IR) holds the instruction that is currently being
executed.
4. Control Unit (CU) generates timing-signals that determine when a given
action is to take place.
5. Program Counter (PC) contains the memory-address of the next-
instruction to be fetched & executed. During execution of an instruction,
the content of the PC are updated to point to next instruction.
6. Memory Address Register (MAR) holds the address of the memory
location to be accessed.
7. Memory Data Register (MDR) contains the data to be written into or read
out of the addressed location.
MAR and MDR facilitates the communication with memory.
Steps to execute an instruction:
i. Address of first instruction (to be executed) gets loaded into PC.
ii. Content of PC are transferred to the MAR & CU issues Read signal to
memory.
iii. After certain amount of elapsed time, the first instruction is read out of
memory and placed into MDR.
iv. Next, the contents of MDR are transferred to IR. The instructions can be
decoded, and executed at this point.
v. To fetch an operand, its address is placed into MAR & control-unit issues
Read signal. As a result, the operand is transferred from memory into
MDR, and then it is transferred from MDR to ALU.
vi. Likewise required number of operands is fetched into processor.
vii. Finally ALU performs the desired operation.
viii. If the result of this operation is to be stored in the memory, then the result
is sent to the result is sent to MDR.
ix. The address of the location where the result is to be stored is sent to the
MAR and a write cycle is initiated.
x. At same point during execution, contents of PC are incremented to point to
next instruction in the program,
Bus Structure:
 A bus is a group of lines that serves as a connecting path for several
devices.
 These lines carry data or address or control signal.
 Types of bus structures:
o Single Bus Structure
o Multiple Bus Structure
Single Bus Structure:
 The bus can be used for only one transfer at a time.
 Advantages:
o Low cost
o Flexibility for attaching peripheral devices
Multiple Bus Structure:
 Multiple buses are used to to achieve more concurrency in operation.
 Two or more transfers can be carried out at the same time.
 To synchronize devices with different speeds, buffer-registers are used.
 Advantage: Better performance.
 Disadvantage: Increased cost.
Performance:
 Most important measure of performance of a computer is its speed of
execution of programs.
 Factors affecting the speed are:
o Instruction-set
o Hardware
o Software including the operating system
o Compiler (in case of high level language)
 All program instructions are stored in the main-memory.
 As execution starts, instructions are fetched into the processor, and a copy
is placed in the cache.
 If same instruction is needed a second time, it is read directly from the
cache.
 By using cache memory the movement of instruction between main-
memory and processor is minimized resulting in faster execution.
Processor Clock:
 The processor clock is a timing mechanism that regulates the execution
of instructions in a computer. It produces clock cycles, and each cycle
represents a unit of time during which an operation can take place.
 To execute a machine instruction, the processor divides the action to be
performed into a sequence of basic steps such that each step can be
completed in one clock cycle.
 The clock rate is the frequency at which the clock generates pulses,
measured in Hertz (cycles per second).
 Let P= length of one clock cycle.
R = Clock rate
Such that, 𝑅 = 1/𝑃
 Unit of R is Cycles per second or Hertz (Hz).
Basic Performance Equation:
Let T = Processor time required to execute a program
N = Actual number of instruction executions
S = Avg. no. of basic steps required for one machine instruction.
R = Clock rate in cycle per second.
Program execution time is given by:
N×S
T= (Basic performance equation)
R

Performance Measurement:
 The performance measure is the time taken by a computer to execute a
given benchmark.
 System Performance Evaluation Corporation (SPEC) rating is given by
SPEC rating = (Run time on reference computer) / (Run time on computer under test)
 SPEC rating = 50 means the computer under test is 50 times as fast as
reference computer.

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