Register Transfer & -operations

REGISTER TRANSFER AND MICROOPERATIONS

• Register Transfer Language

• Register Transfer

• Bus and Memory Transfers

• Arithmetic Microoperations

• Logic Microoperations

• Shift Microoperations

• Arithmetic Logic Shift Unit

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Register Transfer & -operations Register Transfer Language

MICROOPERATION

An elementary operation performed during one clock pulse,

on the information stored in one or more registers

Registers ALU 1 clock cycle

(R) (f)

R  f(R, R)

f: shift, count, clear, load, add,...

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Register Transfer & -operations Register Transfer Language

REGISTER TRANSFER LANGUAGE (RTL)

The (internal) organization of a computer is defined by:

• Set of registers and their functions
• Set of Microoperations :
– Set of allowable microoperations provided by the organization of
the computer
• Control signals that initiate the sequence of microoperations

Any function of the computer can be described by a sequence of

microoperations using RTL

Register transfer language (RTL):

• A symbolic language
• A convenient tool for describing the internal organization of digital
computers
• It is used to facilitate the design process of digital systems

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Register Transfer & -operations Register Transfer

REGISTER TRANSFER
Designation of a register - a register
- portion of a register
- a bit of a register
Common ways of drawing the block diagram of a register
Register Showing individual bits
R1 7 6 5 4 3 2 1 0

15 0 15 8 7 0
R2 PC(H) PC(L)
Numbering of bits Subfields

Representation of a (parallel) register transfer

R2  R1
A simultaneous transfer of all bits from the source register to
the destination register, during one clock pulse
Representation of a controlled (or conditional) register transfer
P: R2 R1
A binary condition (P=1) which determines when the transfer
is to occur
If (P=1) then (R2 R1)

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Register Transfer & -operations Register Transfer

HARDWARE IMPLEMENTATION OF CONTROLLED TRANSFERS

Implementation of controlled register transfer

P: R2 R1

Block diagram Control P Load

R2 Clock
Circuit
n
R1

Timing diagram t t+1

Clock

Load
Transfer occurs here

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Register Transfer & -operations Register Transfer

BASIC SYMBOLS FOR REGISTER TRANSFERS

Symbols Description Meaning

Capital letters Denotes a register MAR, R2
and numerals

Parentheses ( ) Denotes a portion of a register R2(0-7), R2(L)

Arrow  Denotes transfer of information R2 R1

Colon : Denotes termination of control function P:

Comma , Separates two micro-operations A  B, B  A

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Register Transfer & -operations Bus and Memory Transfers

BUS AND MEMORY TRANSFER

The Bus is a data path (or a group of wires), over which information is
transferred, from any of several sources to any of several destinations
From a register to the bus: BUS  R

Register A Register B Register C Register D

Bus lines

Register A Register B Register C Register D

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

x y Source Register Selected

B1 C1 D 1 B2 C2 D 2 B3 C3 D 3 B4 C4 D 4
0 0 A
0 0 0 0
4 x1 4 x1 4 x1 4 x1 0 1 B
MUX MUX MUX MUX
1 0 C
Source x 1 1 D
Selection y

4-line bus

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Register Transfer & -operations Bus and Memory Transfers

TRANSFER FROM BUS TO A DESTINATION REGISTER

From bus to a register: R  BUS

Bus lines

Load
Reg. R0 Reg. R1 Reg. R2 Reg. R3

D 0 D1 D2 D 3
Destination z
Selection 2x4 E (enable)
w
Decoder

E w z Destination Register Selected

0 x x None (no register is loaded)
1 0 0 R0
1 0 1 R1
1 1 0 R2
1 1 1 R3

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Register Transfer & -operations Bus and Memory Transfers

THREE-STATE BUS BUFFERS

Three-State Buffer

Normal input A Y
Control input C
If C=1, then Y=A
If C=0, then Y=High-impedance

Bus line with three-state buffers

Bus line for bit 0 E x y Source Register Selected

A0
B0 0 x x None (Bus is disconnected)
C0
1 0 0 A
D0
1 0 1 B
Source x 0
2x4 1 1 1 0 C
Selection y Dec 2
1 1 1 D
Enable E 3

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Register Transfer & -operations Bus and Memory Transfers

MEMORY TRANSFERS

Memory Read
AR
unit Write
Address Register

DR
Data Register

Memory read micro-op: DR  M ( Read: DR  M[AR] )

Memory write micro-op: M  DR ( Write: M[AR]  DR )

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Register Transfer & -operations Bus and Memory Transfers

SUMMARY OF REGISTER TRANSFER MICROOPERATIONS

AB Transfer the contents of register B into register A

AR DR(AD) Transfer the contents of AD portion of register DR into register AR

A constant Transfer a binary constant into register A

ABUS  R1, Transfer the contents of R1 into bus A and, at the same time,
R2 ABUS transfer the contents of bus A into R2

AR Address register

DR Data register

M[R] Memory word specified by register R

M Equivalent to M[AR]

DR  M Memory read operation: transfers the contents of the memory word

specified by AR into DR

M DR Memory write operation: transfers the contents of DR into the memory
word specified by AR

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Register Transfer & -operations Arithmetic Microoperations

TYPES OF MICROOPERATIONS

Four types of microoperations

- Register transfer microoperations
- Arithmetic microoperations
- Logic microoperations
- Shift microoperations

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Register Transfer & -operations Arithmetic Microoperations

ARITHMETIC MICROOPERATIONS

R3  R1 + R2 Contents of R1 plus R2 transferred to R3

R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’ + 1 2's complement the contents of R2 (negate)
R3  R1 + R2’ + 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement

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Register Transfer & -operations Arithmetic Microoperations

BINARY ADDER
B3 A3 B2 A2 B1 A1 B0 A0
Binary Adder
FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0

Binary Adder-Subtractor
B3 A3 B2 A2 B1 A1 B0 A0

FA C3 FA C2 FA C1 FA C0

C4 S3 S2 S1 S0

Binary Incrementer A3 A2 A1 A0 1

x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0

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Register Transfer & -operations Arithmetic Microoperations

ARITHMETIC CIRCUIT
Cin
S1
S0

A0 X0 C0
S1 D0
FA
S0
B0 0 4x1 Y0 C1
1 MUX
2
3
A1 X1 C1
S1 D1
FA
S0
B1 0 4x1 Y1 C2
1 MUX
2
3
A2 X2 C2
S1 D2
FA
S0
B2 0 4x1 Y2 C3
1 MUX
2
3
A3 X3 C3
S1 D3
FA
S0
B3 0 4x1 Y3 C4
1 MUX
2
3 Cout
0 1

S1 S0 Cin Y Output Microoperation

0 0 0 B D=A+B Add
0 0 1 B D=A+B+1 Add with carry
0 1 0 B’ D = A + B’ Subtract with borrow
0 1 1 B’ D = A + B’+ 1 Subtract
1 0 0 0 D=A Transfer A
1 0 1 0 D=A+1 Increment A
1 1 0 -1 D=A-1 Decrement A
1 1 1 1 D=A Transfer A

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Register Transfer & -operations Logic Microoperations

LOGIC MICROOPERATIONS
Specify binary operations on the strings of bits in registers.

- useful for bit manipulations on binary data

- useful for making logical decisions based on the bit value
- Basic logic microoperations:
- AND:  - OR:  - XOR:  - complement

P: R1  R1  R2

1010 Content of R1
1100 Content of R2
0110 Content of R1 after P=1

P + Q: R1 R2 + R3, R4 R5  R6

OR operation OR microoperation
add microoperation
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Register Transfer & -operations Logic Microoperations

LIST OF LOGIC MICROOPERATIONS

x 0011 Boolean Micro-

Name
y 0101 Function Operations
0000 F0 = 0 F0 Clear
0001 F1 = xy FAB AND
0010 F2 = xy' F  A  B’
0011 F3 = x FA Transfer A
0100 F4 = x'y F  A’ B
0101 F5 = y FB Transfer B
0110 F6 = x  y FAB Exclusive-OR
0111 F7 = x + y FAB OR
1000 F8 = (x + y)' F A  B)’ NOR
1001 F9 = (x  y)' F  (A  B)’ Exclusive-NOR
1010 F10 = y' F  B’ Complement B
1011 F11 = x + y' F  A  B’
1100 F12 = x' F  A’ Complement A
1101 F13 = x' + y F  A’ B
1110 F14 = (xy)' F  (A  B)’ NAND
1111 F15 = 1 F  all 1's Set to all 1's

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Register Transfer & -operations Logic Microoperations

HARDWARE IMPLEMENTATION OF LOGIC MICROOPERATIONS

Ai
0
Bi

1
4X1 Fi
MUX
2

3 Select

S1
S0

Function table
S1 S0 Output -operation
0 0 F=AB AND
0 1 F = AB OR
1 0 F=AB XOR
1 1 F = A’ Complement

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Register Transfer & -operations Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

- Selective-set - Selective-complement

1010 A 1010 A
1100 B 1100 B
1110 AA B 0110 AA B

- Selective-clear - Mask

1010 A 1010 A
1100 B 1100 B
0010 AAB 1000 AA B

- Clear (produce 0 if A=B)

1010 A
1010 B
0000 AAB

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Register Transfer & -operations Logic Microoperations

APPLICATIONS OF LOGIC MICROOPERATIONS

- Insert: (Mask then OR)

Example: Register A contains eight bits (0110 1010),

replace the four leftmost bits by 1001.

1. Mask
0110 1010 A before
0000 1111 B (mask)

0000 1010 A after masking (A  A  B)

2. OR
0000 1010 A before
1001 0000 B (insert)

1001 1010 A after insertion (A  A  B)

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Register Transfer & -operations Shift Microoperations

SHIFT MICROOPERATIONS
Shift Right

Serial Rn-1 R3 R2 R1 R0 Serial

Input Output

Shift Left
Rn-1 R3 R2 R1 R0

Shifts
- Logical shift : transfers 0 through the serial input
- Circular shift : circulates the bits of the register around the two ends
- Arithmetic shift : shifts a signed number (shift with sign extension)
Left shift  multiplied by 2
Right shift  divided by 2

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Register Transfer & -operations Shift Microoperations

SHIFT MICROOPERATIONS
Logical Shift Right: R shr R

0 Rn-1 R3 R2 R1 R0

Logical Shift Left: R shl R

Rn-1 R3 R2 R1 R0 0

Circular Shift Right: R cir R

Rn-1 R3 R2 R1 R0

Circular Shift Left: R cil R

Rn-1 R3 R2 R1 R0

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Register Transfer & -operations Shift Microoperations

SHIFT MICROOPERATIONS
Arithmetic Shift Right: R ashr R

Rn-1 R3 R2 R1 R0

Arithmetic Shift Left: R ashl R

Rn-1 R3 R2 R1 R0 0

- Arithmetic shift-left Overflow: V = Rn-1  Rn-2

Shift Microoperations
Symbol Description
R shl R Shift-left register R
R shr R Shift-right register R
R cil R Circular shift-left register R
R cir R Circular right-shift register R
R ashl R Arithmetic shift-left register R
R ashr R Arithmetic shift-right register R

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Register Transfer & -operations Shift Microoperations

HARDWARE IMPLEMENTATION OF SHIFT MICROOPERATIONS

Shifter
0 for shift right (down)
Serial Select 1 for shift left (up)
input (IR)

S
MUX H0
0
1
A0 Select Output
S S H0 H1 H2 H3
A1 H1
0 MUX
1 0 IR A0 A1 A2
A2
1 A1 A2 A3 IL
A3
S
MUX H2
0
1

S
MUX H3
0
1

Serial
input (IL)

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Register Transfer & -operations Arithmetic Logic Shift Unit

ARITHMETIC LOGIC SHIFT UNIT

S3
S2 Ci
S1
S0

Arithmetic D i
Circuit
Select

Ci+1
0 4x1 Fi
1 MUX
2
3
Ei
Logic
Bi Circuit
Ai
Ai-1 shr
Ai+1 shl

S3 S2 S1 S0 Cin Operation Function

0 0 0 0 0 F=A Transfer A
0 0 0 0 1 F=A+1 Increment A
0 0 0 1 0 F=A+B Addition
0 0 0 1 1 F=A+B+1 Add with carry
0 0 1 0 0 F = A + B’ Subtract with borrow
0 0 1 0 1 F = A + B’+ 1 Subtraction
0 0 1 1 0 F=A-1 Decrement A
0 0 1 1 1 F=A TransferA
0 1 0 0 X F=AB AND
0 1 0 1 X F = A B OR
0 1 1 0 X F=AB XOR
0 1 1 1 X F = A’ Complement A
1 0 X X X F = shr A Shift right A into F
1 1 X X X F = shl A Shift left A into F
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