This document outlines the course modules for a VLSI Design course. The course covers MOS transistors, CMOS circuit design including different circuit families and low power techniques. It also covers testing and verification methods like ATPG and design for testability. The course teaches System Verilog HDL and concludes with an introduction to ASIC design flows. The total hours for the course are 45 hours spread across 5 modules.
This document outlines the course modules for a VLSI Design course. The course covers MOS transistors, CMOS circuit design including different circuit families and low power techniques. It also covers testing and verification methods like ATPG and design for testability. The course teaches System Verilog HDL and concludes with an introduction to ASIC design flows. The total hours for the course are 45 hours spread across 5 modules.
This document outlines the course modules for a VLSI Design course. The course covers MOS transistors, CMOS circuit design including different circuit families and low power techniques. It also covers testing and verification methods like ATPG and design for testability. The course teaches System Verilog HDL and concludes with an introduction to ASIC design flows. The total hours for the course are 45 hours spread across 5 modules.
3 0 0 3 After completion of this course, the students will be able to CO1 (Understand) Interpret the basics of MOS transistors K2 CO2 (Understand) Understand the different MOS circuits and power strategies K2 Outcomes CO3 (Understand) Relate the different types of testing in VLSI circuits K2 CO4 (Apply) Apply HDL such as System Verilog for different digital VLSI systems K3 CO5 (Analyze) Analyze the different types of ASIC design K4 MODULE I MOS TRANSISTORS 9 MOS Transistors – CMOS Logic, The inverter, The NAND gate, CMOS Logic gates, The NOR gate, Pass Transistors and Transmission gates – Layout Design Rules – Stick Diagrams – Layout diagrams - Long channel I-V Characteristics – DC Transfer characteristics. MODULE II CMOS CIRCUIT DESIGN 9 Circuit families, Static CMOS, Ratioed circuits, Cacode voltage switch logic, Dynamic Circuits, Pass transistor circuits, Differential circuits, Sense amplifier circuits. Circuit design of latches and flip flops. Power: Static Dissipation, Dynamic Dissipation, Low power design. MODULE III TESTING AND VERIFICATION 9 Introduction – Testers, Test fixtures, Test programs – Manufacturing Test Principles, Fault models, Observability, Controllability, Fault coverage, Automatic Test Pattern Generation, Delay Fault Testing – Design for Testability, Adhoc Testing, Scan design, BIST, IDDQ testing, Design for manufacturability. MODULE IV SYSTEM VERILOG HDL 9 Introduction, Variables – User defined types - Enumerated types - Arrays, Structures and Unions - Procedural Blocks, Tasks and Functions, Procedural Statements. MODULE V ASIC DESIGN 9 Introduction to ASICs – Types of ASICs – Programmable logic devices - Field programmable gate arrays – ASIC Design flow. Total: 45 Hours TEXTBOOKS 1. Neil H.E. Weste, “David Money Harris ―CMOS VLSI Design: A Circuits and Systems Perspective”, 4th Edition, Pearson, 2017 2. M.J. Sebestian Smith, “Application Specific Integrated Circuits”, Addison Wesley, 1997 REFERENCES 1. Jan M Rabaey, Anantha Chandrakasan, B.Nikolic, “Digital Integrated Circuits: A Design Perspective”, Second Edition, Prentice Hall of India, 2003 2. Douglas A.Pucknell, Kamran Eshraghian, “BASIC VLSI Design”, Third Edition, Prentice Hall of India, 2011 3. Palnitkar Samir, “Verilog HDL: Guide to Digital Design and synthesis”, 3rd Edition, Pearson Education, New Delhi, 2007 4. P.K.Lala, “Digital Circuit Testing and Testability”, Academic Press, 1997 5. Stuart Sutherland, Simon Davidmann, Peter Flake, “System Verilog For Design”, Second Edition, Springer, 2006