National Computing Education Accreditation Council

NCEAC

NCEAC.FORM.001-D
COURSE OUTLINE

INSTITUTION Bahria University Lahore Campus

PROGRAM (S) TO BE EVALUATED BS Computer Science

Course Description:
Course Code CEN-323
Course Title Computer Organization and Assembly Language (Theory)
Credit Hours 4 (3+1)
Prerequisites by
Course(s) and Programming Fundamentals
Topics
Assessment Assignments + Quizzes + Class Participation + Project 30 %
Instruments with Midterm 20 %
Weights Final Term 50 %
(homework,
quizzes,
midterms, final,
programming
assignments, etc.)
Resource Person Munaza Sher
Contacts (Email) Munaza.sher@bahria.edu.pk
Office (Third Floor)
Counselling Hrs. TBA
Course
Ms. Munaza Sher
Moderator
URL (if any) cms.bahria.edu.pk
Current Catalog Introduction of Computer Organization, Data Representation; Integer
Description Arithmetic; Two’s Complement (Multiplication and division); Machine
Instruction Characteristics; Type of Operands; Pentium And Power PC Data
Types; Objectives and Perspectives of Assembly Language, Microprocessor
Bus Structure: Address, Data and Control, Memory Organization and Structure,
Addressing Modes, Introduction to Assembler; Introduction to Registers and
Flags; Data Movement, Arithmetic and Logic, Programme Control,
Subroutines, Stack and its Operation, Peripheral Control; Interrupts, VGA
Display Mode Programming. Processor architecture: the Y86 instruction set
architecture, logic design and the Hardware Control Language (HCL),
sequential Y86 implementations, general principles of pipelining, pipelined
Y86 implementations.
Teaching Lectures, Assignments, labs, Projects, Presentations, etc. The major
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Methodology components of the course should be covered using conventional lectures.
Course Goals To train students to solve complex problems using structured programming
Textbook  Assembly Language Programming and Organization of the IBM PC
Yatha Yu, Charles Marut

Reference  IBM PC Assembly Language and Programming By Peter Abel

Material  Computer System Architecture, M. Morris Mano, Latest Edition,
 Assembly Language Programming for Intel- Computer, Latest Edition

Course Learning Outcomes (CLOs):

Measurable CLOs Description Domain & BT

Learning Level
Outcomes CLO 1 CLO1: Cognitive, 2 (C2)
Identify the major components of computer architecture,
and explain their purposes and interactions
CLO 2 CLO2: Cognitive, 3 (C3)
Simulate the internal representation of data, and show
how data is stored and accessed in, I/O modules, and the
interconnecting components of the computer systems

CLO 3 CLO3: Cognitive, 4 (C4)

Analyze the relationships between hardware architecture
and its instruction set.

* BT= Bloom’s Taxonomy, C=Cognitive domain, P=Psychomotor domain, A= Affective domain

Mapping of CLOs to Program Learning Outcomes (PLOs):

CLOs/PLOs
CLO 1 CLO 2 CLO 3 CLO 4 CLO 5
PLO 1: Academic Education 
PLO 2: Knowledge for Solving 
Computing Problems
PLO 3: Problem Analysis 

PLO 4: Design and Development of

Solutions
PLO 5: Modern Tool Usage
PLO 6: Individual and Teamwork  

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PLO 7: Communication

PLO 8: Computing Professionalism

and Society
PLO 9: Ethics
PLO 10: Life Long Learning

Laboratory Assignments and Project

Projects/Experiments Done
in the Course
Programming Assignments 3-4
Done in the Course
Class Time Spent on (in 3 hours per week
credit hours)
Oral and Written Viva for selected assignments, Report writing for Project
Communications

*-Tentative Week-by-week lecture plan with course topics

HWs,
Topics Chap Quizzes, Corresponding
Week
Covered No Exams. CLOs (#)
Project
1.  Basic Concepts and Computer Evolution CLO1
2.  Data Representation CLO1
 Decimal, Hexadecimal, Binary Number System
 Conversion between Number System
 1’s Complement & 2’s Complement
 Integer Representation (Signed & Unsigned Integers)
 Character Representation
3.  Basics of Assembly Language Assig CLO1
 A Few Basic Instructions nment
#01,
 MOV, XCHG, ADD, SUB, INC, DEC, NEG
HW-1,
 Translation of High Level Language to Low Level Quiz 1
Language
4.  Processor Structure CLO3
 Processor Organization
 Register Organization
 Memory Organization & Structure
 Types of Memory
 Memory Addressing (Segment/offset Schemes)
 Instruction Sets
 Machine Instruction Characteristics
 Type of Operations
 Instruction Formats
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 Interconnection Structures
 Bus Interconnection
 Interrupts
 Interrupt-Driven I/O
 Instruction Cycle with Interrupts
5.  Processor Status and FLAGS Register CLO1
 The FLAG Register
 Overflow
 How instructions effect Flags
 Flow Control Instructions
 Conditional Jump
 Unconditional Jump
6.  High Level Language Structures CLO1
 Branching Structures
 Looping Structures
 Logic Instructions
 AND, OR, XOR, NOT, TEST
 Shift Instructions & its application
 SHL, SHR, SAL, SAR
 Rotate Instructions & its application
 ROL, ROR, RCR, RCL
7.  Binary input and output CLO1
 The Stack
 Stack instructions like PUSH, POP, PUSHF, POPF etc.
 Applications
 Procedures
8.  Multiplication and Division Instructions Assig CLO1
 MUL and IMUL nment
 DIV and IDIV #02
9.  Arrays and Addressing Modes CLO2
 1D & 2D Arrays HW-2,
 Addressing Modes Quiz 2
 Applications
CLO1,
Midterm exam
CLO2
10.  Macros CLO2
11.  String Instructions CLO2
12.  Recursion (Passing parameters on stack) HW-3, CLO3
Quiz 3
13.  Cache Memory Assig CLO3
 Internal Memory nment
#03
14.  Instruction-Level Parallelism and Superscalar HW-4, CLO4
processors Quiz 4
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15.  Parallel Processing and Multicore Computers CLO2
16. CLO1. CLO2,
 Project/Revision
CLO3, CLO4
17-18 CLO2, CLO3,
 Final Exam CLO3

*-Tentative Mapping of CLOs to Direct Assessments (A= Assignment)

CLO Quiz-1 Quiz-2 Quiz-3 Quiz-4 A-1 A-2 A-3 A-4 Project Midterm Final

1    
2      
3    
4    

Instructor Name: M. Haseeb Aslam

Instructor Signature ____________________________

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