Module-1

Demultiplexing of the Buses:

All computer systems have three buses: (1) an address bus that provides the memory and I/O
with the memory address or the I/O port number, (2) a data bus that transfers data between the
microprocessor and the memory and I/O in the system, and (3) a control bus that provides
control signals to the memory and I/O. These buses must be present in order to interface to
memory and I/O.
Demultiplexing of AD0-AD7 using IC 74LS373
The dual-purpose of the AD0-AD7 pins is achieved through multiplexing. In simple words,
multiplexing allows us to use the pins of a microprocessor for more than one function.
But for extracting the data and the lower 8 bits of the address, we demultiplex AD0-AD7 using
IC 74LS373. Let me explain it through an example.
First, let us get to know the working of IC 74LS373.
Circuit setup for the demultiplexing of AD0-AD7 using IC 74LS373
Let us go through the process step by step. Let us assume that instruction MOV C, A is to be
executed. For executing the instruction, the microprocessor first has to read the opcode (hex
code for the instruction) stored at 2005H. The hex code here is 4FH. You can ignore things and
just look at it as “microprocessor reading data at a memory location having the address 2005H.”
Step1
The whole process consists of 4 T states or 4 clock cycles (refer to the timing diagram above). In
the first clock cycle, the higher 8 bits of the address (20H) are loaded in A8-A15. At the same
time, the lower 8 bits of the address (05H) are issued at pins AD0-AD7. Also, the ALE signal
issued by the microprocessor is high, telling that AD0-AD7 contains the lower 8 bits of the
address. (i.e., the pins are currently functioning as address pins.)
Notice that in the circuit diagram, the ALE signal is connected to the LE (latch enable) pin of the
IC. This ensures that the address received at the input of the 74LS373 IC (05H) is reflected at its
output (i.e., the output of the 74LS373 IC is 05H).
Step2
Near the end of the first clock cycle, the ALE signal goes low. Whatever bits were there on
AD0-AD7 (in this case, 05H) at that instant are latched (frozen) in the IC. That means, those bits
are present at the output of the IC and are not affected by the values on AD0-AD7 anymore.
You see, the entire reason behind this exercise is to help the pins (AD0-AD7) carry two different
types of values on the same path. We do this by carrying one of the values first (the address),
handing it over to the IC with the latches (memory units) to hold on to, and then getting the other
set of values.
Step3
Now, all the 16 bits of the address are available. Higher 16 bits at A8-A15 and lower 8 bits at the
outputs of the IC. This means that AD0-AD7 is free now. It can now be used as the data bus.
Now, during the second and third clock cycles, 8-bit data to be fetched (4FH) is loaded on AD0-
AD7 from memory and is retrieved by the microprocessor. Note that in this step, AD0-AD7 is
being used as the data bus.
This is how the demultiplexing of AD0-AD7 works.

Address/data buffers in 8085 Microprocessor:

Address and data buffers are used for bidirectional data transfer. They perform the
unidirectional data transfer when they send out the Least Significant Byte of the address. These
buffers are only used for increasing the driving capacity of the current. Through the internal bus
data goes to the buffers. The Least Significant Byte of the address goes to the buffers from the
internal address latch to the other.
Hence the address or data are sent out on the address ranging from AD7 to AD0 can drive every
external chips, like chips of RAM, chips of EPROM, and other peripheral chips meant for
carrying the work. Likewise, all the data received by the 8085 microprocessor from the outside
is also buffered internally. The data on the range of address ranging from AD7 to AD0 also
reaches to the internal bus, from where the final destination is reached.
In fact, also in a practical microcomputer system, the driving capacity for the data pins, after the
internal buffering procedure, might not be satisfactory. So there will always be external buffer
chips to carry out the entire work.
Address buffers: These buffers are meant for unidirectional transfer of schematic addresses
which are only used for sending out the Most Significant Byte of the given address. The Most
Significant Byte of the address goes to the buffers from the address latch internally. Hence the
address sent out to the range of address ranging from AD15 to AD7 drives all the external chips,
like chips of RAM, chips of EPROM, and other peripheral chips.
Obviously in a practical microcomputer system, the driving capacity of the address pins, after
the internal buffering, might not be satisfactory. So there must be external buffer chips to carry
out the work.