OBAKENG GIFT KGAMPHE

STUDENT NO.: 202442463

RESEARCH ASSIGNMENT I 40 MARKS

QUESTION 1

a. IF N=2
SUM(Y) = N(N+1)/2
SUM(Y) = 2(2+1)/2
SUM(Y) = 3

b. 10(10 00000101 1)0001010

1.2 a. 0001 00000000010
1.2 b. 2 trips

1.3 The process of reading a value from memory in the IAS computer involves a
sequence of steps:

1. The memory address of the desired value is loaded into the Memory
Address Register (MAR).
2. A control signal is sent to memory indicating a read operation.
3. The memory unit accesses the data location specified by the MAR and
retrieves the value.
4. The retrieved data is transferred from memory to the Memory Buffer
Register (MBR) of the CPU.
5. Depending on the instruction, the data in the MBR may be transferred
to other internal registers for further processing.

 AND The process of writing a value to memory in the IAS computer involves
these steps:
1. The memory address of the destination location is loaded into the
Memory Address Register (MAR).
2. The value to be written is transferred to the Memory Buffer Register
(MBR) of the CPU.
3. A control signal is sent to memory indicating a write operation.
4. The memory unit uses the address from the MAR to locate the target
memory location.
5. The data from the MBR is written to the memory location specified by
the MAR.

1.4
 Memory Content Assembly Explanation
Address Instruction
08A 010FA210FB LOAD This instruction performs a load operation,
M(0FA) specifically retrieving the data value from memory
location 0FA and placing it in the accumulator
register. The accumulator is a designated register
within the CPU for holding data during calculations.
08B 010FA0F08D STOR This instruction performs a store operation, taking
M(0FB) the value currently residing in the accumulator
register and writing it to memory location 0FB. The
accumulator is a designated register within the CPU
for holding data during calculations.
08C 020FA210FB LOAD This instruction repeats the previous operation of
M(0FA) loading the value from memory location 0FA. The
retrieved data is placed in the accumulator register,
potentially overwriting the value that was previously
stored there.

1.5 data paths to/from MBR : 40 bit

data paths to/from MAR : 12 bits

ALL PATHS to/from AC: 40 bits

ALL PATHS to/from MQ: 40 bits

1.6 The IBM 360 Models 65 and 75 use a clever trick to access memory faster.
They split memory into two separate units, with instructions typically stored in even-
numbered addresses and data in odd-numbered addresses. This separation offers
several advantages:

 Faster access: By keeping instructions and data separate, the CPU can
potentially access them at the same time from different memory units. This
reduces waiting time for data, especially when the CPU needs an instruction
and its corresponding data.
 Smoother workflow: Having two memory units allows for reading instructions
from one unit while simultaneously reading or writing data from the other. This
improves overall memory efficiency.
 Double the data highway: Staggering memory effectively creates two data
channels, potentially doubling the bandwidth compared to a single memory
unit. This translates to faster data transfer between the CPU and memory.
 Potentially lower cost: In some cases, using two smaller memory units
might be cheaper than a single, larger unit, especially if memory needs aren't
massive.

This technique helps the IBM 360 Models 65 and 75 achieve significant performance
improvements.
1.7 The IBM 360 Model 75 boasts a whopping 50 times the performance of the
Model 30, even though its clock speed is only 5 times faster. So, what gives? The
answer lies beyond just raw processing speed. Here are some key factors:

 Smarter instructions: The Model 75 likely has a more advanced instruction

set. This means it can pack more complex tasks into single instructions, unlike
the Model 30 which might need several instructions for the same job. This
reduces the number of processing cycles needed by the Model 75.
 Doing more at once: The Model 75 might be able to handle multiple
instructions or memory accesses simultaneously, a feature called parallel
processing. This is a big advantage over the Model 30, which likely processes
things one after another.
 Faster memory access: The Model 75 might have a larger or better cache, a
special area that stores frequently used data close at hand. This reduces the
need to constantly access slower main memory, leading to a performance
boost. Wider memory channels or memory interleaving techniques could also
be at play, allowing for faster data transfer between the CPU and memory.
 Efficient I/O: The Model 75 might have a more efficient system for handling
input and output (data transfer with external devices). This can be a hidden
bottleneck, so improvements here can significantly impact how fast the
computer feels overall.

In short, the Model 75's impressive performance isn't just about clock speed. It likely
benefits from a combination of architectural advancements, parallel processing
capabilities, a smarter cache, faster memory access, and a more efficient I/O
system, all working together to outperform the Model 30 by a significant margin.

QUESTION 2

2.1.1 CENTRAL PROCESS UNIT.

Figure 1 illustrates a central processing unit (CPU), the computer's core. The CPU
carries out program instructions and processes data. It retrieves instructions from
memory, interprets them, and executes them with the help of its arithmetic logic unit
(ALU) and control unit. The ALU handles mathematical and logical operations, while
the control unit directs the flow of data and instructions within the CPU.

These are the key parts of the CPU in the picture.:

The control unit: The control unit functions as the CPU's conductor. It retrieves instructions
from memory, interprets them, and then generates signals to manage the tasks of all the
other CPU components.
Arithmetic logic unit (ALU): The ALU acts as the CPU's math whiz and decision maker. It
performs calculations like addition, subtraction, multiplication, and division, and also handles
logical operations like AND, OR, and NOT.

Memory address register (MAR): The MAR functions as the CPU's address book, keeping
track of the memory location for the data or instruction the CPU is about to use

Memory buffer register (MBR): he MBR acts as a staging area within the CPU. It holds the
data or instruction being retrieved from memory or prepared to be written back.

Program counter (PC): The program counter acts as the CPU's internal roadmap,
remembering the memory address of the instruction that will be executed next.

ACCUMULATOR (AC): The accumulator acts as the CPU's temporary storage unit, keeping
the data that the ALU is actively processing.

CPUs are the hidden power behind countless industries:

Central processing units (CPUs) are the unsung heroes of the modern world. These
tiny chips act as the brains of computers, silently orchestrating complex tasks in
various industries. Let's delve deeper into how CPUs drive progress in some key
sectors:

 Manufacturing: Imagine factory floors buzzing with activity, not with human
labour, but with robots and automated machines. CPUs are the secret sauce
within these marvels. They control robotic arms with pinpoint precision,
ensuring flawless assembly lines and efficient production processes. From car
manufacturing robots welding intricate frames to 3D printing machines
meticulously building prototypes, CPUs are the invisible conductors of the
modern manufacturing symphony.
 Healthcare: Beyond the doctor's stethoscope, CPUs play a crucial role in
healthcare. They power medical imaging machines like MRI scanners and CT
scan machines, generating detailed pictures of the human body for accurate
diagnoses. In patient monitoring systems, CPUs constantly analyze vital
signs, alerting medical personnel to potential complications. Even in drug
discovery, CPUs crunch massive datasets to identify potential cures and
accelerate medical research.
 Education: Gone are the days of dusty textbooks and blackboards. Today,
CPUs are transforming the learning landscape. They power computers used
for online courses, where students access interactive learning materials and
engage in virtual classrooms. CPUs also fuel educational software and
simulations, allowing students to experience complex scientific phenomena or
historical events in an immersive way. From language learning apps to
anatomy simulations, CPUs are fostering a more engaging and interactive
learning experience.
 Financial: The world of finance thrives on speed and accuracy. CPUs are at
the heart of stock trading systems, executing trades at lightning speed based
on complex algorithms. They also power risk management systems, analyzing
vast amounts of financial data to identify and mitigate potential risks for
investors and financial institutions. Whether it's facilitating high-frequency
 trading or ensuring the stability of global financial markets, CPUs are the
silent guardians of financial well-being.

This is just a glimpse into the diverse ways CPUs underpin various industries. In
essence, any industry that relies on computers – and that's practically every industry
today – depends on these powerful processors to function efficiently and stay
competitive.

2.1.2 Central processing units (CPUs) are the engines driving innovation in education
technology. They fuel a variety of tools that enhance the learning experience:

Learning Management Systems (LMS)

 Imagine a bustling online learning environment where students access

courses, submit assignments, and take exams. This is the world of Learning
Management Systems (LMS). Behind the scenes, powerful CPUs manage
this ecosystem. They handle user data (student enrollment, grades), process
submitted assignments, and deliver course content efficiently. A well-
equipped CPU ensures smooth operation of the LMS platform, minimizing lag
and frustration for students and instructors alike.

 Simulation Software: Complex simulations are no longer confined to

research labs. In disciplines like engineering, medicine, and biology, students
can now use specialized software to experience realistic scenarios. These
programs rely heavily on CPUs to perform intricate calculations. For instance,
a CPU might simulate the stress distribution on a virtual bridge in an
engineering program or render a realistic 3D model of a human cell in a
biology simulation. These powerful calculations allow students to interact with
complex concepts in a safe and engaging way.

 Data Analysis: The brains behind complex data analysis, CPUs power the software
used by researchers across social sciences, physics, and economics. These
processors tackle the heavy lifting, performing intricate calculations, statistical
analysis, and even generating visual representations of the data for clearer
understanding.

Patterson, D. A., & Hennessy, J. L. (2013). Computer Organization and Design:

The Hardware/Software Interface (5th ed.). Morgan Kaufmann Publishers
2.1.3 The CPU acts as the brain of your laptop, fetching instructions from memory like a to-
do list. It then decodes these instructions and uses the ALU unit to perform calculations and
make decisions based on data. The results are stored temporarily, and the CPU keeps track
of its progress to ensure smooth program execution. It also works with other components
like the graphics card to display the final output on your screen.

QUESTION 3

2.1
Total Cycles= (45000*1) +(32000*2) +(15000*2) +(8000*2)
=155000 cycles
Effective CPI=Total cycles/ total instructions
= 155000/ 100000
Effective CPI = 1.55 cycles/instruction
Clock Rate / Effective CPI * 1,000,000 = (40,000,000) / (1.55) * 1,000,000
MIPS Rate =25.80 MIPS
Total Cycles / Clock Rate = 155,000 / (40,000,000)
Execution Time = 0.003875 seconds
2.2.a machine A
Effective CPI = 40000000/18000000
=2.22 cycles/instruction
MIPS Rate=200000000/2.22*1000000
=90.09 MIPS
Execution Time=40000000/200000000
=0.2 seconds

Machine b
Effective CPI = 46000000/ 24000000
=1.92 cycles/instruction
MIPS Rate= 200000000/ 1.92*1000000
=104.16 MIPS
Execution Time = 46000000/ 200000000
= 0.23 seconds
b. EFFECTIVE CPI: I would say that based on the results after the calculations
machine A takes more clock cycles (2.22) on average to execute an instruction
compared to machine B(1.9).
MIPS RATE: Machine A’s MIPS rate (90.09) is lower than machine B’s (104.16) which
shows that it can execute millions of instructions per second faster.
EXECUTION TIME: Machine A finishes execution in 0.2 seconds, while machine B
takes 0.23 seconds.

2.3 a 13X= Total cycles/30000000

Total cycles=390000000X
EFFECTIVE CPI=20.53X

b. CPI= 13

2.4 MIPS VALUES

COMPUTER COMPUTER COMPUTER

A B C
PROGRAM 100 10 5
1
PROGRAM 0.1 1 5
2
PROGRAM 0.2 0.1 2
3
PROGRAM 1 0.125 1
4

COMPUTER A COMPUTER B COMPUTER C

ARITHMETIC MEAN 25.26 2.81 3.25
HARMONIC MEAN 0.25 0.21 2.11

2.5 a

Processor
Benchmark R M Z
E 1 1.71 0.72
F 1 1.19 1.19
 H 1 2.32 2.05
I 1 0.09 0.167
K 1 0.48 0.48

b.

BENCHMARK PROCESSOR
R M Z
E 0.58 1 0.72
F 0.84 1 0.84
H 0.44 1 0.58
I 439.11 1 733.33
K 2.05 1 2.07

c. When we normalize machine R machine M is the slowest.

When we normalise machine M machine R is the slowest.

d. geometric mean
R= 0.18
M= 0.21
Z= 0.21
ACCORDIN TO THE CALCULATIONS MACHINE R IS THE SLOWEST
QUESTION 4

2.1.1 Program Flow of Control: With and Without

Interrupts
The way a program decides which instruction to execute next is its flow of control.
This breakdown explains how programs handle this sequence, both in a normal,
step-by-step manner and when unexpected events (interrupts) occur and need to be
addressed.

Program Flow Without Interrupts

 Sequential Execution: Instructions are executed one after another in the

order they appear in the program code.
 No Pre-emption: The program continues running until it finishes or
encounters an error. No other program or process can take control of the
processor during this time.
 Example: Imagine a program that reads data from a file, performs
calculations, and writes the results to another file. Without interrupts, the
program would read the entire file, perform all computations, and then write
everything to the output file, only moving on to the next step after the previous
one completes.

2. Program Flow with Interrupts

 Interruptions: Hardware or software events can interrupt the normal flow of

the program execution. These events are called interrupts.
 Interrupt Service Routine (ISR): When an interrupt occurs, the processor
suspends the execution of the current program and jumps to a specific piece
of code called the Interrupt Service Routine (ISR). The ISR handles the
interrupt and then returns control back to the main program.
 Benefits of Interrupts:
o Real-time Processing: Interrupts allow the processor to respond to
external events in real-time. For example, a keyboard interrupt can
signal a key press, allowing the program to handle user input
immediately.
o Efficient Resource Management: Interrupts are used for tasks like
handling I/O operations (reading/writing data) without the program
needing to wait for the operation to complete. This allows the processor
to perform other tasks while the I/O operation is ongoing.
 o Error Handling: Interrupts can be triggered for errors (e.g., division by
zero), allowing the program to handle them appropriately and
potentially prevent crashes.

Applications in Industry

Interrupts are used extensively in various industries to:

 Operating Systems: Manage multiple programs and processes concurrently.

 Real-time Systems: Respond to external events in a timely manner (e.g., in
control systems, medical devices).
 Device Drivers: Interact with hardware devices efficiently by handling I/O
operations asynchronously.
 Networking: Process network packets efficiently and handle network events
like data arrival.

2.1.2The Traditional Lecture

Imagine a classic lecture hall setting. The professor delivers information point-by-
point, like how a program executes instructions sequentially. This ensures everyone
follows the same learning path and builds a strong foundation. However, it can be
inflexible and doesn't allow for real-time interaction. Students can't ask questions or
discuss until the professor reaches a designated point.

Interactive Seminars: Learning with Interruptions

Now, consider a seminar where students actively participate. This environment

mirrors program flow with interrupts.

 Planned Breaks: The professor incorporates "interruptions" for questions and

discussions, just like planned interrupts in programs. These breaks allow
students to clarify doubts and engage with the material directly.
 Unexpected Events: Like unforeseen events triggering interrupts in
programs, unexpected things can happen in seminars too. Imagine a fire
alarm leading to a temporary suspension of the lecture, just like a hardware
interrupt halting a program.

Benefits of Interruptions in Education

 Deeper Learning: Real-time interaction and clarification through questions

and discussions can lead to a better understanding for students.
 Improved Efficiency: Addressing questions as they arise prevents confusion
and the need to backtrack later.
  Adaptability: Instructors can adjust the flow based on student needs, like
programs responding to external events efficiently.

Challenges and Considerations

 Disrupted Flow: Frequent unplanned interruptions can break the overall

lecture structure and learning flow.
 Time Management: Balancing planned and unplanned interruptions with
delivering the main content effectively requires good time management skills
from instructors.
 Learning Style Variety: Not all students learn best in interactive
environments. Some might prefer the traditional sequential approach.

Teaching Strategies for Effective Learning

Professors can leverage various strategies to utilize program flow concepts:

 Structured Discussions: Dedicate specific times for questions to maintain a

balance between planned interruptions and structured learning.
 Online Forums: Encourage students to post questions online before or after
lectures for asynchronous discussions.
 Interactive Activities: Incorporate activities that encourage collaboration and
real-time problem-solving, similar to how interrupts allow programs to handle
events efficiently.

By understanding program flow of control with and without interrupts, educators can
design more engaging and effective learning experiences that cater to diverse
student needs and foster a more interactive learning environment.

2.1.3 Without interrupts, a laptop would tackle tasks one at a time. Imagine loading a
web page – the processor would meticulously go through each line of code
sequentially. While this ensures everything is done in order, it's inefficient. The
processor would be idle while waiting for the page to load, unable to play music
simultaneously.

Luckily, real-world computers use interrupts. When loading a web page, the browser
can trigger an interrupt, allowing the processor to temporarily switch to another task,
like playing music. Once a chunk of music is processed, the processor returns to the
web page and continues loading. This constant switching, thanks to interrupts,
creates the illusion of smooth multitasking and real-time responsiveness, allowing
you to browse and listen to music without delays.

REFERENCES:
CPU:
AMAZONhttps://www.amazon.com/Computer-Organization-Design-Interface-Architecture/
dp/0123747503

PROGRAM FLOW OF CONTROL WITHOUT AND WITH INTERUPTS:

Wikipedia: https://en.wikipedia.org/wiki/Interrupt

PROGRAM FLOW OF CONTROL WITHOUT AND WITH INTERUPTS IN

RELATION TO HIGHER EDUCATION INSTITUTION:

Abraham Silberschatz, Peter Baer Galvin, and Greg Gagne. Operating System
Concepts. Wiley, 10th edition, 2018. (Chapter
2) (https://www.wiley.com/en-us/Operating+System+Concepts%2C+10th+Edition-p-
9781119320913

Wikipedia article on Interrupt: https://simple.wikipedia.org/wiki/Interrupt