Manual in

Electronics 1
 EXPERIMENT NO.1
JUNCTION DIODE CHARACTERISTICS

I. OBJECTIVE:

To test a junction diode and measure the effects when it is on forward or reverse bias
condition.

II. DISCUSSION:

The standard symbol for a semiconductor diode is an arrow and bar showing the direction
of current. The arrow is the P-side and the bar is the N-side. The arrow and bar are generally
marked on the diode. To determine the state of the diode, simply think of it initially as a resistor,
and find the polarity of the voltage across it and the direction of conventional current through it.
If the voltage across it has forward-bias polarity and the current has a direction has matches the
arrow in the symbol, the diode is conducting.

For the most applications, simply the threshold voltage in the forward-bias region and an
open-circuit for applied voltages can define the characteristics of a diode less than the threshold
value.

III. MATERIALS:

1- Variable power supply

1- Digital Tester
1- 2Watt, 200 ohms resistor
1- 1N4001 silicon diode
IV. PROCEDURE:
R
A

V
R

Fig. 1.1 Measuring the effect of forward bias on current flow in diode

1. Construct the circuit shown. Set the supply letting the voltage V to be. Volt. Increase the
voltage from 0.1 Volt steps to maximum of 0.8 Volts. Measure and record the current, if
any, in Table 1.2. Also compute for the forward resistance of the diode.
2. Reverse the diode. Like on forward biased circuit, measure the current and record, if any
with the power supply varying in steps from 0 to 40 Volts. Again for each conditions,
compute for the reverse resistance of the diode.

FORWARD REVERSE
vAK I, mA R, Ω vAK I, mA R, Ω
0 0
0.1 5
0.2 10
0.3 15
0.4 20
0.5 25
0.6 30
0.7 35
0.8 40
Table 1.2
 3. Remove the diode from the circuit. Measure the forward and reverse resistance of this
diode. Record the result in Table 1.3. Compute the resistance ratio, r, of his diode.

Diode R (forward), Ω R (reverse), Ω R

Table 1.3

V. QUESTIONS:

1. Plot a graph of V versus I for both bias conditions of Table 1.2

2. Under what condition will a junction diode turn on? Refer to your
measurement in Table 1.2
3. Explain how (a) forward-bias, (b) reverse-bias conditions may be established.
Referring to your experiment, explain also how the resulting current is
affected.
4. What portion, at the volt-ampere characteristics curve of the forward-bias
diode is linear.
5. What is the effect of the DC resistance of the diode over this linear portion?
6. Compare the characteristics of silicon and a germanium diode and determine
which is preferred to use for practical application.
7. What is the significance, if any, of the resistance ration of a diode?
 EXPERIMENT NO. 2

HALF-WAVE AND FULL-WAVE RECTIFICATION

I. OBJECTIVE:

To construct half-wave and full-wave rectifier circuits, measure and record their output
waveforms.

II. DISCUSSION:

When employed in the rectification process, a diode is typically referred to as a rectifier.

Its power and current ratings are typically much higher than those of diodes employed in other
applications such as computers and communication system.

Rectification is a process whereby an applied waveform of zero average value is changes

to one that has DC level. The DC level obtained from a sinusoidal input can be improved 100%
using a process called Full-wave Rectification. Full wave rectification converts both polarities of
the input waveform to DC and is more efficient. The other DC output requires exactly the same;
resulting in four individual junctions. Four rectifiers arranged this way are called are called
bridge rectifier. A full wave rectifier converts the whole of the input waveform to one of constant
polarity at is output by reversing the negative portions of the alternating current waveform.

In Half-Wave Rectification, either the positive or negative half of the AC wave is passed
easily, the other half is blocked. Half-wave rectification eliminates on behalf of the wave, and so
is very inefficient to reach the output. This may be the positive or the negative half depending on
the sense in which the diode is connected. This can be achieved by a single diode in a one phase
supply.
III. MATERIALS:

1- Oscilloscope
1- ½ Wat, 550Ω resistor
2- 1N4001 diode
1- Center tapped transformer

IV. PROCEDURE:

1. Connect the circuit of Fig. 2.1

A S1 D1
D2
D
220 V C D2
R1
B S2 D2
A

Fig. 2.1 Transformer-fed full wave experimental voltage rectifier

2. Connect the input lead of the oscilloscope to the anode of D1. The lead to point C. Turn
on the power. Close switch S1 only. Calibrate the vertical amplifier of the oscilloscope
for the voltage measurement.

3. Adjust the volt/div., time/div controls for proper viewing of the reference waveform.
Marked on the peaks of the waveform Vac as reference for phase measurement.

To waveform viewed should be identical with the reference waveform. Measure the
peak-to-peak voltage of Vac. Record it in Table 2.1. Also, measure the DC voltage, if any
across point AC. Record.

4. Connect the input lead of the oscilloscope to anode of D2. Close switch S2 letting switch
s1 to be open. Draw Vbc measure peak-to-peak voltage. Record.
5. Open S3. Now, connect the lead of oscilloscope to point D. Close S2. Draw V out and
measure the peak-to-peak voltage and DC voltage across RL. Record the result.

6. Repeat procedure 5 in vice-versa.

7. Then finally, close S2, all switches are closed. Draw the Vout and measure the peak-to-
peak voltage and DC voltage across RL. Record the result.

WAVEFORM

Vm (A to C)

Vm (B to C)

Vout (D1)

Vout (D2)

Vout (Full wave)

Table 2.1

D1 D2

230V AC 12V AC
primary secondary
 Fig B

Procedure

Construct the circuit as shown in fig B. using the oscilloscope, measure the Vpeak, Vout and
draw the output waveform in table 2.2

Vab(ac)

Vpeak(ab)av = _______

Vdc(RL)

Vpeak(out)dc = _______
Vave. = _________

V. QUESTIONS:
1. What is the difference of (a) half-wave rectifier, (b) full-wave rectifier, an describe its
nature and operation?
2. What conclusion can you give with the relationship of the input frequency to output
frequency?
3. At what frequencies will the output waveform be half-wave rectified? A full-wave
rectified?
 EXPERIMENT NO.3

ZENER DIODE CHARACTERISICS

I. OBJECTIVE:

To measure and graph the volt-ampere characteristics of a Zener diode at forward and
reverse biased condition.

II. DISCUSSION:

The location of the Zener region can be controlled by varying the doping levels. An
increase in doping, producing an increase in the number of added impurities, will decrease the
Zener potential. Zener diodes are available having Zener potential of 1.8 to 200V with power
rating from ¼ to 50 W.

The complete equivalent circuit of the Zener diode in the Zener region includes a small
dynamic resistance and dc battery equal to the Zener potential. A larger drawing of the Zener
region is provided in fig.3 to permit a description of the Zener nameplate data. The term nominal
associated with Vz indicates that it is a typical average value. Since this is a 20% diode, the Zener
potential can be expected to vary as 10V +-20% or from 8 to 12V in its range of application.
The test current defined by the 1/4 power level, and ZZT is the dynamic impedance at this current
level. The maximum knee impedance occurs at a particular level, and I ZM is the maximum current
for the 20% unit.
Iz

Vz Vr
Vz
10μA=Is
0.25mA=IZX

IZT=12.5mA

IZM=32mA

Fig.3 Zener test characteristics

III. MATERIALS:

1- Variable DC source
1- Digital tester
1- 550Ω resistor, 4.7kΩ
1- Zener diode 10V, 1W

IV. PROCEDURE

1. Connect the circuit of Fig 3.1. Set VAA AT O Volt; ampere, A at 20,000 Ω/V.
Measure the diode current, I, if any. Record the result in Table 3.1.
R

VAA 10V, 1W Vab

Fig. 3.1 Experimental circuit for observing effect for reverse bias on a Zener diode

VAB, V I, mA RZ VAB, V I, mA RZ
0
2.0
6.0
7.0
8.0
10
Table 3.1 Reverse Bias

2. Set VAA so that VAB measures 2.0 Volts. Measure and record the diode current I in
Table 3.1. Repeat the procedure for each value of V AB and change the range of
ammeter A as required. solve also the resistance RZ using ohms law.
 3. Set VAA so that diode current I measures 5mA. Measure voltage VAB and record on the
same table. Repeat the procedure for each value of current shown and record the
corresponding values of VAB and RZ.

Volt-ampere Characteristics – Forward Bias

4. Reverse the diode in the circuit. Reconnect the supplies being used. Measure and
record the forward current at each level of voltage VAB shown in the table. Compute
the forward resistance Rf and record in Table 3.2.

VAB, V 0 0.1 0.2 0.3 0.4 0.5 0.55 0.6 0.65 0.7
I. mA
Rf
Table 3.2 Forward Bias

5. From the data in Table 3.1 and 3.2, draw a graph of the following:
a. Diode current vs. Diode voltage
b. Diode current vs. Zener region voltage
c. Diode resistance vs. forward-bias arrangement

Zener Diode as Voltage regulator

6. Connect the circuit of Fig. 3.2. the output of power supply. VAA is set at 0 Volt,
ampere A is on the 100 mA range. Slowly increasing VAA and current IZ measures 20
mA. Measure total current IT. Record the result in table 3.3.

R=550Ω

VAA R2= 4.7kΩ Vab

Vab

Fig. 3.2 Experimental voltage regulator circuit

 VAB,V IZ, mA IT mA VAA, V
VAB
VAB + 0.1
VAB + 0.1
Table 3.3 Voltage Regulator

7. Determine and record the range of variation of VAA over which VAB remains constant
within +0.1 Volt of its value. Measure the variation of IZ and within this range.
Record it in Table 3.3.

V. QUESTIONS:

1. What can you say about the biasing of a Zener diode?

2. What portion of a Zener diode characteristics is most useful for voltage regulation
application? Why?
3. Explain what is meant of Zener potential.
4. What is the significance of the graph of procedure 5B? How can this graph be used in
the design of regulator employing 10 V Zener diode?
5. Refer to Table 3.3, explain how the circuit works.
 EXPERIMENT NO. 4
DIODE CLIPPER

I. OBJECTIVE:

To investigate the clipper network in diode applications.

II. DISCUSSION:

There are varieties of diode networks called clippers that have the ability to ″clip″ off a
portion of the input signal without distorting the remaining part of the alternating waveform.
Depending on the orientation of the diode, the positive or the negative region of the signal is
″clipped″ off. Clippers are networks that ″clip″ away part of the applied signal either to create a
specific type of signal or to limit the voltage that can be applied to a network. Clipping circuits
are used to select for transmission that part of an arbitrary waveform which lies above or below
some reference level. Clipping circuits are also referred to as voltage limiters, amplitude
selectors, or slicers.

There are two general categories of clipper; series and parallel. The series configuration
is defined as one where the diode is in series with the load, while the parallel variety has the
diode in a branch parallel to the load.

III. MATERIALS AND EQUIPMENT:

1-15kΩ (1/4 W) 1-15 Vbc power supply

1-5kΩ potentiometer 1 - signal generator
1 - 1N4001 silicon rectifier diode 1 - oscilloscope
1 - Digital Tester
 Oscilloscope Oscilloscope

CH1 G CH2 CH1 G CH2

R2
R2
D1
D1 MAX

Fig. 4.3a Fig. 4.3c

Oscilloscope Oscilloscope

CH1 G CH2 CH1 G CH2

R1
R1
D1
D1 MAX

Fig. 4.3b Fig. 4.3d

IV. PROCEDURE
1. Construct circuit in Fig. 4.3a. Without any input signal connected, position the circuit
together with the oscilloscope′s display. Set for the proper setting of the oscilloscope.
2. Attach the signal generator to the circuit. Set the supply′s output at 6V peak-to-peak
at 200Hz frequency on the data page and results section, sketch your clipped
waveform.
3. Now, reverse the polarity of the diode as shown on Fig.4.3b. Compare the waveform
with that on step 2.
4. Connect now the circuit in Fig.4.3c. Applying power to the circuit and adjust the
potentiometer to 1.5 volts of the dc voltage (Vdc). Then connect also the signal
 generator, at 6volts peak to peak to the circuit. Vary the resistance of the
potentiometer from one extreme to the other. Record and plot your observation, if
any.
5. Now reverse the polarities of both the diode and the dc supply as shown in Fig. 4.3d.
Adjust the dc voltage of the potentiometer to (1.5 volts). Connect the signal generator
(also at 6 volts pp) to the circuit. Plot your observation the vary the resistance of the
potentiometer from one extreme to the other. Record and plot your observation, if
any.

V. DATA AND RESULTS:

VI. CONCLUSION:

VII. QUESTIONS:

1. Define clipper

2. In your experiment, what did you notice on the peaks of the clipper′s output
waveform? Is the clipping level said to be perfect? Support your answer.

3. Referring to your input waveform, at what instance will the diode be forward
bias? An open circuit?

4. Referring to your graph , what conclusion can you draw with the waveform of
both forward and reverse polarity of the diode.

5. For the negative clipper circuit of Fig 4.3b, why is the positive peak not
clipped? For the positive clipper circuit of Fig.4.3a, why is the negative peak
not clipped?

6. When varying the resistance of the potentiometer, what happens to the

clipping level for (a) forward polarity (b) revese polarity.
 EXPERIMENT 5
DIODE CLAMPER

I. OBJECTIVE

To investigate the clamper networks in diode applications.

II. DISCUSSION

The Clamping network is one that will "clamp" a signal to a different DC level. The
network must have a capacitor, a diode, and a resistive element, but it can also employ a
independent DC supply to introduce an additional shift. The magnitude of R and C must be
chosen such time at constant RC is large enough to ensure that the voltage across the capacitor
does not discharge significantly during the interval the diode is non-conducting. Throughout the
analysis we will assume that for all practical purposes the capacitor will fully charge or discharge
in fire time constants.

R
Vi Vo

FIG 5. DIODE CLAMPER

The network of Fig 5 will clamp the input signal to the zero level (for ideal diode). The
resistor R can be load resistor or parallel combination of the load resistor and a resistor designed
to provide the desired level of R.
 For a clamping network, the total swing of the output is equal to the total swing of the
input signal.

III. MATERIALS AND EQUIPMENTS

1-10K ohm resistor 1-Oscilloscope

1-10 microfarad capacitor 1-Signal Generator

1-IN4001 silicon diode

IV. PROCEDURE

1. Construct the circuit given in Fig 5.1. Set the Oscilloscope to the following setting:

Ch 1&2: 5V/div

Time base: 10ms/div

OSCILLOSCOPE

10 µF

IN4001 10 kΩ

2. Adjust the signal generator's output level 5 volts peak-to-peak at 1 KHz. Using the
Oscilloscope, obtain the waveform and plot it.
 3. Reverse the polarity of the diode in the circuit. Obtain the output waveform and plot it.
V. QUESTIONS

1. For the clamper circuits.

a. What is the function of the capacitor?
b. What is the voltage value in the capacitor?
c. Calculate the energy dissipated by the capacitor.
d. By changing the capacitor value, what will you observe?

1 µF

100 Ω
Vi Vo

5V

Fig 5.2
 EXPERIMENT NO. 6
BIPOLAR TRANSISTOR FAMILARIZATION AND TRANSISTOR TESTING

I. Objectives
1. To learn about biasing of transistors and to measure ICBO.
2. To determine the relationship between emitter, base and collector currents.
3. To determine the effects on emitter-base and collector current of forward and
reverse bias in emitter base circuit.
4. To have an understanding about the rules on proper handling of transistors
and for making measurements.
5. To determine the state of bipolar transistor.
6. To determine whether a bipolar transistor is conducting or non-conducting
when used as a switch.

II. DISCUSSION:

The advantage of this three-terminal solid-state device over the tube were obvious.
Transistor was smaller and light weight; had no heater requirement or heater loss; had rugged
construction; and was more efficient since the device itself absorbed less power. It was instantly
available for use, requiring no warm up period and lower operating voltage were possible. You
will find that all amplifiers (devices that increases the voltage, current and power level) will have
at least three terminals with one controlling the flow between other two terminals. Transistor
may be classified according to the basic material and in this category, we find germanium and
silicon transistors.

TRANSISTOR CONSTRUCTION
Transistor is a three-layer semiconductor device containing of either two n- and one p-
type layers of material or two p- and one n-type material layers of material. The former is called
NPN transistor and the latter is called PNP transistor. Both are shown in Fig 6.
with proper DC biasing. The emitter layer is heavily doped, the base is lightly doped and the
collector is only lightly doped. The outer layers have widths much greater than the sandwiched
p- and n-type materials for the biasing shown in fig. 6 the terminals have been indicated by the
capital letters E for emitter, C for collector and B for base.

E C E C
P N P N P N

B B

Vee Vcc Vee Vcc

Fig. 6
TRANSISTOR OPERATION:

The basic operation of the transistor will now be considered using PNP transistor if Fig.
6a. The operation of the NPN transistor is exactly the same if the roles played by the electron and
hole are interchanged. In Fig. 6.2. the PNP transistor has been redrawn without the base to
collector bias. The depletion region has been reduced in width due to applied bias, resulting in a
heavy flow of majority carriers from the p- to the n-type material

Let us now remove the base-to-emitter bias of the PNP transistor of Fig. 6.1a as shown in Fig.
1.3. One p-n junction of a transistor is reverse biased, while the other is forward biased. In Fig
6.4 both biasing potentials has been applied to a PNP transistor, with the resulting majority and
minority-carrier flow indicated. Note in Fig 6.4 the widths of the depletion regions, indicating
clearly which junction is forward biased and which is reverse biased. As indicate in Fig. 6a large
numbers of majority carriers will diffuse across the forward biased p-n junction into the n-type
material. The question then is whether these carriers will contribute directly to the base current in
or pass directly into the p-type material. Since the sandwiched p-type material is very thin and
has a low conductivity, a very small number of these carriers will take the this path of high
resistance to the terminal. The magnitude of the base current is typically on the order of
microamperes as compared to milliamperes for the emitter and collector currents. The larger the
number of these majority carriers diffuse across the reverse biased junction into the p-type
material connected to the collector terminal as indicated in Fig 6.4. Applying Kirchoff's current
law to the transistor in Fig. 6.4 as if it were single node, we obtain:

IC + I B = I E
and find that the emitter current is the sum of the collector and base current. The collector
current, however, is compromised of two components - the majority and minority carriers. The
minority-current component is called the leakage current and is given by the symbol (I C current
emitter terminal loop) the collector current, therefore, is determined by:

Ic = Icmaj + Icmino
For general purpose transistors, Ic is measured in milliamperes, with Ico is measured in
milliamperes or nanoamperes. The Ico like is for a reverse-biased diode is temperature sensitive
and must be examined carefully when applications of wide temperatures ranges are considered. It
can severely affect the stability of a system at high temperature if not considered properly.
Increase temperature results in increased current. This in turn leads to added heat and more
current. If this chain reaction, which is called "runaway", is uninterrupted, it may result to
complete disfunction of the transistor because of excessive heat

Fig 6.2 Forward Biased PNP Fig 6.3 Reverse Biased PNP Fig 6.4 Majority and Minorty Carriers
BIPOLAR TRANSISTOR TESTING
An Ohmmeter can be used to check the state of a transistor for an NPN transistor, the
forward biased junction from base to emitter will result in a reading that will typically fall in the
range of 100 ohms to a few kilohms. The reverse-biased base-to-collector junction will result in a
reading typically exceeding 100 kilohms.

For a PNP transistor the leads are reversed for each junction. Obviously, a large or small
resistance in both directions for either junction of an NPN or PNP transistor indicates a faulty
device.

If the positive (+) lead to connected to the base and the negative lead (-) to the emitter has
a lower resistance reading would indicate an NPN transistor. A high resistance reading would
indicate PNP transistor.

The application of transistors is not limited only to the amplification of signals. Through
proper design, it can be used as switch for computers and control application.

There are transistor that are referred as switching transistors due to speed with which they
can switch from one voltage level to other. The total time for a transistor to switch from the "on"
and "off" delay time between changing state of the input and the beginning of the response of
output.

III. MATERIALS AND EQUIPMENT

1-100 ohm resistor (R1) 2-SPST switches

1.5k ohm potentiomenter (R2) 2-Digital testers
1-1k ohm, .5W resistor (R3)
1-2N2904A (PNP TRANSISTOR) Vce = .5V DC source
1-2N2222 (NPN TRANSISTOR) Vcc = 6V DC source
1-12V Power Supply 1-Digital tester
1-2N2232 transistor 1-22K ohm resistor, .5W
1-SPST Switch 1-2.2K ohm resistor, .5W
1-100K ohm resistor, .5W
IV. PROCEDURE
A. PNP BIASING
R1 R1

S1 S1

R2 R2

VEE A VEE A

S1
A A
R3 VCC R3

Fig. 6.5 Current-voltage Fig. 6.6 Current-voltage

measurement in the emitter base- measurement in the emitter and
circuits collector circuit of a PNP transistor

1. Consider power is ON. Set R2 to maximum resistance. Measure and record emitter date
of currents in table 6. Also, measure and record emitter-base and collector base Voltage
and Specify its voltage polarities

2. Set R2 for minimum resistance to apply maximum emitter bias. Measure and record
emitter and collector current, emitter-base and collector-base voltage in table 6. Specify
polarities

3. Consider power is OFF. Measure and record current in emitter and collector circuits and
emitter-base and collector-base voltages in table 6. Specify polarities

4. Again, consider the power in ON. Measure and record current in emitter and collector
circuits and emitter-base and collector-base voltages in table 6. Specify polarities

5. Upon the emitter-base circuit by opening S1, S2 is open.

a. Measure and record collector current in table 6, the value is Iceo for the circuit
conditions. Measure and record collector-base voltage in table 6 then
specify the polarities. S2 is closed
NPN BIASING
6. Consider the power is OFF. Substitute NPN transistor from PNP transistor as shown in
Fig 6.7. Take note of the polarity of the Vcc.

R2 = 5kΩ R2 = 100Ω

VEE = 12V A

2N2222

VEE = 6V
A
R3 = 1kΩ

Fig 1.7 Current-Voltage measurements in the

emitter & collector currents of an NPN transistor

7. Set R2 for maximum resistance when S2 is closed. Measure and record the data of
emitter and collector currents and emitter-base and collector-base voltage in table 6.
Specify its voltage polarities..\

8. Set R2 for minimum resistance when S2 is closed. Measure and record the data of emitter
and collector currents and emitter-base and collector-base voltage in table 6. Specify its
voltage polarities.

9. Consider the power OFF. Reverse the polarity of emitter battery (Vcc) and the connecting
Digital tester. Maintain R2 for minimum resistance.

10. Consider the power ON. Measure and record the current in emitter and collector circuits
and emitter-base and collector-base voltage and record voltage in table 6. Specify voltage
polarities.

11. Open the emitter-base circuit by opening S1 when S2 is open.

12. When S2 is close, measure and record emitter and collector currents, and collector-base
voltage in table 6. Now turn off the power
PROCEDURE B: BIPOLAR TRANSISTOR TESTING

- +

Rbc Rcb
c
c
+ b - b

e e
Rbe Rcb

- +

(A) (B)
- +

Rbc Rcb
c c

+ b - b

e e
Rbe Reb

- +

(C) (D)
1. Set the digital tester to ohmmeter mode and proper calibration.
a. With your NPN transistor, connect the digital probe tester to each junction
alternately. Refer to Fig 6.8 a and b. Record the reading in table 6.8

TRANSISTOR Rbc Rbe Rcb Reb

NPN TYPE
PNP TYPE
Table 6.8

2. Using a PNP transistor, perform the same procedure as in step 2, refer to Fig 6.8 c and d.
Record your readings in table 6.
PROCEDURE C: TRANSISTOR AS A SWITCH

VCC=12V

RL=100KΩ RL=2.2KΩ

B c
S1
b Fig. 7.2

A e

RL=22K
Ω

1. Construct the circuit shown in Fig 6.9

2. Connect S1 with position A, measure Vb and Vc, if any, and record it in table 6.9
3. Indicate the data table if the transistor is "On" or "Off" state.
4. Move S1 to position B, measure Vb and Ve, if any record it in the same table. Also,
indicate the transistor state

S1 Vb Vc TRANSISTOR
CONDITION
A
B
Table 6.9

5. Calculate for the approximate value of Ic, Then Ic = ____________

V. TABULATION OF DATA AND RESULTS

PNP NPN
STEP EMITTER BASE COLLECTOR STEP EMITTER BASE COLLECTOR
BASE BASE
CURRENT VOLTAGE CURRENT VOLTAGE CURRENT VOLTAGE CURRENT VOLTAGE

2 X X X X X
4 11
5 12
7 14
9 16

Table 1 Transistor Biasing

VI. COMPUTATION OF DATA RESULTS

VII. CONCLUSION
VIII. QUESTIONS
1. Show the relationship between base, emitter and collector current.
2. What is Icbo or Ico? Explain how it was measured.
3. Verify the relationship experimentally for the PNP and NPN transistors. Draw the
schematic diagram for the circuit that you used and give the detailed procedure
you followed
4. What is the effect of increasing emitter bias on the collector? Refer to your measured
data.
5.What are the effects on the collector current and reverse bias on the emitter-base
circuit? Refer to your measured data
6. If both junctions of a transistor result in the expected readings, how can you determine
the type of transistor?
7. Referring to your data in table 6.8, for both PNP and NPN transistor, how can you
determine if the active region is forward biased?
 EXPERIMENT NO. 7

COLLECTOR CHARACTERISTIC CURVE OF A BIPOLAR TRANSISTOR

I. OBJECTIVE:

To determine the characteristic curves of VCE versus IC for the CE configuration.

II. DISCUSSION:

Transistors are designed with unique characteristics to meet certain application

requirements. The characteristic curves are provided by the manufacturer in a transistor manual
or application notes. The manufacturer in which characteristics are given provides data sheets the
nature of the data depends on the source and on the intended use of the transistor.

The following specifications must be considered (a) a brief description of the transistor
and suggested applications, (b) mechanical data including dimensions, biasing, and mounting, (c)
maximum rating, (d) characteristics and other engineering data and (e) transistor characteristic
curves.

TEST CIRCUIT TO DETERMINE AVERAGE COLLECTOR CHARACTERISTICS

As shown in Fig. 7 is a test circuit used for plotting the characteristic curves of an
NPN type the same test circuit with battery and meter polarities reversed could be used. In this
circuit, base current maybe set to a specified value by adjusting R 1. The following procedures are
as follows: R1 is adjusted to a reference value of I B, at which value it is desired to plot the curve.
M1 monitors base current and R1 is used to maintain a constant level of IB. M2 measures collector
voltage. Predetermined values of collector voltage are selected and recorded. To obtain a family
of curves, this procedure is repeated for specified values of the base current.
 Ic

Ib

Ib

VCE
R2

R1

S1 S2
Vcc

Figure 7 Test circuit for

Determining Vcs versus Ic

DUAL POWER SUPPLIES

Dual power supplies after a convenient source. Each of the supplies has its own controls
and there is a mode switch for selecting either one or both of the independent supplies. In one
mode, it is possible to control both supplies from the A unit. In that mode, the voltage output of
each supply is exactly the same, both the polarity of each differs and A becomes a positive, B a
negative supply. This feature is convenient when working with differential and operational
amplifiers.

III. MATERIALS
1 – 460Ω resistor 2 – Digital tester
1 – 2N9304 transistor 1 – Variable low voltage DC
1 – 10kΩ, 2W potentiometer
2 – SPST switches
IV. PROCEDURE:
1. Follow the circuit connection, refer to Fig.7. Set V BB at 1.5V and VCC at +3V.
Consider S1 and S2 are open, and then set R 1 to 0V. Both digital testers should
be set on the highest milliampere range to protect the meters. Before the
power is applied check the circuit connection and select the tester range.

2. Consider the power is ON. To check the circuit operation, adjust R 1 until low
values of IB and IC are obtained

3. 10A must read by A1 by adjusting R1 and readjust during steps 4 & 5, to

maintain the value of IB = 10A.]

4. Adjust VCC for 0V, that M3 should read zero (VCE = 0 ). Measure and record
the value of IC in Table 7.

5. From Table 7, adjust VCC until the said values of VCE are obtained. Record the
value of IC for each value of VCE in table 7.

6. Adjust VCC for VCE = 0V for R1 IB = 20A. Maintain the value of IB for step
7 & 8.

7. Measure and record the value of IC to table 7.

8. From table 7, adjust VCC until said values of VCE are obtained. Record the
value of IC for each value of VCE. To maintain the value of IB=20A, monitor
IB and readjust R1 if necessary.

9. Repeat steps 6-8 for all the values 1Bas shown in table 7.
V. DATA AND RESULT
IC, mA
VCE, V
IB, μA
0 2.5 5 7.5 10 15 20 25 30
10
20
30
40
50
60

VI. CONCLUSION:
VII. QUESTIONS:
1. Draw the circuit of a test circuit, which could be used to determine the average
collector characteristics of a PNP transistor in the CE configuration

2. What is the maximum collector-to-emitter voltage, which may be applied with the
base open? Refer to the transistor data for the 2N3904.

3. From the family of average collector characteristics curves based on the data in table
7, compute the value of beta in the vicinity I B = 40A, VCE = 20V. Show all
computations
 EXPERIMENT NO. 8
COMMON OUTPUT CHARACTERISTIC CURVE

Objective:

To determine the characteristic of common base configuration.

I. Discussion

The base to mass therefore in a pnp is had for having J and polarizes to you directly

must have Va positive βE while for having polarized Jc inversely I must have V a CB negative.

Dalla deduces that in the escape characteristic, the escape is the c while VCB and Iand are the

income in largeness’s, it is preferred of the two to take and like parameter in how much the c @ And

and they are obtained of the straight horizontals in the active region that extend in the quadrant

characterized fromand > 0 and V0CB < the region of saturation in which increases of current with

V are had bruschithe almost constant CB are obtained forand > 0 0and VCB> that is directly

polarized JC while the interdiction region is had for and< 0 and the splices are obtained inversely

polarizing both .

As far as the income characteristic, it is the same one of the directly polarized diode valve
unless to growing of VtheCB for Early effect it increasesand and therefore the curves are gotten
thicker.

II. Materials
Function generator
Variable power supply
Rc=10kΩ
Rc=15kΩ
Potentiometer=10kΩ
Digital tester
Transistor 2N2222
III. Procedure

1. Construct the circuit as shown in Fig. 9. Set VCE according to the table and the

current at emitter by varying the Vcc and R1.

2. Record the result in Table 9.

3. Draw the characteristic curve VCB vs. IC.

R1 R1
E C
[Gr [Gr
B
[Gr
VEE VCB

IC
IE

VCC RC
[Gr

[Gr

COMMON BASE OUTPUT

CHARACTERISTIC CURVE

IV. Data and Results:

IC
Ie

VCE

0V 2V 4V 6V 8V 10V 12V 14V 16V 18V

V. Conclusion:

VI. Questions

1. The common base configuration has a ___________ input impedance, but it can have a

_________ voltage gain.

2. The current in gain of common base configuration is just _______________, and the

output impedance is simply _______________.

3. The ___________ and ________ are in phase for the common-base configuration.
 EXPERIMENT NO. 9
JFET DC SOURCE

I. OBJECTIVE:

1. To determine the effect of drain to source voltage VDS an drain current ID.

2. To determine the effect of reverse gate to source bias voltage V GS and ID.

3. To determine and plot the JFET Transform curve.

4. To determine and plot the drain characteristic of a JFET.

II. DISCUSSION:

The field effect transistor (FET) is three terminal devices used for a variety of applications that
match, to a large extend. The primary differences between two types of transistor is the fact BJT
transistors is a current controlled device while a JFET transistor is a voltage-controlled device as
shown in Fig 1.1.
ID

+
FET
Fig.8.1
Voltage-Controlled
Amplifiers

Controlled Voltage
(VGS)

For the JFET transistor the n-channel device will appear as prominent device. The basic
construction of the n-channel JFET is shown in Fig. 1.1.the type of the n-type channel is
connected through an ohmic contact to a terminal preferred to as the drain (d) while the lower
end of the same material is connected through an ohmic contact to a terminal preferred to as the
source. (5) The two P-type materials are connected together and to the gate. In essence,
therefore, the drain and source are connected to the ends of the n-type channel and gate to the
two layers of p-type materials.
JFET DRAIN CHARACTERISTICS

The effect of drain-to-source voltage (VDS) on I D in an n-type, channel JFET maybe

determined experimentally by the current of Fig.1.2 V GG serves as the gate bias supply and V DD as
the drain-voltage source. the voltmeter M 2 measures VDS. The milliammeter M1 measure ID as VDD
is varied.

S2
CV
M1

S1
+ EM VDD
S2
C
CV VM
2

S2
C

VGG

Fig. 1.2(a)

S2
M1

+ EM
VM
2
VDD

Fig. 1.2(b)

Fig. 1.3 Shoe the variation of ID with VDS for VGS=0, the condition when the gate is
effectively shorted to two sources. Fig 1.2 (b). As V DS is increased from 0V to VP, called pinch
off voltage, ID increases that can be attained without destroying the JFET, the value I drain
current remains relatively constant at the I. JFET is normally operated on this interval V P to VDS
max WHERE NO change In ID occurs.
 Ic(mA)

IDSS

VF VDS(MAX)
Fig. 1.3 Drain characteristic of a JFET

Shorted to service another drain characteristic of a JFET when gate is shorted to service
another drain characteristic curve maybe determines by reverse-biasing the gate. At some
voltages, for this condition ID will vary as shown in Fig 1.4. Other curve maybe determined by
setting VGS at −1.0V, then at −1.5V, and so on. VGS = -2V approximately.

Ic(mA)

VGS=0.1V
IDSS
VGS=-0.5V
VGS=-1.0V
VGS=-1.5V
VGS=-2.0V

VDS
VP VPS(MAX
)
Fig. 1.4 Family of Drain Characteristics of
a JFET

TRANSFER CHARACTERISTIC

Another curve, the transfer curve is useful in evaluating the operating condition of a FET.
The curve is also plotted by using experimental circuit Fig. 1.6 (a) however, VDS is kept at some
constant value while VGS is varied, and ID is measured. The curve is
resembled in Fig 1.5 the transfer curve of Fig 1.5 is called a square-law curve, because of
squared term in the equation from which it is determined.

ID

=k
IDSS
VDS

VGS
0
-2 -1

Fig. 1.5 Transfer curve of JFET

III. MATERIALS AND EQUIPMENT

Two Independent variable

Voltage dc source
EVM, 0-10 milliammeter
2n5484 (n-channel JFET) semiconductor
Two SPST switches

IV. PROCEDURES:

Gate shorted to source, VGS = 0, VDD = VDS

1. Connect the circuit of Fig. 1.6b. Power off.

2. Set the output of VDD at 0v. Switch power on and record data in table 1.9 the
drain current ID.
3. a) Increase the output of VDD =0.5V, measure and record ID corresponding to
VGS = 0V.
b) Reset VDD to each value instead in the table, measure and record its VDD for
each value.
4. Open S1 power off.
Gate is reversed-biased

5. Modify the Fig. 1.6 to confirm than a fig. 1.6a switches open.
6. Set both output of VDD and VGG to 0V. Switches closed power turn on.
7. Adjust VGG so that VGS = -0.25V. Level maintain for steps 8(a) and 8(b).
8. (a) Measure VDD for each value of VDS. Then measure and record ID in the table
1.9.
(b) Increase VDD for each value of VDS. Then measure and record ID in table
1.9.

S1
CV
M1

+ EM
VM
VDD
2

S2
C

VGG

Fig. 1.6
(a)

S1
M1

+ EM
VM
2
VDD

Fig. 1.6
(b)
 9. Reduce VDD =VDS = 0V, increase VGG and VGS −0.8v maintain this level for
step 10.
10. Repeat step 8(a) and 8(b) for each value of VDD =VDS listed in table 1.9
11. Repeat step (9) and (10) for each value of VGS and VDS listed until drain,
Current cut-off is reached.
12. Power turn off

TRANSFER CHARACTERISTIC

13. Switches open. Set VDD =15V, VGG = -2.5V, VDD constant set 15V.
14. Power on. Close S1 and S2, measure and record ID for each VGS values
15. (a) On graphing paper, draw the drain characteristic using your data.

V. DATA AND RESULTS

ID, mA
VGS, V
VDS, V 0 -0.25 -0.5 -0.75 -1.0 -1.25 -1.5 -1.75 -2.0 -2.5
0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
11.0
15.0

Table 1.9
VI. CONCLUSION:

VII. GUIDE QUESTION:

1. Determine JFET for BJT.

2. Explain the procedure you would use to verify experimentally that there is nom
gate current in the range over which a JFET is normally operated.
3. From your graph, identify VP. (a) what helps you identify VP? Defined.
4. From your graph, identify IDSS (b) what helps you identify IDSS? Defined.
5. Referring to your data, and your drain characteristic, compare the level of ID for
each value of VGS, what conclusion can you draw?
6. Which is more effective on controlling ID, VDS or VGS? Explain, referring to
your data.
7. What values of VGS cut off ID?
8. Solve for the transfer characteristic mathematically, compare with your obtained
transfer characteristics. Which is more accurate to use? Why?