Lecture 11: Synchronous

Sequential Logic
Syed M. Mahmud, Ph.D
ECE Department
Wayne State University

Aby K George, ECE Department, Wayne State University

Contents
• Characteristic equations
• Analysis of clocked sequential circuits
• State equation, state table and state diagram
• State reduction and assignment
• Design procedure

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Characteristic Tables

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Characteristic Equations

𝑄+ = 𝑆 + 𝑅′𝑄 𝑄 + = 𝐽𝑄′ + 𝐾′𝑄 𝑄+ = 𝐷 𝑄+ = 𝑇 ⊕ 𝑄

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Analysis of Clocked Sequential Circuits
• Obtaining a table or diagram for the time sequence of inputs,
outputs, and internal states.
• Write the Boolean expression that describe the behavior of the
sequential circuit.
• Draw the logic diagram with flip-flops and clock inputs.
• Logic diagram may or may not include the combinational circuits.

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State Equation
• Transition equation
• Specifies next state as a function of
present state and inputs.
• Example:
𝐴 𝑡 + 1 = 𝐴 𝑡 𝑥 𝑡 + 𝐵 𝑡 𝑥(𝑡)
𝐵 𝑡 + 1 = 𝐴′ 𝑡 𝑥 𝑡
• Output equation
𝑦 𝑡 = 𝐴 𝑡 + 𝐵 𝑡 𝑥′(𝑡)

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State Table
• Time sequence of inputs, outputs, and flip-flops in a tabular form
• Also called transition table

𝐴 𝑡 + 1 = 𝐴𝑥 + 𝐵𝑥
𝐵 𝑡 + 1 = 𝐴′ 𝑥
𝑦 𝑡 = 𝐴 + 𝐵 𝑥′
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State Diagram
• Graphical representation of state table

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Analysis with D Flip-flop
• Draw the state diagram for the following state equation
𝐷𝐴 = 𝐴 ⊕ 𝑥 ⊕ 𝑦 or 𝐴 𝑡+1 =𝐴⊕𝑥⊕𝑦

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Mealy and Moore Models of Finite State
Machines
• Finite State Machine (FSM)

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State Reduction
• Reduction in number of flip-flops in a sequential circuit.
• 𝑚- flip-flops can produce 2𝑚 states.
• Two states are said to be equivalent, if for each member of the set of
inputs, they give exactly same output and send the circuit either to
the same stare or to an equivalent state.

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State Reduction

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Design Procedure
1. From the word description and specifications of the desired
operation, derive a state diagram for the circuit.
2. Reduce the number of states if necessary.
3. Assign binary values to the states.
4. Obtain the binary-coded state table.
5. Choose the type of flip-flops to be used.
6. Derive the simplified flip-flop input equations and output
equations.
7. Draw the logic diagram.
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Excitation Tables for Flip Flops
1. Excitation tables are needed to design a sequential system.
2. These tables can be derived from the characteristic tables of Flip
Flops.
Characteristic Table for S-R Flip Flop Excitation Table for S-R Flip Flop
S R Q Q+ Q Q+ S R
0 0 0 0 0 0 0 X
0 0 1 1 0 1 1 0
0 1 0 0 1 0 0 1
0 1 1 0 1 1 X 0
1 0 0 1
1 0 1 1
1 1 0 X
1 1 1 X

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Excitation Table for J-K Flip Flop
Characteristic Table for J-K Flip Flop Excitation Table for J-K Flip Flop
J K Q Q+ Q Q+ J K
0 0 0 0 0 0 0 X
0 0 1 1 0 1 1 X
0 1 0 0 1 0 X 1
0 1 1 0 1 1 X 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0

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Excitation Tables for D and T Flip Flops
Characteristic Table for D Flip Flop Excitation Table for D Flip Flop
D Q Q+ Q Q+ D
0 0 0 0 0 0
0 1 0 0 1 1
1 0 1 1 0 0
1 1 1 1 1 1

Characteristic Table for T Flip Flop Excitation Table for T Flip Flop
T Q Q+ Q Q+ T
0 0 0 0 0 0
0 1 1 0 1 1
1 0 1 1 0 1
1 1 0 1 1 0
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Example: State diagram from description
• Draw the state diagram for a Moore Machine that detects a sequence
of three or more consecutive 1’s in a stream of bits coming through
an input line.

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Design Example 1: Sequence Detector using D Flip-flop

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Design Example 1: Sequence Detector using D
Flip-flop

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Design Example 2: Sequential circuit using JK
Flip-flop

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Design Example 2: Sequential circuit using JK
Flip-flop

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Design Example 3: Counter using T Flip-flop

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Design Example 3: Counter using T Flip-flop

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Design Example 4: Implement X Flip-flop
using Y Flip-flop
• Design JK flip-flop using T flip-flop
J K T
0 0 0 0 0 𝑇 𝐾
𝐾𝑄𝑛
0 0 1 1 0
𝐽
0 1 0 0 0 00 01 11 10
𝑚0 𝑚1 𝑚3 𝑚2
0 1 1 0 1 0 1
𝑚4 𝑚5 𝑚7 𝑚6
1 0 0 1 1 𝐽 1 1 1 1
1 0 1 1 0
1 1 0 1 1 𝑄𝑛
1 1 1 0 1 𝑇 = 𝐾𝑄𝑛 + 𝐽𝑄𝑛 ′

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Summary
• How to find the characteristic table, characteristic equation, and
excitation table for a flip-flop
• How to implement a state table, state equation, or state diagram
using different flip-flops?
• What are the design procedure for a state machine ?
• What are the differences between Mealy and Moore FSM ?
• How to do the state reduction ?
• How to design one Flip-flop using other flip-flop ?

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Homework – 5
• 5.2
• 5.4
• 5.6
• 5.9
• 5.12
• 5.18
• 5.20

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