722 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO.
2, FEBRUARY 2008
An On-Line UPS System With Power
Factor Correction and Electric Isolation
Using BIFRED Converter
Adel Nasiri, Senior Member, IEEE, Zhong Nie, Member, IEEE,
Stoyan B. Bekiarov, and Ali Emadi, Senior Member, IEEE
Abstract—This paper presents the design consideration and per-
formance analysis of an on-line, low-cost, high performance, and
single-phase uninterruptible power supply (UPS) system based on
a boost integrated flyback rectifier/energy storage dc/dc (BIFRED)
converter. The system consists of an isolated ac/dc BIFRED con-
verter, a bidirectional dc/dc converter, and a dc/ac inverter. It
provides input power factor correction, electric isolation of the
input from the output, low battery voltage, and control simplicity.
Unlike conventional UPS topologies, the electrical isolation is pro-
vided using a high frequency transformer that results in a smaller
size and lower cost. Detailed circuit operation, analysis, as well as
simulation and experiment results are presented. A novel digital
control technique is also presented for UPS inverter control. This
controller follows the reference current and voltage of the inverter
with a delay of two and four sampling periods, respectively.
Index Terms—Battery charger, digital control, integrated con-
verters, inverters, modeling and analysis, power electronic con-
verters, rectifiers, uninterruptible power supplies (UPSs).
I. I NTRODUCTION
NINTERRUPTIBLE power supply (UPS) systems pro-
U vide uninterrupted, reliable, and high quality power for
vital loads. They protect sensitive loads against power outages
as well as extreme voltage conditions. UPS systems also sup-
press line transients and harmonic disturbance. Applications of
UPS systems include medical facilities, life support systems,
data storage and computer systems, emergency equipment,
telecommunications, industrial processing, and online manage-
ment systems [1]–[10].
Generally, an ideal UPS should be able to deliver uninter-
rupted power and simultaneously provide the necessary power
conditioning for a particular power application. Therefore, it
should have the following features: regulated sinusoidal output
Manuscript received February 8, 2006; revised October 11, 2007. This paper
was presented in the 29th IEEE Industrial Electronics Conference, Roanoke,
VA, November 2003.
A. Nasiri is with the Power Electronics and Motor Drive Laboratory,
Department of Electrical Engineering and Computer Science, University of
Wisconsin, Milwaukee, WI 53201 USA (e-mail: nasiri@uwm.edu).
Z. Nie was with the Grainger Power Electronics and Motor Drives Lab-
oratory, Electric Power and Power Electronics Center, Illinois Institute of
Technology, Chicago, IL 60616-3793 USA. He is now with Inductoheat, Inc.,
Madison Heights, MI 48071 USA (e-mail: niezhon@iit.edu).
S. B. Bekiarov is with C. E. Niehoff & Co., Evanston, IL 60202 USA (e-mail:
bekisto@iit.edu).
A. Emadi is with the Grainger Power Electronics and Motor Drives Lab-
oratory, Electric Power and Power Electronics Center, Illinois Institute of
Technology, Chicago, IL 60616-3793 USA (e-mail: emadi@iit.edu).
Digital Object Identifier 10.1109/TIE.2007.911199
0278-0046/$25.00 © 2008 IEEE
voltage with low total harmonic distortion (THD) independent
of changes in the input voltage or in the load, on-line operation
that means zero switching time from normal to back-up mode
and vice versa, low THD sinusoidal input current and near unity
power factor, high efficiency, low electromagnetic interference
(EMI) and acoustic noise, electric isolation, low maintenance,
and low cost, weight, and size [11], [12].
The main advantages of on-line UPS systems are their very
wide tolerance to input voltage variation and highly precise
regulation of output voltage. In addition, there is no trans-
fer time during the transition from normal to stored energy
mode. Fig. 1 shows the conventional on-line UPS system.
The main disadvantages of the conventional topology are low
power factor, high THD at the input, and low efficiency. The
input rectifier deteriorates the quality of input current unless
an extra Power Factor Correction (PFC) circuit that increases
system cost is added. Furthermore, the low frequency trans-
former raises cost for its big size and weight in low power
applications.
Integrated high-quality rectifier/regulator (IHQRR) topolo-
gies [13] consist of a discontinuous conduction mode (DCM)
boost converter integrated with a second conversion stage. This
new family of ac/dc converters offers a low cost alternative to
achieve PFC, fast dynamic response, and desired output voltage
regulation. Fig. 2 presents the configuration of the proposed
UPS system. The controlled output capacitor voltage from the
IHQRR provides an almost constant dc link voltage for the
inverter.
II. P ROPOSED S YSTEM
The topology of the proposed on-line UPS system is shown
in Fig. 3. It consists of an IHQRR at the front-end, a full bridge
dc/ac inverter at the back-end, a battery charger/discharger, and
a battery bank.
The boost integrated flyback rectifier/energy storage dc/dc
(BIFRED) converter, which is part of the IHQRR, consists of a
DCM boost converter integrated with a DCM flyback converter
as the second conversion stage [14]–[16]. The controlled dc
link voltage from the output capacitor of the BIFRED features
voltage source function for both the inverter and bidirectional
dc/dc converter.
The dc/ac inverter consists of a dc-link bus capacitor Cout ,
switches SI1 to SI4 , and an output low-pass LC filter. It
operates in a high frequency pulsewidth modulation (PWM)
NASIRI et al.: ON-LINE UPS SYSTEM WITH PFC AND ELECTRIC ISOLATION USING BIFRED CONVERTER
Fig. 1. Conventional on-line UPS system.
Fig. 2. Configuration of the proposed on-line UPS system using an integrated rectifier/regulator.
pattern to provide a high quality sinusoidal output voltage.
The charger/discharger is a bidirectional dc/dc converter, which
consists of switches S1b and S2b as well as a dc inductor Lb .
The switch S2b cuts the high dc-link voltage Vdc and steps it
down to low battery voltage Vbat during the normal operating
mode and charges the battery bank. Therefore, it eliminates
problems associated with the high battery voltage such as space,
cost, reliability, and safety issues.
During the energy-stored mode, the Boost converter steps up
the low battery voltage Vbat to high dc-link voltage for proper
operation of the back-end inverter.
III. O PERATIONAL P RINCIPLES AND C ONTROL S TRATEGY
A. Normal Operating Mode
The BIFRED converter has five modes of operation. A com-
prehensive study of the operating principles of this converter
has been presented in [17]. DCM–DCM mode is the desired
mode. The control strategy keeps the converter in this mode of
operation. The boost converter shapes the input current and the
723
flyback converter provides system isolation and output voltage
regulation. The conducted EMI in the converter is reduced by
an input EMI filter. The capacitor C1 reduces output voltage
ripple for the BIFRED converter and, at the same time, provides
a wide bandwidth to improve the shape of the input current.
Fig. 4 shows the current waveform of the BIFRED converter in
the desired mode.
When switch Sd1 is on, the circuit has the configuration
shown in Fig. 5. When the switch is off, the circuits in the first,
second, and third stages are shown in Figs. 6–8, respectively.
The full-bridge inverter consists of a dc capacitor and four
switches [insulated-gate bipolar transistors (IGBTs)] SI1 , SI2 ,
SI3 , and SI4 , and an output low-pass filter. In the PWM switch-
ing schemes, the output voltage is directly proportional to the
duty cycle of the switches and the amplitude of the dc bus
voltage VC . The output voltage can range from −VC to +VC .
Since the amplitude of the input dc voltage is usually fixed,
the only way to shape the output voltage is to control the duty
cycle of the switches. To do so, in the case of PWM technique, a
sinusoidal reference signal oscillating at the desired frequency
is compared with a high-frequency triangular carrier waveform.
724
Fig. 3. Topology of the proposed on-line UPS system based on the BIFRED converter.
Fig. 4. Current waveform of BIFRED converter in desired mode.
The frequency of the triangular carrier waveform determines
the inverter switching frequency and is kept constant at 20 kHz
in this paper.
In the unipolar PWM switching scheme used for driving
the back-end inverter, the output voltage is either switched
from HIGH to ZERO or from LOW to ZERO, unlike in the
bipolar switching scheme where switching takes place directly
between HIGH and LOW. As a result, the content of high order
harmonics in the output voltage is much lower compared to the
bipolar switching scheme. Consequently, the required output
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 2, FEBRUARY 2008
filter can be considerably smaller and overall efficiency of the
system is higher.
B. Battery Charge Regulation Mode
The bidirectional dc/dc converter, which is a combination
of a buck converter and a boost converter, is charging and
discharging the battery bank. In the battery charge regulation
mode, switch Sb1 and diode D4 are off. Capacitor Cout , switch
Sb2 , inductor Lb , diode D3 , capacitor Cb , and the battery form
the buck converter and charge the battery from the dc link.
Fig. 9 shows the configuration of the system in battery charge
regulation mode.
C. Backup Mode
In the backup mode of operation, when the input ac voltage is
out of the permissible tolerance range or is not available at all,
switch Sb2 and diode D3 are turned off. Capacitor Cout , switch
Sb1 , inductor Lb , diode D4 , capacitor Cb , and the battery
form the Boost converter, which discharges the battery into the
inverter dc link. The battery supplies all the power to the load.
Fig. 10 shows the configuration of the system for the back-
up mode.
NASIRI et al.: ON-LINE UPS SYSTEM WITH PFC AND ELECTRIC ISOLATION USING BIFRED CONVERTER 725

Fig. 5. Isolated BIFRED converter (during 0 ≤ t < DT , switch Sd1 : on).

Fig. 6. Isolated BIFRED converter (during DT ≤ t < DT + ∆1 T , switch Sd1 : off).

Fig. 7. Isolated BIFRED converter (during DT + ∆1 T ≤ t < DT + ∆2 T , ∆1 < ∆2 , switch Sd1 : off).

Fig. 8. Isolated BIFRED converter (during DT + ∆2 T ≤ t < T , switch Sd1 : off).

D. Control Strategy
The small signal output voltage to duty cycle transfer func-
tion of the BIFRED converter derived from the state space
averaging method shows one pole for this kind of converter
topology [14]. Therefore, simple control can be achieved ac-
cording to the voltage follower approach. Although this method
can cause a pulsating triangle waveform in the input induc-
tor current, the near unity power factor can still be imple-
mented. Fig. 11 shows this kind of control strategy for different
modes.
726 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 2, FEBRUARY 2008

Fig. 9. Configuration of the system in the battery charging mode.

Fig. 10. Configuration of the system in the backup mode.

In the normal mode of operation, switch S1 will be off, and vP and iL are considered as input and disturbance, respectively.
switch S2 needs to connect to the pin a. In the battery charge If output of the inverter VP and load current are considered
regulation mode, switch S1 will be on and switch S2 still needs constant in one sampling period, these continuous time-domain
to be connected to the pin a. In the back up mode, switch S1 state space equations are converted to the discontinuous time
will be off and switch S2 needs to connect with pin b. domain with a sampling period of Ts as follows:
A novel digital control method is used to control the inverter.


The state space equations of the inverter and load in the contin- vO (k + 1) vO (k)
=Φ + ΨvP + ΓiL (4)
uous time-domain are as follows: iLO (k + 1) iLO (k)
dvO
CO = iLO − iL (1) where
dt  
sin(ω0 Ts )
diLO ATs cos(ω0 Ts )
LO = vP − v O . (2) Φ =e = ω0 C O
dt − sin(ω0 Ts )
cos(ω0 Ts )
ω0 LO
Considering vO and iLO as state variables, the state space model

1 − cos(ω0 Ts )

Ψ = eATs
  −1
for the series converter is given by − I2 A B = 1
ω0 LO sin(ω0 Ts )

•

− ω01CO sin(ω0 Ts )


vO v
= A O + BvP + CiL Γ = eATs
  −1
(3) − I2 A C =
iLO iLO 1 − cos(ω0 Ts )

where



 where ω0 is the angular resonance frequency of LO and CO .
0 1/CO 0 −1/CO The sampling frequency of the system is always considered
A= B= C= .
−1/LO 0 1/LO 0 much higher than the resonance frequency of LO and CO . With
NASIRI et al.: ON-LINE UPS SYSTEM WITH PFC AND ELECTRIC ISOLATION USING BIFRED CONVERTER 727

Fig. 11. AC/DC–DC/DC converter control block diagram.

this assumption, (6) is simplified to (7). This conversion is valid Substituting (8) and (6) in (7) and updating reference current
for almost fs ≥ 20f0 for iLO in every two sampling periods, we have

vO (k + 1)


1 Ts 

vO (k)
 LO  ∗ 
= CO vP (k + 1) = iLO (k) − iLO (k)
iLO (k + 1) − LTOs 1 iLO (k) Ts


 − vP (k) + 3vO (k) − vO (k − 1). (9)
0 −Ts /CO
+ v (k) + iL (k). (5)
Ts /LO P 0
Equation (9) ensures that the current error between iLO and i∗LO
at time k + 2 goes to zero.
The current equation according to (5) is as follows:
Correspondingly, load voltage, vO , is sampled at half of the
current sampling frequency. The voltage equation according to
Ts (5) is as follows:
iLO (k + 1) = iLO (k) + [vP (k) − vO (k)] . (6)
LO
Ts
vO (k + 1) = vO (k) + iC (k) (10)
Considering vO and i∗LO constant over the next period, the CO O
output voltage of the inverter that corrects the error of iLO after Ts
two sampling periods is as follows: vO (k + 2) = vO (k + 1) + iC (k + 1)
CO O
LO  ∗ Ts Ts
= vO (k) + iC (k) + iC (k + 1). (11)

vP (k + 1) = vO (k + 1) + iLO (k + 1) − iLO (k + 1) CO O CO O
Ts
(7)
Because current control is suggested to be used up with a delay
where i∗LO is the reference value for output inductor cur-
of two sampling periods, we have
rent. vL (k + 1) is linearly estimated from previous values as
follows:
iCO (k) = i∗CO (k − 2), iCO (k + 1) = i∗CO (k − 1) (12)
vL (k + 1) = vL (k) + [vL (k) − vL (k − 1)]
where i∗CO is the reference current for output capacitor. Substi-
= 2vL (k) − vL (k − 1). (8) tuting (12) in (11) and updating the reference current at each
728
Fig. 12. Block diagram of the current and voltage controller of the series converter in the bypass mode.
Fig. 13. Frequency response of the current and voltage controller.
sampling frequency, we get
2Ts ∗
vO (k + 2) = vO (k) + i (k − 2).
CO CO
The current of i∗CO at time k which corrects the voltage error of
VO at time k + 4 is as follows:
CO ∗
i∗CO (k) = [v (k) − vO (k)] − i∗CO (k − 2)
2Ts O
∗
where vO (k) is the reference value for the output voltage.
A block diagram of the current and voltage controller in the
bypass mode for the inverter is shown in Fig. 12. The voltage
regulator is a pure deadbeat controller with a delay of two
sampling periods, including the consumed time for calculation.
G1 is time delay needed for calculations and analog to digital
conversions. G2 is time delay caused by the PWM inverter and
G3 is the transfer function of the low-pass filter. The current
regulator is also considered as a pure delay. The output voltage
of the inverter follows its reference with four sampling periods
of delay. In practice, the dynamic of the current regulator is
not a pure delay and shows some deviation from the deadbeat
controller. Therefore, the total settle time is more than 100 µs.
Fig. 13 shows the frequency response of the current and voltage
controllers based on deadbeat control method.
The phase delay of the controller linearly increases with
frequency increments. Unlike phase, the gain of the controller
remains constant for all frequency ranges. For frequencies
lower than 1 kHz, the phase lag of the current controller is negli-
gible. The ability of the controller to limit current harmonics for
the frequencies more than 2 kHz deteriorates. The phase delay
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 2, FEBRUARY 2008
Fig. 14. Simulation results for the output voltage of the UPS with a resistive
load in normal mode.
(13)
(14)
Fig. 15. Simulation results for the BIFRED output capacitor voltage in normal
mode and battery charge mode.
of the voltage controller is twice that of the current controller.
Therefore, the values for LO and CO must be large enough so
that the cutoff frequency of the low-pass filter is less than 1 kHz.
IV. S IMULATION AND E XPERIMENTAL R ESULTS
Extensive computer simulations have been carried out using
SABER software to help design and control the new UPS sys-
tem. Fig. 14 shows the output voltage of the UPS system with
a resistive load. The output voltage of the BIFRED converter
in battery charge mode and normal mode is shown in Fig. 15.
The parameters of the system for experimental setup have
been set at: Vin (ac) = 110 V, VO (ac) = 110 V, Pout = 150 W,
transformer turn ratio of N1 /N2 = 1/2, f = 60 Hz, Vbattery =
48 V, and BIFRED output capacitor voltage = 200 V. To set
the BIFRED converter in the required mode, Lin and Lm are
set at 190.9 and 700 µH, respectively.
A digital signal processor (DSP) was considered for the
control and generation of PWM signals for gate drivers of
NASIRI et al.: ON-LINE UPS SYSTEM WITH PFC AND ELECTRIC ISOLATION USING BIFRED CONVERTER
Fig. 16. Experimental results for the input ac line voltage Vs and input current
Is (x-axis: 5 mS/div; y-axis: 50 V/div for voltage, 10 A/div for current).
Fig. 17. Experimental result for battery voltage and current Vbat and Ibat
(x-axis: 5 mS/div; y-axis: 50 V/div for voltage, 1 A/div for current).
the IGBTs. The DSP kit used in this case was the DSP
Starter Kit for TMS320LF2407A from Texas Instruments Inc.
The TMS320LF2407A has integrated peripherals specifically
chosen for embedded control applications. This DSP includes
analog-to-digital converters, PWM outputs, timers, protection
circuitry, and serial communications. Most instructions for the
DSP, including Multiplication and Accumulation as one in-
struction, are the single cycle type. Therefore, multiple control
algorithms can be executed at high speed, making it possible
to achieve the required high sampling rate for good dynamic
response. Digital control also introduces the advantages of pro-
grammability and immunity to noise. With fewer components,
the system requires less engineering time and can be made
smaller and more reliable.
Fig. 16 shows the experimental results for the input voltage
and input current of the system. Fig. 17 shows the battery
voltage and current in the battery charging mode. Fig. 18
shows the output voltage of the UPS system and its frequency
spectrum for a resistive load. Fig. 19 shows the output voltage
and current of the UPS system with nonlinear load.
V. C ONCLUSION
The proposed UPS system in this paper is based on the new
family of IHQRR converters offering a low-cost alternative
to achieve PFC, fast dynamic response, low battery voltage,
729
Fig. 18. Experimental results of the UPS system in backup mode with
resistive load voltage and its frequency spectrum (x-axis: 5 mS/div, y-axis:
50 V/div).
Fig. 19. Experimental result for output voltage and current for a diode bridge
rectifier load condition (x-axis: 5 mS/div; y-axis: 100 V/div for voltage,
10 A/div for current).
and desired output voltage. The controlled dc link voltage
from the output capacitor of the IHQRR converter serves as
a voltage source for both the UPS inverter and bidirectional
dc/dc converter. The bidirectional dc/dc converter charges and
discharges the battery with continuous current. The circuit
topology, operation, and control strategy have been described.
The experimental results verify the simulation results and ad-
vantages of the proposed UPS system.
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Adel Nasiri (SM’06) was born in Sari, Iran, in 1974.
He received the B.S. and M.S. degrees in electrical
engineering from Sharif University of Technology,
Tehran, Iran, in 1996 and 1998, respectively, and the
Ph.D. degree in electrical engineering from Illinois
Institute of Technology, Chicago, in 2004.
From 1998 to 2001, he worked for Moshanir
Power Engineering Company, Tehran. He also
worked for ForHealth Technologies, Inc., Daytona
Beach, FL, from 2004 to 2005, on an automated
syringe filling device. He is presently an Assistant
Professor in the Department of Electrical Engineering and Computer Science
at the University of Wisconsin, Milwaukee, where he is the Director of the
Power Electronics and Motor Drives Laboratory. His research interests are
power electronics converters, uninterruptible power supplies, renewable energy
systems, and electric motor controls.
Zhong Nie (S’01–M’05) received the B.S.
degree from Huazhong University of Science and
Technology, Wuhan, China, in 1998, the M.S.
degree from North China Electric Power University,
Beijing, China, in 2001, and the Ph.D. degree from
Illinois Institute of Technology (IIT), Chicago,
in 2005.
He was a Graduate Research Assistant in the
Grainger Power Electronics and Motor Drives Lab-
oratory, IIT. Currently, he is working as a Product
Research and Development Engineer at Inductoheat,
Inc., Madison Heights, MI. His research interests include switched-mode
power supply topologies and digital controller, uninterruptible power systems,
induction heating power supply, switched reluctance and brushless dc motor
drives.
Stoyan B. Bekiarov received the M.Sc. degree in
electrical engineering from Technical University,
Sofia, Bulgaria, in 1994 and the Ph.D. degree in
electrical engineering, specializing in power elec-
tronics and motor drives, from Illinois Institute of
Technology, Chicago, in 2004.
From 1994 to 2000, he was employed by the
Grocvet—LTD, Bulgaria as a Project Engineer. He is
currently a Senior Engineer at C. E. Niehoff & Co.,
Evanston, IL. His interests include electric power
management systems, motor drives, and power elec-
tronics modules for heavy-duty and military vehicles.
Ali Emadi (S’98–M’00–SM’03) received the B.S.
and M.S. degrees in electrical engineering with high-
est distinction from Sharif University of Technol-
ogy, Tehran, Iran. He received the Ph.D. degree in
electrical engineering from Texas A&M University,
College Station.
He is the Director of the Electric Power and Power
Electronics Center at Illinois Institute of Technology
(IIT), where he has established research and teaching
facilities as well as courses in power electronics,
motor drives, and vehicular power systems. He is
also the founder, Director, and Chairman of the board of the Industry/
Multi-university Consortium on Advanced Automotive Systems. He is the
author/coauthor of over 200 journal and conference papers as well as several
books including Vehicular Electric Power Systems (New York, NY: Marcel
Dekker, 2003), Energy Efficient Electric Motors (New York, NY: Marcel
Dekker, 2004), Uninterruptible Power Supplies and Active Filters (Boca Raton,
FL: CRC Press, 2004), and Modern Electric, Hybrid Electric, and Fuel Cell
Vehicles (Boca Raton, FL: CRC Press, 2004). He is also the Editor of the
Handbook of Automotive Power Electronics and Motor Drives (New York, NY:
Marcel Dekker, 2005).
Dr. Emadi is the recipient of numerous awards and recognitions. He has
been named the Eta Kappa Nu Outstanding Young Electrical Engineer of the
Year 2003 by virtue of his outstanding contributions to hybrid electric vehicle
conversion. He also received the 2005 Richard M. Bass Outstanding Young
Power Electronics Engineer Award from the IEEE Power Electronics Society.
In 2005, he was selected as the Best Professor of the Year by the students
at IIT. He is the recipient of the 2002 University Excellence in Teaching
Award from IIT as well as the 2004 Sigma Xi/IIT Award for Excellence in
University Research. He directed a team of students to design and build a
novel motor drive, which won the First Place Overall Award of the 2003
IEEE/DOE/DOD International Future Energy Challenge for Motor Competi-
tion. He is an Associate Editor of the IEEE TRANSACTIONS ON INDUSTRIAL
ELECTRONICS, IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY, and
IEEE TRANSACTIONS ON POWER ELECTRONICS. He was the General Chair
of the 2005 IEEE Vehicle Power and Propulsion and SAE Future Transportation
Technology Joint Conference.