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M4-01 Adders
M4-01 Adders
ECE314
Spring 2022
M4: Digital Building Blocks
Lecture 1
Adders
DiaaEldin Khalil
Ain Shams University
Integrated Circuits Laboratory
• Ripple Adder
• Full Adder Optimization
– Inversion Property Exploitation
– Setup Expressions & Manchester Carry
• Ripple Adder Improvement
– Carry-Bypass Adder
– Linear Carry-Select Adder
– Square-Root Carry-Select Adder
• Carry-Lookahead Adder
Simplest adder
In worst case, carry ripples from the least to most significant bits
tp = (N-1)tcarry + tsum
tcarry is critical and should be smaller than tsum
Worst case propagation delay is linear with the number of bits: tp = O(N)
Ci Co
FA
Co = AB BCi ACi
S = A BCi ABCi A BCi ABCi
= ABCi Co A B Ci
Other useful expressions
= A B Ci
Co = AB BCi ACi
• Better implementations exist
S = ABCi Co A B Ci
Co = AB BCi ACi
• Better implementations exist
S = ABCi Co A B Ci
• Ripple Adder
• Full Adder Optimization
– Inversion Property Exploitation
– Setup Expressions & Manchester Carry
• Ripple Adder Improvement
– Carry-Bypass Adder
– Linear Carry-Select Adder
– Square-Root Carry-Select Adder
• Carry-Lookahead Adder
• Ripple Adder
• Full Adder Optimization
– Inversion Property Exploitation
– Setup Expressions & Manchester Carry
• Ripple Adder Improvement
– Carry-Bypass Adder
– Linear Carry-Select Adder
– Square-Root Carry-Select Adder
• Carry-Lookahead Adder
Block Propagate
P0 G1 P1 G1 P2 G2 P3 G3
BP=P oP1 P2 P3
Ci,0 C o,0 Co,1 C o,2
FA FA FA FA
Co,3
MUX
Basic Idea:
• If (P0 & P1 & P2 & P3 = 1) then (Co,3 = Ci,0) else (“kill” or “generate”)
• Carry either propagates through bypass path or gets generated
somewhere inside the carry chain
• In either case, delay is smaller than normal ripple
• Small area overhead due to added MUX
D. Khalil ECE314 – M4 Lecture 1 12
Carry-Bypass (Skip) Adder
EG: N=16
Bit 0-3 Bit 4-7 Bit 8-11 Bit 12-15
P0=0, P1=P2=P3=1 P4=P5=P6=P7=1 P8=P9=P10=P11=1 P12=P13=P14=P15=1
tsetup Setup Setup Setup Setup
3tcarry
C i,0 Carry Carry Carry Carry
Ripple adder critical path: carry generate at bit 0 & propagate from bit 0tsum
to 15
Carry-bypass adder critical path: carry generate at bit 0, propagate from bit 0
to bit 3, bypass the middle 2 groups, & propagate from bit 12 to bit 15
longer path ?
Generally, for N = number of bits & M = group size in bits
N
t p = tsetup Mtcarry 1tbypass M 1tcarry tsum
M
integer M optimal ?
D. Khalil ECE314 – M4 Lecture 1 13
Linear Carry Select Adder
Setup
Basic Idea:
• Pre-compute carry chain P,G vectors
for both possible cases of
carry-in values (0 & 1) "0"
"0" Carry
• When carry-in arrives,
select the correct case
depending on the value "1"
• Only takes MUX delay for "1" Carry
selection Carry vectors
• In either case, delay is Ci Co
much smaller than ripple MUX
• Significant area overhead
due to added duplicate
carry chain and MUX
Sum
(1)
"0" Carry "0" Carry "0" Carry "0" Carry
"0" "0" "0" "0"
4tcarry
"1" Carry "1" Carry "1" Carry "1" Carry
"1" "1" "1" "1"
(5) (5) (5) (5)
(6) (7) (8)
MUX MUX MUX MUX
Ci,0 Co,3 Co,7 Co,11 Co,15
(9) tmux
tmux tmux tmux
Sum Sum Sum Sum
(1)
"0" Carry "0" Carry "0" Carry "0" Carry
"0" "0" "0" "0"
3tcarry
"1" Carry "1" Carry "1" Carry "1" Carry
"1" "1" "1" "1"
(4) (5) (6) (5)
(5) (6) (7)
MUX MUX MUX MUX
Ci,0 Co,3 Co,7 Co,11 Co,15
(8) tmux
tmux tmux tmux
Sum Sum Sum Sum
• Ripple Adder
• Full Adder Optimization
– Inversion Property Exploitation
– Setup Expressions & Manchester Carry
• Ripple Adder Improvement
– Carry-Bypass Adder
– Linear Carry-Select Adder
– Square-Root Carry-Select Adder
• Carry-Lookahead Adder