CSE 223: Digital Electronics

Lecture 2 : Error detecting code (Parity bit), Boolean

Algebra and Logic Gates.

Md. Jayed Hossain

Lecturer

Department of Computer Science and Engineering

Daffodil International University

 1. BCD Code

❑ When numbers, letters, or words are represented by a special group of symbols, we say that they are
being encoded, and the group of symbols is called a code. Ex. Morse Code
❑ When a decimal number is represented by its equivalent binary number, we call it straight binary coding.
❑ If each digit of a decimal number is represented by its binary equivalent, the result is a code called binary-
coded-decimal (BCD).
➢ Since a decimal digit can be as large as 9, four bits are required to code each digit
(the binary code for 9 is 1001).

Example: Decimal to BCD

Example: BCD to Decimal

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 2. Parity Method for Error Detection

❑ Any group of bits contain either an even or an odd number of 1s.

❑ A parity bit is attached to a group of bits to make the total number of 1s in a group always even or always
odd (at either the beginning or the end).
❑ An even parity bit makes the total number of 1s even, and an odd parity bit makes the total odd.
❑ A given system operates with even or odd parity, but not both.
➢ For instance, if a system operates with even parity, a check is made on each group of bits received to make
sure the total number of 1s in that group is even. If there is an odd number of 1s, an error has occurred.

Detecting an Error:
➢ For instance, we wish to transmit the BCD code 0101. The total code transmitted, including the even
parity bit, is:

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 2. Parity Method for Error Detection (Contd.)

➢ Now let’s assume that an error occurs in the third bit from the left (the 1 becomes a 0).

✓ When this code is received, the parity check circuitry determines that there is only
a single 1 (odd number), when there should be an even number of 1s. Because
an even number of 1s does not appear in the code when it is received, an error is
indicated.
✓ An odd parity bit also provides in a similar manner for the detection of a single
error in a given group of bits.

❖ A parity bit provides for the detection of a single bit error but cannot check for two errors in one group.

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 2. Parity Method for Error Detection (Contd.)

Example: 1

Example: 2

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 3. Logic Gates

The Inverter/NOT Gate:

❑ The inverter (NOT circuit) performs the operation called inversion or complementation. The inverter
changes one logic level to the opposite level. In terms of bits, it changes a 1 to a 0 and a 0 to a 1.
Inverter Truth Table Timing Diagrams

Standard logic symbols for the inverter

Logic Expression for an Inverter

*The negation indicator is a “bubble” ( ) that

indicates inversion or complementation

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 3. Logic Gates (Contd.)

The AND Gate:

❑ An AND gate can have two or more inputs and performs what is known as logical/boolean multiplication.
❑ An AND gate produces a HIGH output only when all of the inputs are HIGH.

Logic Expression Truth Table

Standard logic symbol

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 3. Logic Gates (Contd.)

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 3. Logic Gates (Contd.)

The OR Gate:
❑ An OR gate can have two or more inputs and performs what is known as logical/boolean addition.
❑ An OR gate produces a HIGH on the output when any of the inputs is HIGH.

Logic Expression Truth Table

Standard logic symbol

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 3. Logic Gates (Contd.)

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 3. Logic Gates (Contd.)

The NAND Gate:

❑ The term NAND is a contraction of NOT-AND and implies an AND function with a complemented (inverted) output.
❑ A NAND gate produces a LOW output only when all the inputs are HIGH.

Truth Table

Logic Expression

Standard logic symbol

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 3. Logic Gates (Contd.)

The NOR Gate:

❑ The term NOR is a contraction of NOT-OR and implies an OR function with an inverted (complemented) output.
❑ A NOR gate produces a LOW output when any of its inputs is HIGH. Only when all of its inputs are LOW is the
output HIGH.
Truth Table
Logic Expression

Standard logic symbol

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 3. Logic Gates (Contd.)

See Alternate Logic-gate Representations Topic of Lecture 3

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 3. Logic Gates (Contd.)

The XOR Gate:

❑ The XOR gate has only two inputs.
❑ The output of an exclusive-OR gate is HIGH only when the two inputs are at opposite logic levels.

Logic Expression Truth Table

Standard logic symbol

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 3. Logic Gates (Contd.)

The XNOR Gate:

❑ The XNOR gate has only two inputs and operates completely opposite to the XOR circuit.
❑ The XNOR produces a HIGH output whenever the two inputs are at the same level.

Truth Table
Logic Expression

Standard logic symbol

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 3. Logic Gates (Contd.)

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 4. Boolean Algebra

➢ Logic Circuit: An electronic circuit used in computers to perform a logical operation (AND, OR, NOT, etc.,)
on its two or more input signals.
➢ Boolean algebra: A means for expressing the relationship between a logic circuit’s inputs and outputs. In
Boolean algebra there are only three basic operations: OR, AND, and NOT. These basic operations are
called logic operations.
➢ Digital circuits called logic gates can be constructed from diodes, transistors, and resistors connected so
that the circuit output is the result of a basic logic operation (OR, AND, NOT) performed on the inputs.
➢ A truth table is a means for describing how a logic circuit’s output depends on the logic levels present at the
circuit’s inputs.
✓ The number of input combinations will equal 2N for an N-input truth table.

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5. Laws and Rules of Boolean Algebra

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5. Laws and Rules of Boolean Algebra (Contd.)

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5. Laws and Rules of Boolean Algebra (Contd.)

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 5. Laws and Rules of Boolean Algebra (Contd.)

Rule 11 (Truth Table Verification):

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 6. De Morgan’s theorem

➢ First Theorem: The complement of a product of variables is equal to the sum of the complements
of the variables.

➢ Second Theorem: The complement of a sum of variables is equal to the product of the complements of
the variables.

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 6. De Morgan’s theorem (Contd.)

Truth Table Verification of De Morgan’s Theorem:

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6. De Morgan’s theorem (Contd.)

De Morgan’s theorem

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 References

1. Digital Systems Principles and Applications - Ronald J. Tocci (Section 2.4, 3.1 to 3.5, 3.10,
3.11, 4.6)
2. Digital Fundamentals - Thomas L. Floyd (Section 2.12, 3.1 to 3.6, 4.1 to 4.3)
** Example math from these sections

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