American International University- Bangladesh (AIUB)

Faculty of Engineering

Course Name: Digital Logic and Circuits Course Code: EEE 3101
Semester: Spring 2023-24 Term: MID
Total Marks: 10 Submission Date: 08/03/2024
Faculty Name: Tamim Hossain Assignment: 01

Course Outcome Mapping with Questions

Obtained
Item COs POIs K P A Marks
Marks
Q1 CO1 P.a.2.C3 K2 2.5
Q2 CO1 P.a.2.C3 K2 2.5
Q3 CO1 P.a.2.C3 K2 2.5
Q4 CO1 P.b.2.C4 K2 2.5
Total: 10

Student Information:
Student Name: Bijoy Ahamed. Student ID: 22-49373-3
Serial: 14
Section: R Department: CSE

Marking Rubrics (to be filled by Faculty):

Excellent Proficient Good Acceptable Unacceptable No Response
[5] [4] [3] [2] [1] [0]
Detailed unique
No
response Response with no Partial problem is Unable to clarify
Response shows Response/(Copie Secured
Problem # explaining the apparent errors solved; response the understanding
understanding of d/identical Marks
concept properly and the answer is indicates part of of the problem and
the problem, but submissions will
and answer is correct, but the problem was method of the
the final answer be graded as 0
correct with all explanation is not not understood problem solving
may not be correct for all parties
works clearly adequate/unique. clearly. was not correct
concerned)
shown.
1

Comments Total marks (10)

Q1. An electronic circuit is needed to design that can add two single bit digits and one carry bit which is the
overflow of the sum of the previous stage of addition and outputs the sum and the carry. Applying the concept
and information of logic gates and Boolean expression design the circuit and prepare the related Boolean
expressions and truth table.

Q2. Design a Decimal to BCD Irregular Sequence Encoder with priority sequence of your ID Digit then rest of
the decimal digit with highest priority.
For example. If your student id is 12-20814-1 your priority sequence will be 1,2,0,8,4,9,7,6,5,3
Here, 1,2,0,8,4 this sequence gets from student id (If any decimal value repeat, consider it once). Rest of the
sequence (9,7,6,5,3) will follow highest priority of remaining decimal value.

Q3. Design a 32 to 5 decoder using 8 to 3 decoder.

Q4. Illustrate a 4-bit magnitude comparator using Ao, Bo, A1, B1, A2, B2, A3, B3 as input and A=B, A<B, A>B
as output using logic gates.

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