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Experiment 2 - 2021AAPS3021H
Experiment 2 - 2021AAPS3021H
Experiment 2 - 2021AAPS3021H
Aim: To study the inverting amplifier, the non-inverting amplifier, the voltage follower,and the summing amplifier using
op-amps.
Equipment & Components: Analog Electronics Trainer kit, DSO & Function Generator (Analog Discovery kit),
Digital multimeter, UA 741 IC, Resistors, Capacitors, Connecting wires.
Theory:
Introduction:
An operational amplifier, abbreviated op-amp, is a versatile electronic component having wide applications in electronic
signal processing, instrumentation, control, etc. Basically, it is a high gain dc differential input amplifier.
The input terminal marked ‘+¿ ’ is called non- inverting input (NII) terminal and the one marked‘−¿’ is called the
inverting input (II) terminal. The output voltage v o will be in phase with the input signal applied at the non-inverting input
terminal, while it will be 180° out of phase when the input is applied to the inverting terminal.± V CC denotes the +¿ ve and
– ve power supplies. A dual power supply of ± 15 volts is quite common in practical op-amps circuits.
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-6
Pinout of IC 741 Operational-Amplifier:
1. Inverting Amplifier :
An inverting amplifier in which the output voltage V O is 1800 out of phase with the input voltage V S is shown in
Figure 2.2.
V S−¿ V V N −¿V
Applying KCL at the inverting input terminal, we obtain N
¿ = ¿ . But sinceV N =0, we have
O
ZI ZF
ZF R
V O =−〔 〕 V S. When Z F and Z I are pure resistances such that Z F =RF and Z I = R I , V O =−〔 F 〕 V S .
ZI RI
The output voltage ( v o) of Inverting amplifier will be in phase opposition to the input voltage ( v s).
2. Non-invertingAmplifier :
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-7
A non–inverting amplifier in which the output voltage V O is in phase with the input voltage V S is shown in Figure 2.3.
RI
By potential-divider action, we can write V N =〔 〕 v O. Also, V P=V S as no current flows in R S. Using
RI + RF
VO RF
V N =V P , we can express =〔 1+ 〕.
VS RI
3. Voltage Follower:
A special case of non-inverting amplifier is the voltage follower circuit. By taking R I → ∞ and R F →0 , the non-inverting
amplifier circuit results in to a voltage follower as shown in Figure 2.4. The output voltage equals input voltage i.e. V o =
V S , The circuit has a unity gain. It finds extensive use as a buffer for impedance matching purposes.
4. A Summing Amplifier :
The basic inverting amplifier can be converted into a summing amplifier with negative gain as shown in figure 2.5. The
summing amplifier is particularly useful in linearly combining or adding together groups of voltages. Each voltage may be
amplified by an independently chosen gain.
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-8
Figure 2.5 Adder circuit
V1 V V V V RF R
〔 〕 + 〔 2 〕 + 〔 3 〕 +. . . . . + 〔 n 〕 = −〔 O 〕 or V O = −¿ [ 〔 〕 V 1+ 〔 F 〕 V 2+. . . . +
R1 R2 R3 Rn RF R1 R2
R
〔 F 〕Vn¿
Rn
V O =−¿. . . + V n)
Observations:
Use op-amp(UA 741 IC), dc power supply voltages of ± 15V .
1.1 Design
Design an inverting amplifier (Ref. Figure 2.2) for the gain ( AV ) of 16. Assume R I = 1KΩ. Assemble the circuit. Feed
sinusoidal input of amplitude, V S ( p− p)=¿ 200 mV and frequency 1 kHz.
VO
Practical Gain ( AV = ) of the amplifier = _____15.3 or 23.69 dB________
VS
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-9
Feed sinusoidal input of amplitude V s ( p− p)= 200 mV. Sweep the input frequency from 1 Hz to 1 MHz and obtain the
magnitude response of the amplifier.
Frequency response
2.1Design
Design anon- inverting amplifier (Ref. Figure 2.3) for the gain ( AV ) of 16. Assume R I = 1 KΩ and R S = 470 Ω.
Assemble the circuit.Feed sinusoidal input of amplitude,V S ( p− p)=¿ 200 mV and frequency 1 kHz.
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-10
The value of R F= __15 kΩ____.
Observe the input and output voltages on a DSO.
Practical value of V o =_____3.2 V______.
VO
Practical: Gain ( AV = ) of the amplifier = ______16.15_______
VS
Practical: Phase difference (ϕ ¿ between the input and output voltages = ____0 Degrees_______
2.2 Frequency Response
Feed sinusoidal input of amplitude V s ( p− p)= 200 mV. Sweep the input frequency from 1 Hz to 1 MHz and obtain the
magnitude response of the amplifier.
Frequency response
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-11
Practical: 3 dB Bandwidth (BW) = f H −f L = _____48.873kHz_____ and Gain- Bandwidth product (GBW) =
______1.1809 MHz_______.
VO
Practical: Gain ( AV = ) of the amplifier = _0.997_____and Phase difference (ϕ ¿ between the input and output =
VS
___0_Degress__.
3.2Frequency Response
Feed sinusoidal input of amplitude V s ( p− p)= 200 mV. Sweep the input frequency from 1 Hz to 5MHz and obtain the
magnitude response of the amplifier.
Frequency response
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-12
Practical: 3 dB Bandwidth (BW) = f H −f L = ____49kHz and Gain- Bandwidth product (GBW) =
_____86.37kHz________.
Assemble an analog Adder circuit (Ref. Figure 2.5) with R F=R 1=¿ 10 KΩ, R2=¿ 4.7 KΩ, and R3=¿ 2.2 KΩ. Feed
sinusoidal input of amplitude200 mV (P− P) and frequency 1 kHz to each input i.e.V 1=V 2 =V 3= 200 mV (P− P).
AV 1= AV 2= AV 3=
Practical Theoretical
S.No V 1(mV) V 2(mV) V 3(mV) −RF −RF −RF
( ¿ ( ) ( ) V O(V) V O (V)
R1 R2 R3
1.536
1 200 200 200 -1 V/V -2.12 V/V -4.54 V/V 1.531 Vp-p
V p-p
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-13
Conclusions:
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Analog Electronics Lab Manual, EEE Dept., BITS-Pilani Hyderabad Campus Page-14