17 Multilevel Power Converters 459

TABLE 17.1 Diode-clamped six-level inverter voltage levels and cor- must block Vdc . If the inverter is designed such that each block-
responding switch states ing diode has the same voltage rating as the active switches,
Voltage Va0 Switch state
Dn will require n diodes in series; consequently, the number of
diodes required for each phase would be (m − 1) × (m − 2).
Sa5 Sa4 Sa3 Sa2 Sa1 Sa 5 Sa 4 Sa 3 Sa 2 S a 1 Thus, the number of blocking diodes is quadratically related to
V5 = 5Vdc 1 1 1 1 1 0 0 0 0 0 the number of levels in a diode-clamped converter [28].
V4 = 4Vdc 0 1 1 1 1 1 0 0 0 0 One application of the multilevel diode-clamped inverter
V3 = 3Vdc 0 0 1 1 1 1 1 0 0 0 is an interface between a high-voltage dc transmission line
V2 = 2Vdc 0 0 0 1 1 1 1 1 0 0 and an ac transmission line [29]. Another application would
V1 = 1Vdc 0 0 0 0 1 1 1 1 1 0
be a variable speed drive for high-power medium-voltage
V0 =0 0 0 0 0 0 1 1 1 1 1
(2.4–13.8 kV) motors as proposed in [3, 6, 19, 28–30]. Several
authors have proposed for the diode-clamped converter that
static var compensation is an additional function. The main
has been subdivided by five capacitors into six levels. The volt- advantages and disadvantages of multilevel diode-clamped
age across each capacitor is Vdc , and the voltage stress across converters are as follows [1–3].
each switching device is limited to Vdc through the clamp-
ing diodes. Table 17.1 lists the output voltage levels possible 17.2.2.1 Advantages
for one phase of the inverter with the negative dc rail volt- • All the phases share a common dc bus, which minimizes
age V0 as a reference. State condition 1 means the switch the capacitance requirements of the converter. For this
is on, and 0 means the switch is off. Each phase has five reason, a back-to-back topology is not only possible but
complementary switch pairs such that turning on one of the also practical for uses such as a high-voltage back-to-back
switches of the pair requires the other complementary switch interconnection or an adjustable speed drive.
to be turned off. The complementary switch pairs for phase leg • The capacitors can be precharged as a group.
a are (Sa1 , Sa 1 ), (Sa2 , Sa 2 ), (Sa3 , Sa 3 ), (Sa4 , Sa 4 ), and (Sa5 , Sa 5 ). • Efficiency is high for fundamental frequency switching.
Table 17.1 also shows that in a diode-clamped inverter, the
switches that are on for a particular phase leg are always adja-
cent and in series. For a six-level inverter, a set of five switches 17.2.2.2 Disadvantages
should be on at any given time. • Real-power flow is difficult for a single inverter because
Figure 17.6 shows one of the three line–line voltage wave- the intermediate dc levels will tend to overcharge or
forms for a six-level inverter. The line voltage Vab consists of a discharge without precise monitoring and control.
phase-leg “a” voltage and a phase-leg “b” voltage. The resulting • The number of clamping diodes required is quadratically
line voltage is a 11-level staircase waveform. This means that related to the number of levels, which can be cumbersome
an m-level diode-clamped inverter has an m-level output phase for units with a high number of levels.
voltage and a (2m − 1)-level output line voltage.
Although each active switching device is required to block 17.2.3 Flying-Capacitor Multilevel Inverter
only a voltage level of Vdc , the clamping diodes require different
ratings for reverse voltage blocking. Using phase a of Fig. 17.5 Meynard and Foch introduced a flying-capacitor-based inver-
as an example, when all the lower switches Sa 1 through Sa 5 ter in 1992 [31]. The structure of this inverter is similar to
are turned on, D4 must block four voltage levels, or 4Vdc . that of the diode-clamped inverter except that instead of using
Similarly, D3 must block 3Vdc , D2 must block 2Vdc , and D1 clamping diodes, the inverter uses capacitors. The circuit topol-
ogy of the flying-capacitor multilevel inverter is shown in
Fig. 17.7. This topology has a ladder structure of dc side capac-
V5 itors, where the voltage on each capacitor differs from that of
V4 the next capacitor. The voltage increment between two adjacent
V3 Fundamental capacitor legs gives the size of the voltage steps in the output
Vab
V2 component of Vab
waveform.
V1 2π
π /2 One advantage of the flying-capacitor-based inverter is that
V0
0 3π /2 it has redundancies for inner voltage levels, that is, in other
V1
V2 words, two or more valid switch combinations can synthesize
V3 an output voltage. Table 17.2 shows a list of all the combina-
V4
tions of phase voltage levels that are possible for the six-level
V5
circuit shown in Fig. 17.7. Unlike the diode-clamped inverter,
FIGURE 17.6 Line voltage waveform for a six-level diode-clamped the flying-capacitor inverter does not require all of the switches
inverter. that are “on” (conducting) be in a consecutive series. Moreover,