QUAD 2-INPUT MULTIPLEXER SN54/74LS157

The LSTTL / MSI SN54 / 74LS157 is a high speed Quad 2-Input Multiplexer.
Four bits of data from two sources can be selected using the common Select
and Enable inputs. The four buffered outputs present the selected data in the
true (non-inverted) form. The LS157 can also be used to generate any four
of the 16 different functions of two variables. The LS157 is fabricated with the
Schottky barrier diode process for high speed and is completely compatible
with all Motorola TTL families. QUAD 2-INPUT MULTIPLEXER
• Schottky Process for High Speed
• Multifunction Capability LOW POWER SCHOTTKY
• Non-Inverting Outputs
• Input Clamp Diodes Limit High Speed Termination Effects
• Special Circuitry Ensures Glitch Free Multiplexing
• ESD > 3500 Volts

CONNECTION DIAGRAM DIP (TOP VIEW) J SUFFIX

CERAMIC
VCC E I0c I1c Zc I0d I1d Zd
CASE 620-09
16 15 14 13 12 11 10 9 16
1
NOTE:
The Flatpak version has
the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
N SUFFIX
PLASTIC
16 CASE 648-08
1 2 3 4 5 6 7 8
S I0a I1d Za I0b I1b Zb GND 1

PIN NAMES LOADING (Note a)

HIGH LOW D SUFFIX
S Common Select Input 1.0 U.L. 0.5 U.L. SOIC
16
E Enable (Active LOW) Input 1.0 U.L. 0.5 U.L. 1 CASE 751B-03
I0a – I0d Data Inputs from Source 0 0.5 U.L. 0.25 U.L.
I1a – I1d Data Inputs from Source 1 0.5 U.L. 0.25 U.L.
Za – Zd Multiplexer Outputs (Note b) 10 U.L. 5 (2.5) U.L. ORDERING INFORMATION
NOTES:
SN54LSXXXJ Ceramic
a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.
SN74LSXXXN Plastic
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges. SN74LSXXXD SOIC

LOGIC DIAGRAM
I0a I1a I0b I1b I0c I1c I0d I1d E S LOGIC SYMBOL
2 3 5 6 14 13 11 10 15 1

15 2 3 5 6 14 13 11 10

E I0a I1a I0b I1b I0c I1c I0d I1d

1 S

Za Zb Zc Zd

4 7 12 9

VCC = PIN 16 VCC = PIN 16

GND = PIN 8 GND = PIN 8
4 7 12 9 = PIN NUMBERS
Za Zb Zc Zd

FAST AND LS TTL DATA

5-1
 SN54/74LS157

FUNCTIONAL DESCRIPTION
The LS157 is a Quad 2-Input Multiplexer fabricated with the
Schottky barrier diode process for high speed. It selects four
bits of data from two sources under the control of a common
Select Input (S). The Enable Input (E) is active LOW. When E
is HIGH, all of the outputs (Z) are forced LOW regardless of all
other inputs.
The LS157 is the logic implementation of a 4-pole,
2-position switch where the position of the switch is deter-
mined by the logic levels supplied to the Select Input. The logic
equations for the outputs are:
Za = E ⋅ (I1a ⋅ S + I0a ⋅ S) Zb = E ⋅ (I1b ⋅ S + I0b ⋅ S)
Zc = E ⋅ (I1c ⋅ S + I0c ⋅ S) Zd = E ⋅ (I1d ⋅ S + I0d ⋅ S)
A common use of the LS157 is the moving of data from two
groups of registers to four common output busses. The partic-
ular register from which the data comes is determined by the
state of the Select Input. A less obvious use is as a function
generator. The LS157 can generate any four of the 16 different
functions of two variables with one variable common. This is
useful for implementing highly irregular logic.

TRUTH TABLE
SELECT
ENABLE INPUT INPUTS OUTPUT
E S I0 I1 Z
H X X X L
L H X L L
L H X H H
L L L X L
L L H X H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care

GUARANTEED OPERATING RANGES

Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 54 4.5 5.0 5.5 V
74 4.75 5.0 5.25
TA Operating Ambient Temperature Range 54 – 55 25 125 °C
74 0 25 70
IOH Output Current — High 54, 74 – 0.4 mA
IOL Output Current — Low 54 4.0 mA
74 8.0

FAST AND LS TTL DATA

5-2
 SN54/74LS157

DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)

Limits
S b l
Symbol P
Parameter Min Typ Max U i
Unit T
Test C
Conditions
di i
Guaranteed Input HIGH Voltage for
VIH Input HIGH Voltage 2.0 V
All Inputs
54 0.7 Guaranteed Input
p LOW Voltage
g for
VIL Input LOW Voltage V
74 0.8 All Inputs

VIK Input Clamp Diode Voltage – 0.65 – 1.5 V VCC = MIN, IIN = – 18 mA
54 2.5 3.5 V VCC = MIN,, IOH = MAX,, VIN = VIH
VOH Output HIGH Voltage
74 2.7 3.5 V or VIL per Truth Table

54, 74 0.25 0.4 V IOL = 4.0 mA VCC = VCC MIN,

VOL Output LOW Voltage VIN = VIL or VIH
74 0.35 0.5 V IOL = 8.0 mA per Truth Table

Input HIGH Current

I0, I1 20 µA VCC = MAX, VIN = 2.7 V
IIH E, S 40
I0, I1 0.1
mA VCC = MAX, VIN = 7.0 V
E, S 0.2
Input LOW Current
IIL I0, I1 – 0.4 mA VCC = MAX, VIN = 0.4 V
E, S – 0.8
IOS Short Circuit Current (Note 1) – 20 – 100 mA VCC = MAX
ICC Power Supply Current 16 mA VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.

AC CHARACTERISTICS (TA = 25°C)

Limits
S b l
Symbol P
Parameter Min Typ Max U i
Unit T
Test C
Conditions
di i
tPLH Propagation Delay 9.0 14
ns Figure 2
tPHL Data to Output 9.0 14
tPLH Propagation Delay 13 20 VCC = 5.0
50V
ns Figure 1
tPHL Enable to Output 14 21 CL = 15 pF
tPLH Propagation Delay 15 23
ns Figure 2
tPHL Select to Output 18 27

AC WAVEFORMS

VIN 1.3 V 1.3 V VIN 1.3 V 1.3 V

tPHL tPLH tPHL tPLH

VOUT 1.3 V 1.3 V VOUT 1.3 V 1.3 V

Figure 1 Figure 2

FAST AND LS TTL DATA

5-3