MARINDUQUE STATE COLLEGE

COLLEGE OF ENGINEERING

EEAC12
MICROPROCESSOR SYSTEMS

ACTIVITY NO. 2
Exploring the CPU Operations/Instructions

Submitted by:
SILLA, GLAIDEN M.
BSEE 3

Submitted to:
JEPTHE M. LADERAS, CpE
Faculty

March 14, 2024

PART I. Documentation for Given Instructions
Screenshots and table (how register values change) of the given instruction.
1. OUTPUT
1.1 PART 1

Figure 1. Initial Phase of Simulator

Figure 2. Execution Details of MOV #28, R00 Instruction

Figure 3. Execution Details of MOV #6, R01 Instruction

Figure 4. Execution Details of MOV R01, R02 Instruction

 Figure 5. Execution Details of ADD R02, R01 Instruction

Table 1. Changes in CPU Registers

GENERAL PURPOSE CPU

SPECIAL CPU REGISTERS
Instruction REGISTERS
PC SR SP BR IR MAR MDR R00 R01 R02
MOV #28, MOV #28, MOV #28,
6 0 8096 0 0 28 0 0
R00 R00 R00
MOV #6, 8096 0 MOV #6, MOV #6,
12 0 6 28 6 0
R01 R01 R01
MOV R01, 8096 0 MOV R01, MOV R01,
17 0 12 28 6 6
R02 R02 R02
ADD R02, 8096 0 ADD R02, ADD R02,
17 0 17 28 12 6
R01 R01 R01
PART II. Documentation for Own Instruction
Screenshots and table (how register values change) of own (10) instructions.

1.2 Part 2

Figure 6. Initial Phase of Simulator

 Figure 7. Execution Details of MOV #29, R00 Instruction
During Execution, the First Instruction, MOV #29, R00:
1. The instruction MOV #29, R00 is reflected in the Instruction Register (IR) and Memory
Data Register (MDR).
After Execution:
2. The Program Counter (PC) value changes from 0 to 6, indicating the completion of the
instruction.
3. The value 29 is moved to Register R00, as shown in the figure.
 Figure 8. Execution Details of MOV #2, R01 Instruction

During Execution, the First Instruction, MOV #2, R01:

1. The instruction MOV #2, R01 is reflected in the Instruction Register (IR) and Memory
Data Register (MDR).
After Execution:
2. The Program Counter (PC) value changes from 6 to 12, indicating the completion of the
instruction.
3. The value 2 is moved to Register R01, as shown in the figure.
 Figure 9. Execution Details of ADD R00, R01 Instruction
During Execution, the First Instruction, ADD R00, R01:
1. The instruction ADD R00, R01 is reflected in the Instruction Register (IR) and Memory
Data Register (MDR).
After Execution:
2. The Program Counter (PC) value changes from 12 to 17, indicating the completion of
the instruction.
3. The value of R00 (29) is ADDED to Register R01, Resulting in a value of 31 in R01 as
shown in the figure.
 Figure 10. Execution Details of ADD #5 R02; Instruction

During Execution, the First Instruction, ADD #5 R02:

1. The instruction ADD #5 R02 is reflected in the Instruction Register (IR) and
Memory Data Register (MDR).
After Execution:
2. The Program Counter (PC) value changes from 17 to 23, indicating the completion
of the instruction.
3. The value 5 is Added to Register R02, Resulting in a value of 5 in R02 as shown in
the figure.
 Figure 11. Execution Details of SUB R02, R00 Instruction
During Execution, the First Instruction, SUB R02, R00:
1. The instruction SUB R02, R00 is reflected in the Instruction Register (IR) and
Memory Data Register (MDR).
After Execution:
2. The Program Counter (PC) value changes from 23 to 28, indicating the completion
of the instruction.
3. The value of R02 (5) is Subtracted to R00, resulting in a value of 24 in R00, as
shown in the figure.
 Figure 12. Execution Details of MUL R02, R01 Instruction
During Execution, the First Instruction, MUL R02, R01:
1. The instruction MUL R02, R01 is reflected in the Instruction Register (IR) and Memory
Data Register (MDR).
After Execution:
2. The Program Counter (PC) value changes from 28 to 33, indicating the completion of
the instruction.
3. The value of R02 (5) is Multiplied to Register R01 (31), resulting in a value of 155
in R01 Position as shown in the figure.
 Figure 13. Execution Details of SWP R00, R02 Instruction
During Execution, the First Instruction, SWP R00, R02:
1. The instruction SWP R00, R02 is reflected in the Instruction Register (IR) and Memory
Data Register (MDR).
After Execution:
2. The Program Counter (PC) value in R00 and R02 swapped, indicating the completion of
the instruction.
3. The value of R02 (5) is Swapped to Register R00 (24), resulting in a Swap of
Position as shown in the figure
 Figure 14 Execution Details of INC R02 Instruction

During Execution, the First Instruction, INC R02:

1. The instruction INC R02 is reflected in the Instruction Register (IR) and Memory Data
Register (MDR).
After Execution:
2. The Program Counter (PC) value changes from 38 to 41, indicating the completion of
the instruction.
3. The value 24 Registered in R02 is increased by 1, as shown in the figure.
 Figure 15. Execution Details of NOT #13, R02 Instruction
During Execution, the First Instruction, NOT #3, R02:
1. The instruction NOT #3, R02 is reflected in the Instruction Register (IR) and Memory Data
Register (MDR).
After Execution:
2. The Program Counter (PC) value changes from 41 to 47, The Status Register (SR) value
changed value from 0 to 2 and lastly the SR status Flag indicates a Negative Status
Flag.
3. The value 25 Registered in R02 changed to -14, as shown in the figure
 Figure 16. Execution Details of AND #2, R00 Instruction

During Execution, the First Instruction, AND #2, R00:

1. The instruction AND #2, R00 is reflected in the Instruction Register (IR) and Memory Data
Register (MDR).
After Execution:
2. The Program Counter (PC) value remains 47, The Status Register (SR) value
changed value from 2 to 1 and lastly the SR status Flag indicates a Zero Status Flag.
3. The value 5 Registered in R00 changed to 0, as shown in the figure
Table 2. Changes in CPU Registers

GENERAL PURPOSE CPU

SPECIAL CPU REGISTERS
Program REGISTERS
Instruction SR Stack
PC SR SP BR MAR Status Top R00 R01 R02 R03
Flag
MOV #29,
6 1 8096 0 0 29 0 0 0
R00
MOV #2,
12 0 8096 0 6 29 2 0 0
R01
ADD R00,
17 0 8096 0 12 29 31 0 0
R01
ADD #5,
23 0 8096 0 17 29 31 5 0
R02
SUB R02,
28 0 8096 0 23 24 31 5 0
R00
MUL R02,
33 0 8096 0 28 24 155 5 0
R01
SWP R00,
38 0 8096 0 33 5 155 24 0
R02
INC R01 41 0 8096 0 38 5 155 25 0
NOT #13,
47 0 8096 2 41 N 5 155 -14 0
R02
AND #2,
47 2 8096 0 47 Z 0 155 -14 0
R00

Part III. Answers

Based on the execution of each instruction, describe the following for each special
register.
1. When do they change values?
2. What triggers this change of values?
3. What data do they keep/store?
4. What is their purpose in the execution of each instruction?