‫تسنيم سامر غزال‬ Microprocessors and Assembly Language 2023/11/17

202010412 Assignment No. One

1- MOV DATA[SI], ECX

Data addressing mode: Register Relative Addressing
It’s equivalent to: MOV [DATA + SI], ECX
So, to find the address accessed by this instruction we
will find the physical address:
physical address = DS * 10H + offset (Effective address).
Effective address (EA) = DATA + SI
= 0140H + 0050H = 0190H
Physical address = 0100H * 10H + 0190H = 1190H

2- MOV BL, [BX + SI]

Data addressing mode: Base-Plus-Index Addressing
So, to find the address accessed by this instruction we
will find the physical address:
physical address = DS * 10H + offset (Effective address).
Effective address (EA) = BX + SI
= 0120H + 0050H = 0170H
Physical address = 0100H * 10H + 0170H = 1170H
‫تسنيم سامر غزال‬ Microprocessors and Assembly Language 2023/11/17
202010412 Assignment No. One

The number of bits for base address in Core2 is 32bits.

The base address portion of the descriptor indicates

the starting location of the memory segment.
So, starting location = 00260000H

The segment limit contains the last offset address

found in a segment.

G: granularity bit, because G in this question equals 1,

so, limit will by appended with FFFH which is mean
will be multiplied by 4K byte.

Ending location = starting location + limit

= 00260000H + 00110FFFH
= 00370FFFH

8 bits register indirect addressing

Not allowed Memory to memory transfer

16 bit register addressing mode

Not allowed Segment Reg. to Segment Reg.

Note: DS :16 bits SS:16 bits BX: 16 bits DI:16 bits

‫تسنيم سامر غزال‬ Microprocessors and Assembly Language 2023/11/17
202010412 Assignment No. One

.model small
.data
src dw ?
dst dw ?
.code
.startup
mov si, offset src
mov di, offset dst
cld
mov cx, 25
rep movsw

Explanation for first line:

offset means that si register will be equal to the
offset of the variable SRC (not to its actual value).

This is practical application using emu8086: