Clock memory

What does it mean when we say that clock memory of S7 has pulse_pause ratio of (1:1). May I
know with more elaboration?

Linking this question with some hardware would be nice..

See the PULSE stage as the ON state and the PAUSE stage as the OFF state. That means the
frequency pulse is ON for 50% of the cycle and OFF for 50% of the cycle.

This specification is normally given when speaking of PTO (Pulse Train Output) that supplies a
frequency controlled pulse for something like a Servo or Stepper Motor. In some other devices
the change in pulse frequency is used instead of an analog signal to supply a setpoint for a
device.

In the case of a PWM (Pulse Width Modulation) the pulse frequency is fixed but the ratio ON vs
OFF is changed. Again this can be used as a setpoint in a device. In electronics you can use this
priciple to dim LED lamps.

I think question is about clock memory, not the PWM outputs.

Here is what manual says:

The clock memory is a memory byte that changes its binary state periodically at a pulse-pause
ratio of 1:1. You select which memory byte is used on the CPU when you assign parameters for
the clock memory using STEP 7.

You can use clock memory bytes in the user program, for example, to activate flashing lights or
to trigger periodic activities (for example, measuring an actual value).

Each bit of the clock memory byte is assigned a frequency. The following table

shows the assignment:

Bit of the Clock

Bit of the Clock Memory Byte 7 6 5 4 3 2 1 0

Period Duration (s) 2.0 1.6 1.0 0.8 0.5 0.4 0.2 0.1

Frequency (Hz) 0.5 0.625 1 1.25 2 2.5 5 10

You can use clock memory bytes in the user program, for example, to activate flashing lights or
to trigger periodic activities (for example, measuring an actual value).

Each bit of the clock memory byte is assigned a frequency. The following table

shows the assignment:

Bit of the Clock

Bit of the Clock Memory Byte 7 6 5 4 3 2 1 0

Period Duration (s) 2.0 1.6 1.0 0.8 0.5 0.4 0.2 0.1

Frequency (Hz) 0.5 0.625 1 1.25 2 2.5 5 10

In case, let say, Bit 7 with 2.0 seconds period duration and 0.5 Hz frequency. Now considering
this value how pulse-pause ration (1:1) will work.

"Mbit will be OFF for 1 second and ON for another second" am I right??? If yes, I think there will
be an error of 1s every time PLC is restarted, when this pulse is used for counting !

You have a valid argument to make. On restart you are going to be a half phase out if you look at
the transition off - on. You could however look at on - off transition. The problem is however
more complicated than you think.

If you are to use the pulses in a counter to use as if a timer:

Realise that you can not assure that the process needing a "timer" is in synchronise with the
time pulse you are using. Your time measurement may be out by up to (almost) a full pulse.

If you do not have any more hardware timers (older PLCs) then you have other options to work
with. It all depends on what you want to do and how long you need to measure.

Greetings.