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Sir Syed CASE Institute of Technology, Islamabad

EE2401 Digital Logic Design

Lab No. 10

Name of Student: Roll No. :

Date of Experiment: Report submitted on:

Marks obtained: Instructor’s Signature:

Instructor: Engr Safdar Munir


Working With Multiplexer and Demultiplexer

Objectives
Having completed this experiment you will be able to

1. Understand the power of multiplexing and demultiplexing operations.


2. Use Multiplexer and Demultiplexer ICs: 74LS153 (MUX) and 74LS139 (DeMUX).
3. Identify the commonality between decoding and demultiplexing operations.

Basic Information
2.1 Digital Multiplexer (MUX)

A digital Multiplexer (MUX) is a combinational circuit, which selects binary information from
one of many input lines and directs it to a single output line. In other words we can define it as
the circuit that is typically used to combine two or more digital signals onto a single line, by
placing them there at different times. Technically, this is known as time-division multiplexing.
The selection of a particular input line is controlled by a set of selection lines. Normally, there
are 2n input lines and an “n” selection line whose combination determines which one of the 2n
inputs is to be selected.

Fig 2.1 shows the symbolic representation of a 2-to-1 MUX whereas Fig 2.2 shows its
implementation using basic logic gates. The operation of this 2-to-1 MUX is described by the
truth-table given in Table 2.1. Input A is the select input, which controls which of the two data
inputs, X0 or X1, will be routed to the output line Y. If the A input switches back and forth at a
frequency more than double the frequency of either digital signal, both signals will be accurately
reproduced, and can be separated again by a demultiplexer circuit synchronized to the
multiplexer. Multiplexing operation is widely used in telephone networks to combine multiple
audio signals onto a single pair of wires. With the growth of the Internet and the World Wide
Web, most people have heard about T1 telephone lines. A T1 line can transmit up to 24
individual telephone conversations by multiplexing them in this manner.

Fig 2.1

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Y = X1 A + X0 !A

Fig 2.2

Select line Output


A Y
0 Xo
1 X1

Table 2.1

The multiplexer concept is not limited to two data inputs. If we add a second select line B, we
can control as many as four data inputs, as shown in Fig 2.3. Addition of third and fourth select
lines will allow the multiplexer to control eight and sixteen inputs, respectively.

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Fig 2.3

2.2 Digital DeMultiplexer (DeMUX)

The Demultiplexer (DeMUX) basically reverses the multiplexing function. It takes information
from a single input line and distributes it among a given number of output lines. For this reason
the DeMUX is also known as a data distributor.

Fig 2.4 shows the logic circuit of a 1-to-2 lines DeMUX. This circuit receives its inputs on
the single input line IN and sepending upon the status of the select line A, routes the input
to one of its two output lines, i.e. OUT0 and OUT1.

DEMUX
Fig 2.4

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Demultiplexers are not limited to only two output lines. If we add a second select line B, we can
route the input data to as many as four output lines, as shown in Fig 2.5. Addition of third and
fourth select lines will allow demultiplexing the input data among eight and sixteen output lines,
respectively.

Fig 2.5

An interesting thing to note is the similarity between the Demultiplexer logic and the Decoder
logic implementations. The same circuit can also be used as a a demultiplexer as well as a
decoder, by appropriately using the input and select lines.

As a decoder, the DeMUX of Fig 2.5 can take 2-bit binary numbers as input on its select lines
with the input line IN tied to Vcc. As a result of this configuration, a logic HIGH will appear on
the any one of the output lines in accordance with the binary number applied to its select lines.
Typical decoder/demultiplexer ICs contain 2-to-4 line circuits, 3-to-8-line circuits, or 4-to-16-
line circuits. One exception to the binary nature of this circuit is the 4-to-10-lines
decoder/demultiplexer, which is intended to convert a BCD (Binary Coded Decimal) input to an
output in the 0-9 ranges.

Experimental Work
This experiment consists of two parts; part one deals with MUXing operation while in part two,
we learn the use of DeMUXing technique.

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3.1 Material Required

a) Logic Trainer
b) Multimeter
c) Logic ICs:
74LS153 (Dual 4-to-1 MUX
74LS08 (Quad - AND Gate)
74LS06 (Hex - NOT Gate)
d) Connecting wires

3.2 Procedure

1. Connect the logic Trainer to 220V AC power supply.


2. Turn on the Trainer and verify the DC voltage by using voltmeter.
3. Install the IC 74LS153, on the trainer’s breadboard.
4. Wire the circuit as shown in Fig 3.3. Remember that all inputs and outputs are Active
HIGH.
5. Supply the data to be multiplexed by data switches and change the select lines’ inputs to
observe the output status. Record your observations in Table 3.1.
6. Disconnect the circuit and reconnect as shown in Fig 2.4.
7. Record your observations in Table 3.2.

MUX 74LS153
Fig 3.1

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74LS153
MUX
Fig 3.3

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3.3 Experimental Results

Inputs
Outputs
Select Data
B A S1 S2 S3 S4 LED
0 0 1 1 0 0
0 0 0 1 0 0
0 1 1 1 1 1
0 1 0 1 0 0
1 0 1 1 1 1
1 0 1 1 0 1
1 1 1 0 1 0
MUX

Table 3.1

Inputs Select Output


IN S Out0 Out1
0 0
1 0
0 1
1 1
DEMUX

Table 3.2

In the Case of Trouble

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 Check the power supply for correct voltage.
 Check the Vcc (pin # 16) and Ground (pin # 8) connections of the IC under test.
 Check all the wire connections and remove any possible breaks.
 Check the IC under test for its proper working according to its truth table. To do this use
Multimeter to measure voltage levels at the inputs and outputs of each gate in that chip.

5. Questions
Draw the combined interconnected circuit which uses a 4-to-1 MUX and a 1-to-4 DeMUX
having common Select Lines – similar to one which may be used in a telephone network to
provide four telephone connections using a single digital line to carry all the information.

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